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Date: Sun, 5 Aug 2012 21:26:35 +0300
Message-ID: <CAFtRNNzdnJjeZ4i=caV4eErFzF4sjFft3u6RQ4v_VOuNyaAZ0A@mail.gmail.com> (sfid-20120805_202715_945833_DA915C1F)
Subject: Re: [ath5k-devel] [PATCH 1/2] ath5k: fix wrong per rate target power
 eeprom reads for AR5K_EEPROM_MODE_11A
From: Nick Kossifidis <mickflemm@gmail.com>
To: Thomas Huehn <thomas@net.t-labs.tu-berlin.de>
Cc: nbd@nbd.name, jirislaby@gmail.com, linux-wireless@vger.kernel.org,
	mcgrof@qca.qualcomm.com, ath5k-devel@lists.ath5k.org,
	Bob Copeland <me@bobcopeland.com>
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2012/8/5 Thomas Huehn <thomas@net.t-labs.tu-berlin.de>:
> Hi Nick
>
>> According to EEPROM docs there are 10 calibration piers on all chips
>> after 5111 for 11a but some of them are not used and the way to test
>> this is if frequency is zero. Now here is a bug in the EEPROM code
>> that might result the wrong reads you get, check this out:
>>
>> on ath5k_eeprom_read_freq_list we do this
>>
>> if (!freq1)
>>  break;
>>
>> instead of this
>>
>> if (!freq1)
>>  continue;
>
>
> That did the trick !
> So reading 10 calibration piers and using the fix from above works in
> terms of tx_power changes on CM9 and DCMA82 are properly used by the
> hardware.
>
> I will send a patch for that.
>
>
> Greetings Thomas
>

I have some time right now so I'll re-send my patches (one of them
needs a fix anyway) together with this one to make John's job easier.
Send your EEPROM patch on top of them so that he can see it (remember
to CC him).


-- 
GPG ID: 0xEE878588
As you read this post global entropy rises. Have Fun ;-)
Nick