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From: Daniel Kurtz <djkurtz@chromium.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel@ffwll.ch>,
	Keith Packard <keithp@keithp.com>,
	David Airlie <airlied@linux.ie>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	Benson Leung <bleung@chromium.org>,
	Yufeng Shen <miletus@chromium.org>
Subject: Re: [PATCH 4/8 v7] drm/i915/intel_i2c: use WAIT cycle, not STOP
Date: Fri, 13 Apr 2012 19:49:36 +0800	[thread overview]
Message-ID: <CAGS+omAJE_vjdL_H5r6ByJFagOHtH1tDHFwzwWuF2bWxaYdkcw@mail.gmail.com> (raw)
In-Reply-To: <1334175985_372722@CP5-2952>

On Thu, Apr 12, 2012 at 4:26 AM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Thu, 12 Apr 2012 02:17:46 +0800, Daniel Kurtz <djkurtz@chromium.org> wrote:
>> On Wed, Apr 11, 2012 at 5:34 AM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>> > The last major item on the wishlist is solving how to drive the SDVO i2c
>> > over gmbus. I think it is just a matter of massaging in the channel
>> > switch as msg[0].
>>
>> I noticed that random other i2c adapter, but haven't looked at it to
>> know why it is so different than the others.  What is it?
>
> Every command sequence over SDVO is preceded by an instruction to the
> controller as to which function to send the command to. Originally I
> tried to reuse the GPIO method of simply sending that switch command
> immediately followed by the real message, but I never succeeded in
> setting up the SDVO devices in that manner. I suspect what is actually
> required is to rebuild the message to include the preceeding bus switch.
>
> However, if you don't have any SDVO devices to experiment with we can
> find somebody who does.

Sorry, I don't have any SDVO hardware to play with.

> -Chris
>
> --
> Chris Wilson, Intel Open Source Technology Centre

  reply	other threads:[~2012-04-13 11:49 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-30 11:46 [PATCH 0/8 v7] fix gmbus writes and related issues Daniel Kurtz
2012-03-30 11:46 ` [PATCH 1/8 v7] drm/i915/intel_i2c: handle zero-length writes Daniel Kurtz
2012-04-03 22:54   ` Chris Wilson
2012-04-03 22:54     ` Chris Wilson
2012-03-30 11:46 ` [PATCH 2/8 v7] drm/i915/intel_i2c: use double-buffered writes Daniel Kurtz
2012-03-30 11:46 ` [PATCH 3/8 v7] drm/i915/intel_i2c: always wait for IDLE before clearing NAK Daniel Kurtz
2012-03-30 11:46 ` [PATCH 4/8 v7] drm/i915/intel_i2c: use WAIT cycle, not STOP Daniel Kurtz
2012-04-10 10:37   ` Daniel Vetter
2012-04-10 10:41     ` Daniel Vetter
2012-04-10 10:56       ` Daniel Kurtz
2012-04-10 15:03         ` Daniel Vetter
2012-04-10 21:34           ` Chris Wilson
2012-04-10 21:34             ` Chris Wilson
2012-04-11 18:17             ` Daniel Kurtz
2012-04-11 20:26               ` Chris Wilson
2012-04-11 20:26                 ` Chris Wilson
2012-04-13 11:49                 ` Daniel Kurtz [this message]
2012-04-11 18:16           ` Daniel Kurtz
2012-04-11 20:04             ` Daniel Vetter
2012-04-11 20:28             ` Chris Wilson
2012-04-11 20:28               ` Chris Wilson
2012-03-30 11:46 ` [PATCH 5/8 v7] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions Daniel Kurtz
2012-03-30 11:46 ` [PATCH 6/8 v7] drm/i915/intel_i2c: reuse GMBUS2 value read in polling loop Daniel Kurtz
2012-03-30 11:46 ` [PATCH 7/8 v7] drm/i915/intel_i2c: remove POSTING_READ() from gmbus transfers Daniel Kurtz
2012-03-30 11:46 ` [PATCH 8/8 v7] drm/i915/intel_i2c: use DRM_ERROR on timeouts Daniel Kurtz
2012-03-30 12:49 ` [PATCH 0/8 v7] fix gmbus writes and related issues Chris Wilson
2012-03-30 12:49   ` Chris Wilson
2012-03-30 15:33   ` Daniel Vetter

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