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From: Helmut Schaa <helmut.schaa@googlemail.com>
To: "Gupta, Pekon" <pekon@ti.com>
Cc: Scott Wood <scottwood@freescale.com>,
	"Huang Shijie \(b32955@freescale.com\)" <b32955@freescale.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	David Woodhouse <David.Woodhouse@intel.com>,
	Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Subject: Re: [PATCH] mtd: nand: Disable subpage writes for drivers without ecc->hwctl
Date: Mon, 5 May 2014 18:08:37 +0200	[thread overview]
Message-ID: <CAGXE3d-g3ACtY0GK2hbSEtBs2LOLzxKmbbTgWJSf7f9GuBk8Tw@mail.gmail.com> (raw)
In-Reply-To: <20980858CB6D3A4BAE95CA194937D5E73EACA532@DBDE04.ent.ti.com>

Hi Pekon,

On Mon, May 5, 2014 at 10:46 AM, Gupta, Pekon <pekon@ti.com> wrote:
> Any update on below patch? Does this maintain compatibility to
> existing UBIFS images ?

Patch works fine with a VID header offset of 512 and without the crash :)

Feel free to add my

Reported-by: Helmut Schaa <helmut.schaa@googlemail>
Tested-by: Helmut Schaa <helmut.schaa@googlemail>

when sending the patch.

Thanks,
Helmut

> with regards, Pekon
>
>
>
>>>------------------------------------
>>>diff --git a/drivers/mtd/nand/fsl_elbc_nand.c
>>>b/drivers/mtd/nand/fsl_elbc_nand.c
>>>index a21252c..cc79ce4 100644
>>>--- a/drivers/mtd/nand/fsl_elbc_nand.c
>>>+++ b/drivers/mtd/nand/fsl_elbc_nand.c
>>>@@ -723,6 +723,19 @@ static int fsl_elbc_write_page(struct
>>mtd_info
>>>*mtd, struct nand_chip *chip,
>>>        return 0;
>>> }
>>>
>>>+/* ECC will be calculated automatically, and errors will be detected
>>>in
>>>+ * waitfunc.
>>>+ */
>>>+static int fsl_elbc_write_subpage(struct mtd_info *mtd, struct
>>>nand_chip *chip,
>>>+                               uint32_t offset, uint32_t data_len,
>>>+                               const uint8_t *buf, int oob_required)
>>>+{
>>>+       fsl_elbc_write_buf(mtd, buf, mtd->writesize);
>>>+       fsl_elbc_write_buf(mtd, chip->oob_poi, mtd->oobsize);
>>>+
>>>+       return 0;
>>>+}
>>>+
>>> static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv)
>>> {
>>>        struct fsl_lbc_ctrl *ctrl = priv->ctrl;
>>>@@ -762,6 +775,7 @@ static int fsl_elbc_chip_init(struct
>>fsl_elbc_mtd
>>>*priv)
>>>
>>>        chip->ecc.read_page = fsl_elbc_read_page;
>>>        chip->ecc.write_page = fsl_elbc_write_page;
>>>+       chip->ecc.write_subpage = fsl_elbc_write_subpage;
>>>
>>>        /* If CS Base Register selects full hardware ECC then use it */
>>>        if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) ==
>>>
>>>------------------------------------

  reply	other threads:[~2014-05-05 16:08 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-09  9:13 [PATCH] mtd: nand: Disable subpage writes for drivers without ecc->hwctl Helmut Schaa
2014-04-09  9:38 ` Gupta, Pekon
2014-04-09 10:06   ` Helmut Schaa
2014-04-09 10:33     ` Gupta, Pekon
2014-04-09 11:57       ` Helmut Schaa
2014-04-09 23:34       ` Scott Wood
2014-04-10  4:19         ` Gupta, Pekon
2014-04-10 20:47           ` Scott Wood
2014-04-10  6:45         ` Helmut Schaa
2014-04-10  7:26           ` Gupta, Pekon
2014-04-10 15:22             ` Helmut Schaa
2014-04-11  6:35               ` Gupta, Pekon
2014-04-11 20:10                 ` Scott Wood
2014-04-14  5:55                   ` Gupta, Pekon
2014-04-14  6:18                     ` Helmut Schaa
2014-05-05  8:46                       ` Gupta, Pekon
2014-05-05 16:08                         ` Helmut Schaa [this message]
2015-12-09 23:58 ` Brian Norris
2015-12-10  9:31   ` Helmut Schaa
2015-12-12  0:40     ` Brian Norris
2015-12-12  7:59       ` Boris Brezillon
2015-12-14 14:04         ` Helmut Schaa
2015-12-19  2:19         ` Brian Norris

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