From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36858C432BE for ; Thu, 2 Sep 2021 03:35:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 198B7610E5 for ; Thu, 2 Sep 2021 03:35:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235574AbhIBDgO (ORCPT ); Wed, 1 Sep 2021 23:36:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233094AbhIBDgN (ORCPT ); Wed, 1 Sep 2021 23:36:13 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97700C061575 for ; Wed, 1 Sep 2021 20:35:15 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id t19so1047661lfe.13 for ; Wed, 01 Sep 2021 20:35:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=7gL2ilJvS9thJPKxvfAwKwluP8VS/DzvajJ4jaGSJwc=; b=IRTZFjZoogEmBBaugLy0pzf0q5DcgA5uSZSobTaya5fjXwJUzC/oaRDfW2PJI57wq1 ZBLPCOC8jN6KWXUZfsU6pMwRya5y/VUp/Qzh6O//ItwBo9cnEW868KU+FCAlMdkIbxuT gGGKlCW3txze91xJPv10X0akUda4/uNz21Xoc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7gL2ilJvS9thJPKxvfAwKwluP8VS/DzvajJ4jaGSJwc=; b=o8lXU8+NVZF1AVmP9Q8jyof9kudK4waSut0aklNejHnSvewkXeamNWl7O6rIWYLHKa 32xk1LvRWYf9LqhnqZ/kZp+wTajuYJJ75+5hhyIbnxYB4hlX1OK3humE0n+HreVLvjxt MGQW6N/t0aZQeq+9SCg1vn+8AEkbib7vplrpcdUxEer9gEq2f/T490/X9B3P8MxYysTW g/LiaUMXtpv77vxwan813OJHurOMNGf5GELX/gW1/iyNTNn/cr3FJX3p5YI1UkVcaF9c oM3lmrVwpImeFZS8l9CGhi4kikW/7WNev3brFIpKvvndijywk19qa+EKdmoomK/Txomv 9gqg== X-Gm-Message-State: AOAM533ijRSAI9dVXFRrNpv0AQPVUQmCIzGcMeNs/hezPHK7TF26V3g5 klhEJc6LilglLQB2NP5eQoSO6TGu/nQmouFM2Yo6dQ== X-Google-Smtp-Source: ABdhPJwp8Zka/IVZHD5rJYhSAvF9EYBibqi1JlXlE5eSLcADyhgkokl5Wumq+rdTbEutCChOFvC3Elh8L79u+yN5V5g= X-Received: by 2002:ac2:4116:: with SMTP id b22mr894820lfi.587.1630553713975; Wed, 01 Sep 2021 20:35:13 -0700 (PDT) MIME-Version: 1.0 References: <20210830003603.31864-1-zhiyong.tao@mediatek.com> <20210830003603.31864-2-zhiyong.tao@mediatek.com> <1630551265.2247.11.camel@mhfsdcap03> In-Reply-To: <1630551265.2247.11.camel@mhfsdcap03> From: Chen-Yu Tsai Date: Thu, 2 Sep 2021 11:35:02 +0800 Message-ID: Subject: Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define To: "zhiyong.tao" Cc: Rob Herring , Linus Walleij , Mark Rutland , Matthias Brugger , Sean Wang , srv_heupstream , hui.liu@mediatek.com, Eddie Huang , Light Hsieh , Biao Huang , Hongzhou Yang , Sean Wang , Seiya Wang , Devicetree List , LKML , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "moderated list:ARM/Mediatek SoC support" , "open list:GPIO SUBSYSTEM" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao wrote: > > On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote: > > On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao wrote: > > > > > > This patch adds rsel define for mt8195. > > > > > > Signed-off-by: Zhiyong Tao > > > --- > > > include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++ > > > 1 file changed, 9 insertions(+) > > > > > > diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h > > > index 7e16e58fe1f7..f5934abcd1bd 100644 > > > --- a/include/dt-bindings/pinctrl/mt65xx.h > > > +++ b/include/dt-bindings/pinctrl/mt65xx.h > > > @@ -16,6 +16,15 @@ > > > #define MTK_PUPD_SET_R1R0_10 102 > > > #define MTK_PUPD_SET_R1R0_11 103 > > > > > > +#define MTK_PULL_SET_RSEL_000 200 > > > +#define MTK_PULL_SET_RSEL_001 201 > > > +#define MTK_PULL_SET_RSEL_010 202 > > > +#define MTK_PULL_SET_RSEL_011 203 > > > +#define MTK_PULL_SET_RSEL_100 204 > > > +#define MTK_PULL_SET_RSEL_101 205 > > > +#define MTK_PULL_SET_RSEL_110 206 > > > +#define MTK_PULL_SET_RSEL_111 207 > > > > Could you keep the spacing between constants tighter, or have no spacing > > at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so on. This > > would reduce the chance of new macro values colliding with actual resistor > > values set in the datasheets, plus a contiguous space would be easy to > > rule as macros. > > > > ChenYu > > Hi chenyu, > By the current solution, it won't be mixed used by MTK_PULL_SET_RSEL_XXX > and real resistor value. > If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which > means how much resistor value. What I meant was that by keeping the value space tight, we avoid the situation where in some new chip, one of the RSEL resistors happens to be 200 or 300 ohms. 100 is already taken, so there's nothing we can do if new designs actually do have 100 ohm settings. > We think that we don't contiguous macro space for different register. > It may increase code complexity to make having MTK_PULL_SET_RSEL_000 > defined as 104. Can you elaborate? It is a simple range check and offset handling. Are you concerned that a new design would have R2R1R0 and you would like the macros to be contiguous? BTW I don't quite get why decimal base values (100, 200, etc.) were chosen. One would think that binary bases are easier to handle in code. ChenYu > Thanks. > > > > > > #define MTK_DRIVE_2mA 2 > > > #define MTK_DRIVE_4mA 4 > > > #define MTK_DRIVE_6mA 6 > > > -- > > > 2.18.0 > > > _______________________________________________ > > > Linux-mediatek mailing list > > > Linux-mediatek@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A023C4320E for ; Thu, 2 Sep 2021 03:35:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C6D5060243 for ; Thu, 2 Sep 2021 03:35:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C6D5060243 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=K+x3LcGK4yXsL1xrLormQjkO6BuEYU1vyxTFFgGYLOY=; b=iJhYxlZJU5ahkf qHwmeTK9TpXGs02wOWBIQ0snwqpy6q56ou6qTSrqIaRUcmBf2KaorkbSuA4syhSfiMZTwD7SYgUy8 lxk11camvkfn3CO4xBEBtFc9g/mV1L5NMAsUIkyPNuwnw0WPQXR54EOG7QGs7kLHyFUfZMxKCqLdI a54RslbWbyUmfJbMTpWoNuvG2MAbOWD9MDe/EUVxos055s1CGhy7JyzJhX+JK2PKsC1RsZ0xJhJOR u0Dp0ZwVoykaNYKipgibBDGWrfTEhrWbnZ9r1xi8iZW8UQA9COmHpNAve16OsMk0XaPEhxfwTZuXD avbFjqGOztnFouPMKZhw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mLdVa-008Ldz-1W; Thu, 02 Sep 2021 03:35:22 +0000 Received: from mail-lf1-x130.google.com ([2a00:1450:4864:20::130]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mLdVU-008LcH-3L for linux-mediatek@lists.infradead.org; Thu, 02 Sep 2021 03:35:20 +0000 Received: by mail-lf1-x130.google.com with SMTP id t19so1047664lfe.13 for ; Wed, 01 Sep 2021 20:35:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=7gL2ilJvS9thJPKxvfAwKwluP8VS/DzvajJ4jaGSJwc=; b=IRTZFjZoogEmBBaugLy0pzf0q5DcgA5uSZSobTaya5fjXwJUzC/oaRDfW2PJI57wq1 ZBLPCOC8jN6KWXUZfsU6pMwRya5y/VUp/Qzh6O//ItwBo9cnEW868KU+FCAlMdkIbxuT gGGKlCW3txze91xJPv10X0akUda4/uNz21Xoc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7gL2ilJvS9thJPKxvfAwKwluP8VS/DzvajJ4jaGSJwc=; b=mDaJTSaXQ39wcC9Y0+g/XOWiKk4tmQR6wt3Ud+/QUrdVtGBA7pX5gozat+hepCHmwI sjxZYdVUwAsMsr0PwHD2x0+ml2X9IeKgqYB7Fl4smlcGN5MeVsqCi3ORoRx9dRL44kYq HAc5JqtzOunyilTh6RPMPzPs78bLocJ8+6cmAevIq7p90LV648lDvRINpCc/5iqr9kWi HbOgVfqwS0laBhLgHu1MJ4epcZDQ9SEJTaSqO7wpq9IH/E1wORdnD+TEXJuOBtDqZPv7 DdVP2d3SvvEMqwPe5LNjzehdOMPY30u14gFtxtsKGMAO6+lA8tJB40hxgKJVyURXm1ZG yQPg== X-Gm-Message-State: AOAM530K1Z6mrr8rar1s8qwbwwq6GAxVAy2z4x7jXJ40NRUyzxoKrLVg t66AoFDHvcS1raZT/QUTWRCxxizMeA7ZCXogO72YfQ== X-Google-Smtp-Source: ABdhPJwp8Zka/IVZHD5rJYhSAvF9EYBibqi1JlXlE5eSLcADyhgkokl5Wumq+rdTbEutCChOFvC3Elh8L79u+yN5V5g= X-Received: by 2002:ac2:4116:: with SMTP id b22mr894820lfi.587.1630553713975; Wed, 01 Sep 2021 20:35:13 -0700 (PDT) MIME-Version: 1.0 References: <20210830003603.31864-1-zhiyong.tao@mediatek.com> <20210830003603.31864-2-zhiyong.tao@mediatek.com> <1630551265.2247.11.camel@mhfsdcap03> In-Reply-To: <1630551265.2247.11.camel@mhfsdcap03> From: Chen-Yu Tsai Date: Thu, 2 Sep 2021 11:35:02 +0800 Message-ID: Subject: Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define To: "zhiyong.tao" Cc: Rob Herring , Linus Walleij , Mark Rutland , Matthias Brugger , Sean Wang , srv_heupstream , hui.liu@mediatek.com, Eddie Huang , Light Hsieh , Biao Huang , Hongzhou Yang , Sean Wang , Seiya Wang , Devicetree List , LKML , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "moderated list:ARM/Mediatek SoC support" , "open list:GPIO SUBSYSTEM" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210901_203516_213544_B05D3B1C X-CRM114-Status: GOOD ( 30.09 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao wrote: > > On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote: > > On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao wrote: > > > > > > This patch adds rsel define for mt8195. > > > > > > Signed-off-by: Zhiyong Tao > > > --- > > > include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++ > > > 1 file changed, 9 insertions(+) > > > > > > diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h > > > index 7e16e58fe1f7..f5934abcd1bd 100644 > > > --- a/include/dt-bindings/pinctrl/mt65xx.h > > > +++ b/include/dt-bindings/pinctrl/mt65xx.h > > > @@ -16,6 +16,15 @@ > > > #define MTK_PUPD_SET_R1R0_10 102 > > > #define MTK_PUPD_SET_R1R0_11 103 > > > > > > +#define MTK_PULL_SET_RSEL_000 200 > > > +#define MTK_PULL_SET_RSEL_001 201 > > > +#define MTK_PULL_SET_RSEL_010 202 > > > +#define MTK_PULL_SET_RSEL_011 203 > > > +#define MTK_PULL_SET_RSEL_100 204 > > > +#define MTK_PULL_SET_RSEL_101 205 > > > +#define MTK_PULL_SET_RSEL_110 206 > > > +#define MTK_PULL_SET_RSEL_111 207 > > > > Could you keep the spacing between constants tighter, or have no spacing > > at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so on. This > > would reduce the chance of new macro values colliding with actual resistor > > values set in the datasheets, plus a contiguous space would be easy to > > rule as macros. > > > > ChenYu > > Hi chenyu, > By the current solution, it won't be mixed used by MTK_PULL_SET_RSEL_XXX > and real resistor value. > If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which > means how much resistor value. What I meant was that by keeping the value space tight, we avoid the situation where in some new chip, one of the RSEL resistors happens to be 200 or 300 ohms. 100 is already taken, so there's nothing we can do if new designs actually do have 100 ohm settings. > We think that we don't contiguous macro space for different register. > It may increase code complexity to make having MTK_PULL_SET_RSEL_000 > defined as 104. Can you elaborate? It is a simple range check and offset handling. Are you concerned that a new design would have R2R1R0 and you would like the macros to be contiguous? BTW I don't quite get why decimal base values (100, 200, etc.) were chosen. One would think that binary bases are easier to handle in code. ChenYu > Thanks. > > > > > > #define MTK_DRIVE_2mA 2 > > > #define MTK_DRIVE_4mA 4 > > > #define MTK_DRIVE_6mA 6 > > > -- > > > 2.18.0 > > > _______________________________________________ > > > Linux-mediatek mailing list > > > Linux-mediatek@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4524BC432BE for ; Thu, 2 Sep 2021 03:37:21 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0763260BD3 for ; Thu, 2 Sep 2021 03:37:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 0763260BD3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=oWZVPtU5J2PNWH9NFhaQKrkYR7KGxbCuME7t2Qosx80=; b=vgkZQuxVLed9nW NXRA9SNfQC2nk+lbkVS/y9NMM7iYTTdmAk7OWREfwRBEoz5gP0LkC0PB7w9ZlZrWBEBpdZcnfM+6d 1boVgegr8j5orhNfeUb9FMVScQHCN79bS391AQJV4AC0JfaozHXRYpqwc6pkla45P3bztd+S3CJaM nbMrIaUHhh83q+eTNgZxcSjSPQsmxXjaQxYrAogWyCVJVVk1+ymmszxml4IXoE9vew3ulJrQF0AsS nP3DWCHlpKgb1sBtnKmrJtbxdbMYSHZJrVOa9h6a02kUSWs6S+HoKZn+1IQFV49DGm+i7oqe8w4Wo hMMPWWL1b1aFyeXUXG0g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mLdVb-008Le9-Sm; Thu, 02 Sep 2021 03:35:24 +0000 Received: from mail-lf1-x12e.google.com ([2a00:1450:4864:20::12e]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mLdVU-008LcE-3C for linux-arm-kernel@lists.infradead.org; Thu, 02 Sep 2021 03:35:20 +0000 Received: by mail-lf1-x12e.google.com with SMTP id z2so1115782lft.1 for ; Wed, 01 Sep 2021 20:35:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=7gL2ilJvS9thJPKxvfAwKwluP8VS/DzvajJ4jaGSJwc=; b=IRTZFjZoogEmBBaugLy0pzf0q5DcgA5uSZSobTaya5fjXwJUzC/oaRDfW2PJI57wq1 ZBLPCOC8jN6KWXUZfsU6pMwRya5y/VUp/Qzh6O//ItwBo9cnEW868KU+FCAlMdkIbxuT gGGKlCW3txze91xJPv10X0akUda4/uNz21Xoc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7gL2ilJvS9thJPKxvfAwKwluP8VS/DzvajJ4jaGSJwc=; b=COuPe+5uiWRb3yITGlkZh5u56ZAVMOnThvQaOrleP5kC1uBHVw1DxoOO0pJALK9Wv1 5nkZ799TUGAUFBPghJ+g/CAAbqLHwPHGelIWhDPCP7/wQObdwtFd5iBNzDd/b1nvwJMz 3pXXfbDrD+sGRlQdFLJfsAD4ObBnV/TCqiE9V3nAwsk/TP7ytbSN5tE7V5gPUgy+jcsh HJMIbSpLXBwYryuo39e1AEko1ghcbKHN7oj7ylWu3d7EVWHl5Qz77J8qaka8W21aO+ar zKELnjxYX7O83v/smhPsgA7Nj87hUTLLlEBn4fDeQis7HTBLC4D7VV4RESR/tfjenrHp UE8w== X-Gm-Message-State: AOAM5334OKEF2sg+ZyAKqdMNhmPplTLZqrzbeD0U1wurF53ifgdWSHig Xem8cWxSoNDq+zikMN1WafLcqEAKMZSbvHsylCGHtw== X-Google-Smtp-Source: ABdhPJwp8Zka/IVZHD5rJYhSAvF9EYBibqi1JlXlE5eSLcADyhgkokl5Wumq+rdTbEutCChOFvC3Elh8L79u+yN5V5g= X-Received: by 2002:ac2:4116:: with SMTP id b22mr894820lfi.587.1630553713975; Wed, 01 Sep 2021 20:35:13 -0700 (PDT) MIME-Version: 1.0 References: <20210830003603.31864-1-zhiyong.tao@mediatek.com> <20210830003603.31864-2-zhiyong.tao@mediatek.com> <1630551265.2247.11.camel@mhfsdcap03> In-Reply-To: <1630551265.2247.11.camel@mhfsdcap03> From: Chen-Yu Tsai Date: Thu, 2 Sep 2021 11:35:02 +0800 Message-ID: Subject: Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define To: "zhiyong.tao" Cc: Rob Herring , Linus Walleij , Mark Rutland , Matthias Brugger , Sean Wang , srv_heupstream , hui.liu@mediatek.com, Eddie Huang , Light Hsieh , Biao Huang , Hongzhou Yang , Sean Wang , Seiya Wang , Devicetree List , LKML , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "moderated list:ARM/Mediatek SoC support" , "open list:GPIO SUBSYSTEM" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210901_203516_212049_ADB690A1 X-CRM114-Status: GOOD ( 31.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao wrote: > > On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote: > > On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao wrote: > > > > > > This patch adds rsel define for mt8195. > > > > > > Signed-off-by: Zhiyong Tao > > > --- > > > include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++ > > > 1 file changed, 9 insertions(+) > > > > > > diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h > > > index 7e16e58fe1f7..f5934abcd1bd 100644 > > > --- a/include/dt-bindings/pinctrl/mt65xx.h > > > +++ b/include/dt-bindings/pinctrl/mt65xx.h > > > @@ -16,6 +16,15 @@ > > > #define MTK_PUPD_SET_R1R0_10 102 > > > #define MTK_PUPD_SET_R1R0_11 103 > > > > > > +#define MTK_PULL_SET_RSEL_000 200 > > > +#define MTK_PULL_SET_RSEL_001 201 > > > +#define MTK_PULL_SET_RSEL_010 202 > > > +#define MTK_PULL_SET_RSEL_011 203 > > > +#define MTK_PULL_SET_RSEL_100 204 > > > +#define MTK_PULL_SET_RSEL_101 205 > > > +#define MTK_PULL_SET_RSEL_110 206 > > > +#define MTK_PULL_SET_RSEL_111 207 > > > > Could you keep the spacing between constants tighter, or have no spacing > > at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so on. This > > would reduce the chance of new macro values colliding with actual resistor > > values set in the datasheets, plus a contiguous space would be easy to > > rule as macros. > > > > ChenYu > > Hi chenyu, > By the current solution, it won't be mixed used by MTK_PULL_SET_RSEL_XXX > and real resistor value. > If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which > means how much resistor value. What I meant was that by keeping the value space tight, we avoid the situation where in some new chip, one of the RSEL resistors happens to be 200 or 300 ohms. 100 is already taken, so there's nothing we can do if new designs actually do have 100 ohm settings. > We think that we don't contiguous macro space for different register. > It may increase code complexity to make having MTK_PULL_SET_RSEL_000 > defined as 104. Can you elaborate? It is a simple range check and offset handling. Are you concerned that a new design would have R2R1R0 and you would like the macros to be contiguous? BTW I don't quite get why decimal base values (100, 200, etc.) were chosen. One would think that binary bases are easier to handle in code. ChenYu > Thanks. > > > > > > #define MTK_DRIVE_2mA 2 > > > #define MTK_DRIVE_4mA 4 > > > #define MTK_DRIVE_6mA 6 > > > -- > > > 2.18.0 > > > _______________________________________________ > > > Linux-mediatek mailing list > > > Linux-mediatek@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel