From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9510C433F5 for ; Mon, 16 May 2022 05:36:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239624AbiEPFfi (ORCPT ); Mon, 16 May 2022 01:35:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239042AbiEPFfc (ORCPT ); Mon, 16 May 2022 01:35:32 -0400 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1C4BDEE4 for ; Sun, 15 May 2022 22:35:30 -0700 (PDT) Received: by mail-ed1-x533.google.com with SMTP id m12so1323219edb.6 for ; Sun, 15 May 2022 22:35:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=c/IovKeDQ5OmYImuaDKw85Gvkz+g6dB9ube8wouUX0E=; b=GGajIGxKz4a1kdgVCnNp3TVY4oWNsaMBX25vD2wNxJjdlfjW0K2HSomOmhtNf8KlII I/KzDUxpS795xfRF8NdRofQwNVP/BcZW3gRgq5wCMrBCZXhJNS+FRleC+mG3irXz/3aO +mT31wgaBGkXLx4Qfi9CCUwCaASTGFEm4O6+Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=c/IovKeDQ5OmYImuaDKw85Gvkz+g6dB9ube8wouUX0E=; b=pjBNLxug4djppDta9fWJpFDh8ZMIHKSpKAVwDRRziUsIEyVrBEv4al3k0dJ0Xpf6cx BIOmMErjNeznsZ11OUbUTuiLtHh0+U+y798ywAsH/CCxwE+9bPGo45fPqIeqElNJIXz0 McEdqIHjwc6vc4kN1eC9yzxUyPr7yJ0hWo4lBBRy44S2cQUUM8eFexC5E3G50jrixWeT wXs9VilXb40Pi9McC80I/kh0ce+tx25pkZd6p2cybFpAQMb8uBbTY9X+RXrU8OYC2LoT tUBvuklPQCbNz0VVdc1tBsZO6dXFgzdMOZanukQhfo+f31jmw6uQuOCeAjQGmyBeXLE3 qrSw== X-Gm-Message-State: AOAM533IEGG7UXJ8PuJM+1lMHc8SyIeR+j0nHL6vYHBp/zCS8rw5SJc/ akzzrt2VgcTRCurYeDgAFZAclssDOjGtH1TpyMHLQg== X-Google-Smtp-Source: ABdhPJxkaaQU1pxAn/HNEptaZ1FK3UV5eSAHcvlMeQ1pJimMFp8UJ4ll80vonmeQUOiLh7XTmmmV9IDAbxXEwPO61wM= X-Received: by 2002:a05:6402:11cd:b0:427:bda5:542f with SMTP id j13-20020a05640211cd00b00427bda5542fmr11486167edw.290.1652679329459; Sun, 15 May 2022 22:35:29 -0700 (PDT) MIME-Version: 1.0 References: <20220505115226.20130-1-rex-bc.chen@mediatek.com> <20220505115226.20130-10-rex-bc.chen@mediatek.com> In-Reply-To: <20220505115226.20130-10-rex-bc.chen@mediatek.com> From: Chen-Yu Tsai Date: Mon, 16 May 2022 13:35:18 +0800 Message-ID: Subject: Re: [PATCH v6 09/10] arm64: dts: mediatek: Add MediaTek CCI node for MT8183 To: Rex-BC Chen Cc: rafael@kernel.org, viresh.kumar@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, matthias.bgg@gmail.com, jia-wei.chang@mediatek.com, roger.lu@mediatek.com, hsinyi@google.com, khilman@baylibre.com, angelogioacchino.delregno@collabora.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com, "Andrew-sh . Cheng" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 5, 2022 at 8:04 PM Rex-BC Chen wrote: > > Add MediaTek CCI devfreq node for MT8183. > > Signed-off-by: Andrew-sh.Cheng > Signed-off-by: Rex-BC Chen > Reviewed-by: AngeloGioacchino Del Regno > --- > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 4 ++++ > arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 4 ++++ > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 7 +++++++ > 3 files changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > index 8953dbf84f3e..7ac9864db9de 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > @@ -412,6 +412,10 @@ > > }; > > +&cci { > + proc-supply = <&mt6358_vproc12_reg>; > +}; > + > &cpu0 { > proc-supply = <&mt6358_vproc12_reg>; > }; > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > index 8d5bf73a9099..b035e06840e6 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > @@ -230,6 +230,10 @@ > status = "okay"; > }; > > +&cci { > + proc-supply = <&mt6358_vproc12_reg>; > +}; > + > &cpu0 { > proc-supply = <&mt6358_vproc12_reg>; > }; > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index cecf96b628b7..11caf3dd85cd 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -280,6 +280,13 @@ > }; > }; > > + cci: cci { > + compatible = "mediatek,mt8183-cci"; > + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; > + clock-names = "cci_clock"; Binding says there should be two clocks: the actual clock that drives CCI, and a stable "intermediate" clock to switch to during clock rate changes. So I think this should look like: clocks = <&mcucfg CLK_MCU_BUS_SEL>, <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; clock-names = "cci", "intermediate"; ChenYu > + operating-points-v2 = <&cci_opp>; > + }; > + > cpus { > #address-cells = <1>; > #size-cells = <0>; > -- > 2.18.0 > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5D78C433F5 for ; Mon, 16 May 2022 05:35:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xJeSGW1NKbzAi7kHJIz4kQ2ngfXCLLeH81l7WJkI0vk=; b=VaGnaEjc42pECp XEdQ0eg/tCO+8opHm/UaSCCvkcq8dCtINMsgeekjo2YpFl6UeS9j6S/1W9wTmL1ql9Yt4KbVQ7cfG rtzY09tK5EQVKfLQaUJakMyd8+3wN/jmmMdKCiWYp4YkGIUwtEVrGibw8J1QYq0vgGBy9P44ix2Dh hvP2butQSxz8CG1YUXhXEwdfhC+GrPa2N19qBjOQlTnLe8nRuQ30Bh3JpWPWM9w0RaP5m/fyx6lLC 2GacRDgxUAolg4wnsenhm7TSKgGQcPXsrNLDt45pWTuzlKBAqhUxQbUrmTlAPAyra5NAtDz1jEsc9 uWx3DAmHMYXCaLsuOXDw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqTOM-0062XU-TD; Mon, 16 May 2022 05:35:38 +0000 Received: from mail-ed1-x534.google.com ([2a00:1450:4864:20::534]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqTOJ-0062WH-GJ for linux-mediatek@lists.infradead.org; Mon, 16 May 2022 05:35:37 +0000 Received: by mail-ed1-x534.google.com with SMTP id g12so1479836edq.4 for ; Sun, 15 May 2022 22:35:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=c/IovKeDQ5OmYImuaDKw85Gvkz+g6dB9ube8wouUX0E=; b=GGajIGxKz4a1kdgVCnNp3TVY4oWNsaMBX25vD2wNxJjdlfjW0K2HSomOmhtNf8KlII I/KzDUxpS795xfRF8NdRofQwNVP/BcZW3gRgq5wCMrBCZXhJNS+FRleC+mG3irXz/3aO +mT31wgaBGkXLx4Qfi9CCUwCaASTGFEm4O6+Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=c/IovKeDQ5OmYImuaDKw85Gvkz+g6dB9ube8wouUX0E=; b=yb3moJOh6T14ikIJMHRO4rxJuLjlAMl7PH9iM8QX/sruS2TWMSPj5wo0DAoNKR9TKB UzqF9F88Dh3u1Qsca3a4ma2jIgQ8rQTszFtGbRvSaQzBgKR3NDQH8kv+QrcVs9bLWX/4 CU4x6VHquOOXCnmXo1pFA+y7fDJlDnzwYzUr01vQ3WBUrDz8bjb22aDRi+mbt+NLVtzR 6ASOhsB+NJ0NR22sXuSzq/hMlc2xsWL/SkjVsAsvnMqbqhz+C/ReyWSv+OT9UYieh1jx 4o9kMizipu5OC+3jToZ/7srnFB0NJtu7wWrAd9JoWvLf5R/6VXUPqk5yEqnZFLNSQ6KO I2JA== X-Gm-Message-State: AOAM53162MWKNvZ38FyU+rLsb+qWyt0IoDYPf70yl5iTNRhekraKiJoc HCehwGWBxbIHdxMx73NJEa49xyFzGKD/fEeSGyluMA== X-Google-Smtp-Source: ABdhPJxkaaQU1pxAn/HNEptaZ1FK3UV5eSAHcvlMeQ1pJimMFp8UJ4ll80vonmeQUOiLh7XTmmmV9IDAbxXEwPO61wM= X-Received: by 2002:a05:6402:11cd:b0:427:bda5:542f with SMTP id j13-20020a05640211cd00b00427bda5542fmr11486167edw.290.1652679329459; Sun, 15 May 2022 22:35:29 -0700 (PDT) MIME-Version: 1.0 References: <20220505115226.20130-1-rex-bc.chen@mediatek.com> <20220505115226.20130-10-rex-bc.chen@mediatek.com> In-Reply-To: <20220505115226.20130-10-rex-bc.chen@mediatek.com> From: Chen-Yu Tsai Date: Mon, 16 May 2022 13:35:18 +0800 Message-ID: Subject: Re: [PATCH v6 09/10] arm64: dts: mediatek: Add MediaTek CCI node for MT8183 To: Rex-BC Chen Cc: rafael@kernel.org, viresh.kumar@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, matthias.bgg@gmail.com, jia-wei.chang@mediatek.com, roger.lu@mediatek.com, hsinyi@google.com, khilman@baylibre.com, angelogioacchino.delregno@collabora.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com, "Andrew-sh . Cheng" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220515_223535_600276_5E6446B9 X-CRM114-Status: GOOD ( 17.33 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Thu, May 5, 2022 at 8:04 PM Rex-BC Chen wrote: > > Add MediaTek CCI devfreq node for MT8183. > > Signed-off-by: Andrew-sh.Cheng > Signed-off-by: Rex-BC Chen > Reviewed-by: AngeloGioacchino Del Regno > --- > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 4 ++++ > arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 4 ++++ > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 7 +++++++ > 3 files changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > index 8953dbf84f3e..7ac9864db9de 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > @@ -412,6 +412,10 @@ > > }; > > +&cci { > + proc-supply = <&mt6358_vproc12_reg>; > +}; > + > &cpu0 { > proc-supply = <&mt6358_vproc12_reg>; > }; > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > index 8d5bf73a9099..b035e06840e6 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > @@ -230,6 +230,10 @@ > status = "okay"; > }; > > +&cci { > + proc-supply = <&mt6358_vproc12_reg>; > +}; > + > &cpu0 { > proc-supply = <&mt6358_vproc12_reg>; > }; > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index cecf96b628b7..11caf3dd85cd 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -280,6 +280,13 @@ > }; > }; > > + cci: cci { > + compatible = "mediatek,mt8183-cci"; > + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; > + clock-names = "cci_clock"; Binding says there should be two clocks: the actual clock that drives CCI, and a stable "intermediate" clock to switch to during clock rate changes. So I think this should look like: clocks = <&mcucfg CLK_MCU_BUS_SEL>, <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; clock-names = "cci", "intermediate"; ChenYu > + operating-points-v2 = <&cci_opp>; > + }; > + > cpus { > #address-cells = <1>; > #size-cells = <0>; > -- > 2.18.0 > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9EEA2C433EF for ; Mon, 16 May 2022 05:36:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5AP+pDPRoHCmv0z9uotd284oMKMaLHOtmQC9MXx1PQg=; b=achGg57y5mt6M5 rLB0LuDpEcwsSPx/8aDsb8BZxHMHubO8rwdK6GfuGVxtcfDdPSFweKIhueRL171O4zntieGy1p2aL RHy/UecLLin7T8xwDOtR0JS9t21bajYi76C/lOW7Ja5KfyIseUPwU2E3XaQMyO3IAjzpHwdPgmq61 V5+Zfv4bzdMI8LTiWbKpokR0p9PZjNuxY9KG4eweqR0eaFIy3ONy5Uf2rJTh2/74UZun4J2YJZA8i RWWV8UfFEq3NraojfueeoANLEvUGFx79woFOOIAdr9Evsx7EroNXljWMkPAXerXB2oRWt6fsGgkyv /sK7T4ycqJ4lzNBIotng==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqTOO-0062Xk-0U; Mon, 16 May 2022 05:35:40 +0000 Received: from mail-ed1-x52b.google.com ([2a00:1450:4864:20::52b]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqTOJ-0062WG-H2 for linux-arm-kernel@lists.infradead.org; Mon, 16 May 2022 05:35:37 +0000 Received: by mail-ed1-x52b.google.com with SMTP id fd25so4208178edb.3 for ; Sun, 15 May 2022 22:35:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=c/IovKeDQ5OmYImuaDKw85Gvkz+g6dB9ube8wouUX0E=; b=GGajIGxKz4a1kdgVCnNp3TVY4oWNsaMBX25vD2wNxJjdlfjW0K2HSomOmhtNf8KlII I/KzDUxpS795xfRF8NdRofQwNVP/BcZW3gRgq5wCMrBCZXhJNS+FRleC+mG3irXz/3aO +mT31wgaBGkXLx4Qfi9CCUwCaASTGFEm4O6+Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=c/IovKeDQ5OmYImuaDKw85Gvkz+g6dB9ube8wouUX0E=; b=DBlBsNlk1tQSlT3ITD9UTeosdifzaFEqJy6jmDb1EFv/s22BOpAjKkiFYkhKAbPQps a6m9pqWU9nYgI0eInMuP+gmMD0LrUz6zhfzH5PbZgklD8O8I4LUdLsBttTERURHc57IB idqI4xPF1UNkt0ecL84v1x1LCZyqJ3T2fj9BwWA1TFXRxckRGuQk2qtpR4L15hr3Nttm 771Z8YODEB5rIwmD/5HRV/NfFWdaNLCXn6bIZ4xZsrTPYieUVOlDj43+3WOv0TZNJ74w tb8QLZDktEmkWEkQ8Dx++4JAOkYaUKRE/IMYXtdfFVyidvSJLgoXWlKZpKHb+CdjHyqM HFOw== X-Gm-Message-State: AOAM531F+pseILaLpN5+5WhmwGuuxRL2BAqtIngNRv2FBhf+MxdqudRC IDOpynoZURt/ooXZY1Im+bk2VkK7VVm6laBRqb85kg== X-Google-Smtp-Source: ABdhPJxkaaQU1pxAn/HNEptaZ1FK3UV5eSAHcvlMeQ1pJimMFp8UJ4ll80vonmeQUOiLh7XTmmmV9IDAbxXEwPO61wM= X-Received: by 2002:a05:6402:11cd:b0:427:bda5:542f with SMTP id j13-20020a05640211cd00b00427bda5542fmr11486167edw.290.1652679329459; Sun, 15 May 2022 22:35:29 -0700 (PDT) MIME-Version: 1.0 References: <20220505115226.20130-1-rex-bc.chen@mediatek.com> <20220505115226.20130-10-rex-bc.chen@mediatek.com> In-Reply-To: <20220505115226.20130-10-rex-bc.chen@mediatek.com> From: Chen-Yu Tsai Date: Mon, 16 May 2022 13:35:18 +0800 Message-ID: Subject: Re: [PATCH v6 09/10] arm64: dts: mediatek: Add MediaTek CCI node for MT8183 To: Rex-BC Chen Cc: rafael@kernel.org, viresh.kumar@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, matthias.bgg@gmail.com, jia-wei.chang@mediatek.com, roger.lu@mediatek.com, hsinyi@google.com, khilman@baylibre.com, angelogioacchino.delregno@collabora.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com, "Andrew-sh . Cheng" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220515_223535_600831_7BF3FF6E X-CRM114-Status: GOOD ( 18.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, May 5, 2022 at 8:04 PM Rex-BC Chen wrote: > > Add MediaTek CCI devfreq node for MT8183. > > Signed-off-by: Andrew-sh.Cheng > Signed-off-by: Rex-BC Chen > Reviewed-by: AngeloGioacchino Del Regno > --- > arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 4 ++++ > arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 4 ++++ > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 7 +++++++ > 3 files changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > index 8953dbf84f3e..7ac9864db9de 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts > @@ -412,6 +412,10 @@ > > }; > > +&cci { > + proc-supply = <&mt6358_vproc12_reg>; > +}; > + > &cpu0 { > proc-supply = <&mt6358_vproc12_reg>; > }; > diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > index 8d5bf73a9099..b035e06840e6 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi > @@ -230,6 +230,10 @@ > status = "okay"; > }; > > +&cci { > + proc-supply = <&mt6358_vproc12_reg>; > +}; > + > &cpu0 { > proc-supply = <&mt6358_vproc12_reg>; > }; > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index cecf96b628b7..11caf3dd85cd 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -280,6 +280,13 @@ > }; > }; > > + cci: cci { > + compatible = "mediatek,mt8183-cci"; > + clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; > + clock-names = "cci_clock"; Binding says there should be two clocks: the actual clock that drives CCI, and a stable "intermediate" clock to switch to during clock rate changes. So I think this should look like: clocks = <&mcucfg CLK_MCU_BUS_SEL>, <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; clock-names = "cci", "intermediate"; ChenYu > + operating-points-v2 = <&cci_opp>; > + }; > + > cpus { > #address-cells = <1>; > #size-cells = <0>; > -- > 2.18.0 > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel