From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45887) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yaoaj-0000XI-9R for qemu-devel@nongnu.org; Wed, 25 Mar 2015 12:55:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yaoai-00039l-37 for qemu-devel@nongnu.org; Wed, 25 Mar 2015 12:55:41 -0400 Received: from mail-yk0-x22c.google.com ([2607:f8b0:4002:c07::22c]:34284) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yaoah-00038n-L1 for qemu-devel@nongnu.org; Wed, 25 Mar 2015 12:55:39 -0400 Received: by ykfc206 with SMTP id c206so15974551ykf.1 for ; Wed, 25 Mar 2015 09:55:38 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1427131923-4670-4-git-send-email-afaerber@suse.de> References: <1427131923-4670-1-git-send-email-afaerber@suse.de> <1427131923-4670-4-git-send-email-afaerber@suse.de> Date: Wed, 25 Mar 2015 22:25:38 +0530 Message-ID: From: Bharata B Rao Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH RFC 3/4] pc: Create sockets and cores for CPUs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Andreas_F=C3=A4rber?= Cc: Paolo Bonzini , "Michael S. Tsirkin" , "qemu-devel@nongnu.org" , Richard Henderson On Mon, Mar 23, 2015 at 11:02 PM, Andreas F=C3=A4rber wr= ote: > Inline realized=3Dtrue from pc_new_cpu() so that the realization can be > deferred, as it would otherwise create a device[n] node. > > Signed-off-by: Andreas F=C3=A4rber > --- > hw/i386/pc.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++++--= ------ > 1 file changed, 58 insertions(+), 8 deletions(-) > > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index 2c48277..492c262 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -54,11 +54,14 @@ > #include "exec/memory.h" > #include "exec/address-spaces.h" > #include "sysemu/arch_init.h" > +#include "sysemu/cpus.h" > #include "qemu/bitmap.h" > #include "qemu/config-file.h" > #include "hw/acpi/acpi.h" > #include "hw/acpi/cpu_hotplug.h" > #include "hw/cpu/icc_bus.h" > +#include "hw/i386/cpu-socket.h" > +#include "hw/i386/cpu-core.h" > #include "hw/boards.h" > #include "hw/pci/pci_host.h" > #include "acpi-build.h" > @@ -990,6 +993,17 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, in= t level) > } > } > > +static inline size_t pc_cpu_core_size(void) > +{ > + return sizeof(X86CPUCore); > +} > + > +static inline X86CPUCore *pc_cpu_socket_get_core(X86CPUSocket *socket, > + unsigned int index) > +{ > + return &socket->core[index]; > +} > + > static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id, > DeviceState *icc_bridge, Error **errp) > { > @@ -1009,7 +1023,6 @@ static X86CPU *pc_new_cpu(const char *cpu_model, in= t64_t apic_id, > qdev_set_parent_bus(DEVICE(cpu), qdev_get_child_bus(icc_bridge, "icc= ")); > > object_property_set_int(OBJECT(cpu), apic_id, "apic-id", &local_err)= ; > - object_property_set_bool(OBJECT(cpu), true, "realized", &local_err); > > out: > if (local_err) { > @@ -1060,15 +1073,19 @@ void pc_hot_add_cpu(const int64_t id, Error **err= p) > error_propagate(errp, local_err); > return; > } > + object_property_set_bool(OBJECT(cpu), true, "realized", errp); > object_unref(OBJECT(cpu)); > } > > void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge) > { > - int i; > + int i, j, k; > + X86CPUSocket *socket; > + X86CPUCore *core; > X86CPU *cpu =3D NULL; > Error *error =3D NULL; > unsigned long apic_id_limit; > + int sockets, cpu_index =3D 0; > > /* init CPUs */ > if (cpu_model =3D=3D NULL) { > @@ -1087,14 +1104,41 @@ void pc_cpus_init(const char *cpu_model, DeviceSt= ate *icc_bridge) > exit(1); > } > > - for (i =3D 0; i < smp_cpus; i++) { > - cpu =3D pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), > - icc_bridge, &error); > + sockets =3D smp_cpus / smp_cores / smp_threads; > + for (i =3D 0; i < sockets; i++) { > + socket =3D g_malloc0(sizeof(*socket) + smp_cores * pc_cpu_core_s= ize()); > + object_initialize(socket, sizeof(*socket), TYPE_X86_CPU_SOCKET); > + OBJECT(socket)->free =3D g_free; > + > + for (j =3D 0; j < smp_cores; j++) { > + core =3D pc_cpu_socket_get_core(socket, j); > + object_initialize(core, sizeof(*core), TYPE_X86_CPU_CORE); > + object_property_add_child(OBJECT(socket), "core[*]", > + OBJECT(core), &error); > + if (error) { > + goto error; > + } > + > + for (k =3D 0; k < smp_threads; k++) { > + cpu =3D pc_new_cpu(cpu_model, > + x86_cpu_apic_id_from_index(cpu_index), > + icc_bridge, &error); > + if (error) { > + goto error; > + } > + object_property_add_child(OBJECT(core), "thread[*]", > + OBJECT(cpu), &error); > + object_unref(OBJECT(cpu)); > + if (error) { > + goto error; > + } > + cpu_index++; > + } > + } > + object_property_set_bool(OBJECT(socket), true, "realized", &erro= r); So you do in-place initialization as part of an "atomic" socket object. I am not sure why cores and threads should be allocated as part of socket object and initialized like above ? Do you see any problem with just instantiating the socket object and then let the instance_init routines of socket and cores to initialize the cores and threads like how I am doing for sPAPR ? + sockets =3D smp_cpus / smp_cores / smp_threads; + for (i =3D 0; i < sockets; i++) { + socket =3D object_new(TYPE_POWERPC_CPU_SOCKET); + object_property_set_bool(socket, true, "realized", &error_abort); } Ref: http://lists.gnu.org/archive/html/qemu-ppc/2015-03/msg00492.html Regards, Bharata.