From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758529AbcIHIcx (ORCPT ); Thu, 8 Sep 2016 04:32:53 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:41950 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758079AbcIHIcv (ORCPT ); Thu, 8 Sep 2016 04:32:51 -0400 MIME-Version: 1.0 In-Reply-To: <20160908082939.GJ8913@lukather> References: <20160906121837.7517-1-maxime.ripard@free-electrons.com> <20160906121837.7517-7-maxime.ripard@free-electrons.com> <20160908082939.GJ8913@lukather> From: Chen-Yu Tsai Date: Thu, 8 Sep 2016 16:32:25 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 6/7] clk: sunxi-ng: Add A23 CCU To: Maxime Ripard Cc: Chen-Yu Tsai , Mike Turquette , Stephen Boyd , Hans de Goede , Mylene Josserand , linux-clk , devicetree , linux-arm-kernel , linux-kernel , Thomas Petazzoni Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 8, 2016 at 4:29 PM, Maxime Ripard wrote: > On Wed, Sep 07, 2016 at 03:24:11PM +0800, Chen-Yu Tsai wrote: >> > + [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw, >> >> A23 manual and Allwinner sources say there is a bus gate for SPINLOCK. >> Tested it myself, and it indeed exists. > > Yes, sorry. It was supposed to be spinlock instead of msgbox. > >> > + [RST_BUS_SPINLOCK] = { 0x2c4, BIT(22) }, >> >> Allwinner sources say there is a reset control for MSGBOX. >> Tested it myself, and it indeed exists. > > However, the msgbox is mentionned nowhere in the datasheet. > > I'd prefer to be able to test that it actually works before adding it > to the clock driver. I did in fact test it. With reset asserted, writes get ignored, and reads produce all 0s. With the reset deasserted and clock enabled, reads give the default value and writes stick. Afterwards when I toggle the reset, the values revert to the default. ChenYu From mboxrd@z Thu Jan 1 00:00:00 1970 From: wens@csie.org (Chen-Yu Tsai) Date: Thu, 8 Sep 2016 16:32:25 +0800 Subject: [PATCH v2 6/7] clk: sunxi-ng: Add A23 CCU In-Reply-To: <20160908082939.GJ8913@lukather> References: <20160906121837.7517-1-maxime.ripard@free-electrons.com> <20160906121837.7517-7-maxime.ripard@free-electrons.com> <20160908082939.GJ8913@lukather> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, Sep 8, 2016 at 4:29 PM, Maxime Ripard wrote: > On Wed, Sep 07, 2016 at 03:24:11PM +0800, Chen-Yu Tsai wrote: >> > + [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw, >> >> A23 manual and Allwinner sources say there is a bus gate for SPINLOCK. >> Tested it myself, and it indeed exists. > > Yes, sorry. It was supposed to be spinlock instead of msgbox. > >> > + [RST_BUS_SPINLOCK] = { 0x2c4, BIT(22) }, >> >> Allwinner sources say there is a reset control for MSGBOX. >> Tested it myself, and it indeed exists. > > However, the msgbox is mentionned nowhere in the datasheet. > > I'd prefer to be able to test that it actually works before adding it > to the clock driver. I did in fact test it. With reset asserted, writes get ignored, and reads produce all 0s. With the reset deasserted and clock enabled, reads give the default value and writes stick. Afterwards when I toggle the reset, the values revert to the default. ChenYu