From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4785AC433B4 for ; Mon, 12 Apr 2021 10:33:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 23C2E6102A for ; Mon, 12 Apr 2021 10:33:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239348AbhDLKdj (ORCPT ); Mon, 12 Apr 2021 06:33:39 -0400 Received: from mail.kernel.org ([198.145.29.99]:47320 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238132AbhDLKdf (ORCPT ); Mon, 12 Apr 2021 06:33:35 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 2F59061249; Mon, 12 Apr 2021 10:33:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1618223597; bh=DI6Y5IaDG396+b13BKUebb20otLOdsYhFeHZfaDT9V4=; h=References:In-Reply-To:Reply-To:From:Date:Subject:To:Cc:From; b=X7jWGalE6o9E2WtBf29/CWgdQzpRBMTYxl+EbeZ2PjRhAHFbdbilQ48tXTFEzRnLP io3b5/xS/UQrSSGZ0uEH4LRw7+wm/iU1USYSmJbGajL71TGEg7ZO/vGl1zsgX8mj9v p6RBJDntm/0rpFYQSBjV8yGPZmEAjjt5LGIC2noL4X738OyZuH5UjSYnZ1t+174++H uPxyuHpwhH91Q2EFDsDJYeXsWsiE5yi3d81jPKLk1G6W/kU2lg0AJZhaR2Mc1w/EcU 5F3CtPzWmSDLaO4+vIUk2tHTRoJqe24m0gszc85b5Yq3vQgOBy/TXImag0KzyxLQxC yc4uEBdiwzxKA== Received: by mail-lj1-f175.google.com with SMTP id u20so14709292lja.13; Mon, 12 Apr 2021 03:33:17 -0700 (PDT) X-Gm-Message-State: AOAM531OcGEsnjf3mV2HGbiOV3FnKYDITbPa0pabk1g/Ug0W+OH69S8R bB03h8FHzAANaP3x9kIc0e3ijbnmP5d15fru+c0= X-Google-Smtp-Source: ABdhPJw4UvUUAcyRG4ixDjCJyFywXgHnShAa8N99RTa/8dJVp4vWCnF3DoBG5ylB2oKBUZnkwGZr8tJLGWeZ5bxiQks= X-Received: by 2002:a2e:7d04:: with SMTP id y4mr18002872ljc.94.1618223595500; Mon, 12 Apr 2021 03:33:15 -0700 (PDT) MIME-Version: 1.0 References: <20210411131007.21757-1-jbx6244@gmail.com> <20210411131007.21757-3-jbx6244@gmail.com> <31b5ff50-afe5-b446-7d3c-943d148814d8@gmail.com> In-Reply-To: <31b5ff50-afe5-b446-7d3c-943d148814d8@gmail.com> Reply-To: wens@kernel.org From: Chen-Yu Tsai Date: Mon, 12 Apr 2021 18:33:03 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 3/6] ARM: dts: rockchip: remove interrupts properties from pwm nodes rv1108.dtsi To: Johan Jonker Cc: =?UTF-8?Q?Heiko_St=C3=BCbner?= , Rob Herring , Thierry Reding , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Lee Jones , linux-pwm@vger.kernel.org, devicetree , linux-arm-kernel , "open list:ARM/Rockchip SoC..." , linux-kernel Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 12, 2021 at 6:03 PM Johan Jonker wrote: > > On 4/12/21 5:15 AM, Chen-Yu Tsai wrote: > > On Sun, Apr 11, 2021 at 9:11 PM Johan Jonker wrote: > >> > >> A test with the command below gives this error: > >> > >> /arch/arm/boot/dts/rv1108-evb.dt.yaml: > >> pwm@10280000: 'interrupts' does not match any of the regexes: > >> 'pinctrl-[0-9]+' > >> > >> "interrupts" is an undocumented property, so remove them > >> from pwm nodes in rv1108.dtsi. > >> > >> make ARCH=arm dtbs_check > >> DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > >> > >> Signed-off-by: Johan Jonker > > > > Given that the interrupts were specified, meaning they are wired up in hardware, > > shouldn't the solution be to add the interrupts property to the binding instead? > > > > After all, the device tree describes the actual hardware, not just what the > > implementations need. > > > > ChenYu > > > > Hi, > > The question of what to do with it was asked in version 1, but no answer > was given, so I made a proposal. > The device tree description should be complete, but also as lean as > possible. If someone manages to sneak in undocumented properties without > reason then the ultimate consequence should be removal I think. > > Not sure about the (missing?) rv1108 TRM, but for rk3328 the interrupt > is used for: > > PWM_INTSTS 0x0040 W 0x00000000 Interrupt Status Register > Channel Interrupt Polarity Flag > This bit is used in capture mode in order to identify the > transition of the input waveform when interrupt is generated. > Channel Interrupt Status > Interrupt generated > > PWM_INT_EN 0x0044 W 0x00000000 Interrupt Enable Register > Channel Interrupt Enable > > Is there any current realistic use/setup for it to convince rob+dt this > should be added to pwm-rockchip.yaml? Well, the PWM core has capture support, and pwm-sti implements it with interrupt support, so I guess there's at least a legitimate case for adding that to the binding. Whether someone has an actual use case for it and adds code to implement it is another story. > The rk3328 interrupt rkpwm_int seems shared between channels, but only > included to pwm3. What is the proper way for that? I guess the bigger question is why was the PWM controller split into four device nodes, instead of just one encompassing the whole block. Now we'd have to introduce a new binding to support capture mode and interrupts. In that case I agree with dropping the interrupts for now, as it just won't fit. But I would add this additional information to the commit message. Regards ChenYu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77269C43460 for ; Mon, 12 Apr 2021 10:33:43 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 113686121E for ; Mon, 12 Apr 2021 10:33:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 113686121E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; 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Mon, 12 Apr 2021 03:33:15 -0700 (PDT) MIME-Version: 1.0 References: <20210411131007.21757-1-jbx6244@gmail.com> <20210411131007.21757-3-jbx6244@gmail.com> <31b5ff50-afe5-b446-7d3c-943d148814d8@gmail.com> In-Reply-To: <31b5ff50-afe5-b446-7d3c-943d148814d8@gmail.com> From: Chen-Yu Tsai Date: Mon, 12 Apr 2021 18:33:03 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 3/6] ARM: dts: rockchip: remove interrupts properties from pwm nodes rv1108.dtsi To: Johan Jonker Cc: =?UTF-8?Q?Heiko_St=C3=BCbner?= , Rob Herring , Thierry Reding , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Lee Jones , linux-pwm@vger.kernel.org, devicetree , linux-arm-kernel , "open list:ARM/Rockchip SoC..." , linux-kernel X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210412_033319_216431_E6E54E9B X-CRM114-Status: GOOD ( 29.96 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: wens@kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On Mon, Apr 12, 2021 at 6:03 PM Johan Jonker wrote: > > On 4/12/21 5:15 AM, Chen-Yu Tsai wrote: > > On Sun, Apr 11, 2021 at 9:11 PM Johan Jonker wrote: > >> > >> A test with the command below gives this error: > >> > >> /arch/arm/boot/dts/rv1108-evb.dt.yaml: > >> pwm@10280000: 'interrupts' does not match any of the regexes: > >> 'pinctrl-[0-9]+' > >> > >> "interrupts" is an undocumented property, so remove them > >> from pwm nodes in rv1108.dtsi. > >> > >> make ARCH=arm dtbs_check > >> DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > >> > >> Signed-off-by: Johan Jonker > > > > Given that the interrupts were specified, meaning they are wired up in hardware, > > shouldn't the solution be to add the interrupts property to the binding instead? > > > > After all, the device tree describes the actual hardware, not just what the > > implementations need. > > > > ChenYu > > > > Hi, > > The question of what to do with it was asked in version 1, but no answer > was given, so I made a proposal. > The device tree description should be complete, but also as lean as > possible. If someone manages to sneak in undocumented properties without > reason then the ultimate consequence should be removal I think. > > Not sure about the (missing?) rv1108 TRM, but for rk3328 the interrupt > is used for: > > PWM_INTSTS 0x0040 W 0x00000000 Interrupt Status Register > Channel Interrupt Polarity Flag > This bit is used in capture mode in order to identify the > transition of the input waveform when interrupt is generated. > Channel Interrupt Status > Interrupt generated > > PWM_INT_EN 0x0044 W 0x00000000 Interrupt Enable Register > Channel Interrupt Enable > > Is there any current realistic use/setup for it to convince rob+dt this > should be added to pwm-rockchip.yaml? Well, the PWM core has capture support, and pwm-sti implements it with interrupt support, so I guess there's at least a legitimate case for adding that to the binding. Whether someone has an actual use case for it and adds code to implement it is another story. > The rk3328 interrupt rkpwm_int seems shared between channels, but only > included to pwm3. What is the proper way for that? I guess the bigger question is why was the PWM controller split into four device nodes, instead of just one encompassing the whole block. Now we'd have to introduce a new binding to support capture mode and interrupts. In that case I agree with dropping the interrupts for now, as it just won't fit. But I would add this additional information to the commit message. Regards ChenYu _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90698C433B4 for ; Mon, 12 Apr 2021 10:35:04 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 02C8B6121E for ; Mon, 12 Apr 2021 10:35:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 02C8B6121E Authentication-Results: mail.kernel.org; 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Mon, 12 Apr 2021 03:33:15 -0700 (PDT) MIME-Version: 1.0 References: <20210411131007.21757-1-jbx6244@gmail.com> <20210411131007.21757-3-jbx6244@gmail.com> <31b5ff50-afe5-b446-7d3c-943d148814d8@gmail.com> In-Reply-To: <31b5ff50-afe5-b446-7d3c-943d148814d8@gmail.com> From: Chen-Yu Tsai Date: Mon, 12 Apr 2021 18:33:03 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 3/6] ARM: dts: rockchip: remove interrupts properties from pwm nodes rv1108.dtsi To: Johan Jonker Cc: =?UTF-8?Q?Heiko_St=C3=BCbner?= , Rob Herring , Thierry Reding , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Lee Jones , linux-pwm@vger.kernel.org, devicetree , linux-arm-kernel , "open list:ARM/Rockchip SoC..." , linux-kernel X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210412_033319_216431_E6E54E9B X-CRM114-Status: GOOD ( 29.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: wens@kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Apr 12, 2021 at 6:03 PM Johan Jonker wrote: > > On 4/12/21 5:15 AM, Chen-Yu Tsai wrote: > > On Sun, Apr 11, 2021 at 9:11 PM Johan Jonker wrote: > >> > >> A test with the command below gives this error: > >> > >> /arch/arm/boot/dts/rv1108-evb.dt.yaml: > >> pwm@10280000: 'interrupts' does not match any of the regexes: > >> 'pinctrl-[0-9]+' > >> > >> "interrupts" is an undocumented property, so remove them > >> from pwm nodes in rv1108.dtsi. > >> > >> make ARCH=arm dtbs_check > >> DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > >> > >> Signed-off-by: Johan Jonker > > > > Given that the interrupts were specified, meaning they are wired up in hardware, > > shouldn't the solution be to add the interrupts property to the binding instead? > > > > After all, the device tree describes the actual hardware, not just what the > > implementations need. > > > > ChenYu > > > > Hi, > > The question of what to do with it was asked in version 1, but no answer > was given, so I made a proposal. > The device tree description should be complete, but also as lean as > possible. If someone manages to sneak in undocumented properties without > reason then the ultimate consequence should be removal I think. > > Not sure about the (missing?) rv1108 TRM, but for rk3328 the interrupt > is used for: > > PWM_INTSTS 0x0040 W 0x00000000 Interrupt Status Register > Channel Interrupt Polarity Flag > This bit is used in capture mode in order to identify the > transition of the input waveform when interrupt is generated. > Channel Interrupt Status > Interrupt generated > > PWM_INT_EN 0x0044 W 0x00000000 Interrupt Enable Register > Channel Interrupt Enable > > Is there any current realistic use/setup for it to convince rob+dt this > should be added to pwm-rockchip.yaml? Well, the PWM core has capture support, and pwm-sti implements it with interrupt support, so I guess there's at least a legitimate case for adding that to the binding. Whether someone has an actual use case for it and adds code to implement it is another story. > The rk3328 interrupt rkpwm_int seems shared between channels, but only > included to pwm3. What is the proper way for that? I guess the bigger question is why was the PWM controller split into four device nodes, instead of just one encompassing the whole block. Now we'd have to introduce a new binding to support capture mode and interrupts. In that case I agree with dropping the interrupts for now, as it just won't fit. But I would add this additional information to the commit message. Regards ChenYu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel