diff for duplicates of <CAGb2v65En4RbVdRu7c6MJUztVhC36dWr0kaO9bqc9PtuXAcsww@mail.gmail.com>

diff --git a/a/1.txt b/N1/1.txt
index 2d12827..54701f9 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-On Mon, Jun 25, 2018 at 8:02 PM, Jernej Skrabec <jernej.skrabec@siol.net> wrote:
+On Mon, Jun 25, 2018 at 8:02 PM, Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org> wrote:
 > Current DW HDMI PHY code never prepares and enables PHY clock after it is
 > created. It's just used as it is. This may work in some cases, but it's
 > clearly wrong. Fix it by adding proper calls to enable/disable PHY
@@ -6,12 +6,12 @@ On Mon, Jun 25, 2018 at 8:02 PM, Jernej Skrabec <jernej.skrabec@siol.net> wrote:
 >
 > Fixes: 4f86e81748fe ("drm/sun4i: Add support for H3 HDMI PHY variant")
 >
-> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+> Signed-off-by: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
 
 So why does it work on the H3? Because there's only one PLL that the whole
 display pipeline uses?
 
 We should probably tag this for stable. So,
 
-Cc: <stable@vger.kernel.org>
-Reviewed-by: Chen-Yu Tsai <wens@csie.org>
\ No newline at end of file
+Cc: <stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
+Reviewed-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
\ No newline at end of file
diff --git a/a/content_digest b/N1/content_digest
index 7da3441..06926fd 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -5,7 +5,10 @@
   "ref\00020180625120304.7543-17-jernej.skrabec\@siol.net\0"
 ]
 [
-  "From\0Chen-Yu Tsai <wens\@csie.org>\0"
+  "ref\00020180625120304.7543-17-jernej.skrabec-gGgVlfcn5nU\@public.gmane.org\0"
+]
+[
+  "From\0Chen-Yu Tsai <wens-jdAy2FN1RRM\@public.gmane.org>\0"
 ]
 [
   "Subject\0Re: [PATCH v3 16/24] drm/sun4i: Enable DW HDMI PHY clock\0"
@@ -14,22 +17,22 @@
   "Date\0Thu, 28 Jun 2018 10:22:36 +0800\0"
 ]
 [
-  "To\0Jernej Skrabec <jernej.skrabec\@siol.net>\0"
+  "To\0Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU\@public.gmane.org>\0"
 ]
 [
-  "Cc\0Maxime Ripard <maxime.ripard\@bootlin.com>",
-  " Rob Herring <robh+dt\@kernel.org>",
-  " David Airlie <airlied\@linux.ie>",
-  " Gustavo Padovan <gustavo\@padovan.org>",
-  " Maarten Lankhorst <maarten.lankhorst\@linux.intel.com>",
-  " Sean Paul <seanpaul\@chromium.org>",
-  " Mark Rutland <mark.rutland\@arm.com>",
-  " dri-devel <dri-devel\@lists.freedesktop.org>",
-  " devicetree <devicetree\@vger.kernel.org>",
-  " linux-arm-kernel <linux-arm-kernel\@lists.infradead.org>",
-  " linux-kernel <linux-kernel\@vger.kernel.org>",
-  " linux-clk <linux-clk\@vger.kernel.org>",
-  " linux-sunxi <linux-sunxi\@googlegroups.com>\0"
+  "Cc\0Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ\@public.gmane.org>",
+  " Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A\@public.gmane.org>",
+  " David Airlie <airlied-cv59FeDIM0c\@public.gmane.org>",
+  " Gustavo Padovan <gustavo-THi1TnShQwVAfugRpC6u6w\@public.gmane.org>",
+  " Maarten Lankhorst <maarten.lankhorst-VuQAYsv1563Yd54FQh9/CA\@public.gmane.org>",
+  " Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw\@public.gmane.org>",
+  " Mark Rutland <mark.rutland-5wv7dgnIgG8\@public.gmane.org>",
+  " dri-devel <dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW\@public.gmane.org>",
+  " devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org>",
+  " linux-arm-kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r\@public.gmane.org>",
+  " linux-kernel <linux-kernel-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org>",
+  " linux-clk <linux-clk-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org>",
+  " linux-sunxi <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw\@public.gmane.org>\0"
 ]
 [
   "\0000:1\0"
@@ -38,7 +41,7 @@
   "b\0"
 ]
 [
-  "On Mon, Jun 25, 2018 at 8:02 PM, Jernej Skrabec <jernej.skrabec\@siol.net> wrote:\n",
+  "On Mon, Jun 25, 2018 at 8:02 PM, Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU\@public.gmane.org> wrote:\n",
   "> Current DW HDMI PHY code never prepares and enables PHY clock after it is\n",
   "> created. It's just used as it is. This may work in some cases, but it's\n",
   "> clearly wrong. Fix it by adding proper calls to enable/disable PHY\n",
@@ -46,15 +49,15 @@
   ">\n",
   "> Fixes: 4f86e81748fe (\"drm/sun4i: Add support for H3 HDMI PHY variant\")\n",
   ">\n",
-  "> Signed-off-by: Jernej Skrabec <jernej.skrabec\@siol.net>\n",
+  "> Signed-off-by: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU\@public.gmane.org>\n",
   "\n",
   "So why does it work on the H3? Because there's only one PLL that the whole\n",
   "display pipeline uses?\n",
   "\n",
   "We should probably tag this for stable. So,\n",
   "\n",
-  "Cc: <stable\@vger.kernel.org>\n",
-  "Reviewed-by: Chen-Yu Tsai <wens\@csie.org>"
+  "Cc: <stable-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org>\n",
+  "Reviewed-by: Chen-Yu Tsai <wens-jdAy2FN1RRM\@public.gmane.org>"
 ]
 
-7dd449935abdaa6e14d555012ba47614c4f8822e18c7d8f842d05cf009d96d6a
+1c515155b2144edfdba653cc20d7a7fea2d70a527751b9e171f819a585422ea0
