From: Chen-Yu Tsai <wens@kernel.org> To: Stephen Boyd <sboyd@kernel.org> Cc: Chen-Yu Tsai <wens@kernel.org>, Maxime Ripard <maxime.ripard@bootlin.com>, Michael Turquette <mturquette@baylibre.com>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, linux-clk <linux-clk@vger.kernel.org>, linux-kernel <linux-kernel@vger.kernel.org> Subject: Re: [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1 Date: Tue, 11 Jun 2019 13:34:27 +0800 [thread overview] Message-ID: <CAGb2v65Y8u=EGfrgs5Km8tiT7QYiJpf8LTJH1QnVrDmPPRng8A@mail.gmail.com> (raw) In-Reply-To: <20190607184621.D5C3F212F5@mail.kernel.org> On Sat, Jun 8, 2019 at 2:46 AM Stephen Boyd <sboyd@kernel.org> wrote: > > Quoting Chen-Yu Tsai (2019-06-03 09:38:22) > > Hi Stephen, > > > > On Mon, May 20, 2019 at 5:03 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > On Mon, May 20, 2019 at 04:03:56PM +0800, Chen-Yu Tsai wrote: > > > > From: Chen-Yu Tsai <wens@csie.org> > > > > > > > > Hi everyone, > > > > > > > > This is series is the first part of a large series (I haven't done the > > > > rest) of patches to rewrite the clk parent relationship handling within > > > > the sunxi-ng clk driver. This is based on Stephen's recent work allowing > > > > clk drivers to specify clk parents using struct clk_hw * or parsing DT > > > > phandles in the clk node. > > > > > > > > This series can be split into a few major parts: > > > > > > > > 1) The first patch is a small fix for clk debugfs representation. This > > > > was done before commit 1a079560b145 ("clk: Cache core in > > > > clk_fetch_parent_index() without names") was posted, so it might or > > > > might not be needed. Found this when checking my work using > > > > clk_possible_parents. > > > > > > > > 2) A bunch of CLK_HW_INIT_* helper macros are added. These cover the > > > > situations I encountered, or assume I will encounter, such as single > > > > internal (struct clk_hw *) parent, single DT (struct clk_parent_data > > > > .fw_name), multiple internal parents, and multiple mixed (internal + > > > > DT) parents. A special variant for just an internal single parent is > > > > added, CLK_HW_INIT_HWS, which lets the driver share the singular > > > > list, instead of having the compiler create a compound literal every > > > > time. It might even make sense to only keep this variant. > > > > > > > > 3) A bunch of CLK_FIXED_FACTOR_* helper macros are added. The rationale > > > > is the same as the single parent CLK_HW_INIT_* helpers. > > > > > > > > 4) Bulk conversion of CLK_FIXED_FACTOR to use local parent references, > > > > either struct clk_hw * or DT .fw_name types, whichever the hardware > > > > requires. > > > > > > > > 5) The beginning of SUNXI_CCU_GATE conversion to local parent > > > > references. This part is not done. They are included as justification > > > > and examples for the shared list of clk parents case. > > > > > > That series is pretty neat. As far as sunxi is concerned, you can add my > > > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > > > > > > > I realize this is going to be many patches every time I convert a clock > > > > type. Going forward would the people involved prefer I send out > > > > individual patches like this series, or squash them all together? > > > > > > For bisection, I guess it would be good to keep the approach you've > > > had in this series. If this is really too much, I guess we can always > > > change oru mind later on. > > > > Any thoughts on this series and how to proceed? > > > > I have a few minor nitpicks but otherwise the series looks good to me. > I'm perfectly happy to see the individual patches unless you want to > squash them into one big patch. I can review the conversions either way. OK. Based on your and Maxime's response, I'll send them individually. > Did you need me to apply any patches here? Or can I assume you'll resend > with a pull request so it can be merged into clk-next? I can send them as part of our normal pull request. Or did you want this as a separate topic? I'll still send out a v2 to cover your review comments. > BTW, did you have to update any DT bindings or documentation? I didn't > see anything, so I'm a little surprised that all that stuff was already > in place. The bindings had the clocks / clock-names all defined, and the DT all had the properties, because we had already gone through one rewrite. It's just the driver didn't follow them properly, because the parents were cross node / driver, and we had these statically initialized parent name arrays. I had started work on having the driver rewrite the parents lists based on fetching clock names via DT, but it was far from elegant. Then this came up. :) Regards ChenYu
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wens@kernel.org> To: Stephen Boyd <sboyd@kernel.org> Cc: Maxime Ripard <maxime.ripard@bootlin.com>, Michael Turquette <mturquette@baylibre.com>, linux-kernel <linux-kernel@vger.kernel.org>, Chen-Yu Tsai <wens@kernel.org>, linux-clk <linux-clk@vger.kernel.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1 Date: Tue, 11 Jun 2019 13:34:27 +0800 [thread overview] Message-ID: <CAGb2v65Y8u=EGfrgs5Km8tiT7QYiJpf8LTJH1QnVrDmPPRng8A@mail.gmail.com> (raw) In-Reply-To: <20190607184621.D5C3F212F5@mail.kernel.org> On Sat, Jun 8, 2019 at 2:46 AM Stephen Boyd <sboyd@kernel.org> wrote: > > Quoting Chen-Yu Tsai (2019-06-03 09:38:22) > > Hi Stephen, > > > > On Mon, May 20, 2019 at 5:03 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > On Mon, May 20, 2019 at 04:03:56PM +0800, Chen-Yu Tsai wrote: > > > > From: Chen-Yu Tsai <wens@csie.org> > > > > > > > > Hi everyone, > > > > > > > > This is series is the first part of a large series (I haven't done the > > > > rest) of patches to rewrite the clk parent relationship handling within > > > > the sunxi-ng clk driver. This is based on Stephen's recent work allowing > > > > clk drivers to specify clk parents using struct clk_hw * or parsing DT > > > > phandles in the clk node. > > > > > > > > This series can be split into a few major parts: > > > > > > > > 1) The first patch is a small fix for clk debugfs representation. This > > > > was done before commit 1a079560b145 ("clk: Cache core in > > > > clk_fetch_parent_index() without names") was posted, so it might or > > > > might not be needed. Found this when checking my work using > > > > clk_possible_parents. > > > > > > > > 2) A bunch of CLK_HW_INIT_* helper macros are added. These cover the > > > > situations I encountered, or assume I will encounter, such as single > > > > internal (struct clk_hw *) parent, single DT (struct clk_parent_data > > > > .fw_name), multiple internal parents, and multiple mixed (internal + > > > > DT) parents. A special variant for just an internal single parent is > > > > added, CLK_HW_INIT_HWS, which lets the driver share the singular > > > > list, instead of having the compiler create a compound literal every > > > > time. It might even make sense to only keep this variant. > > > > > > > > 3) A bunch of CLK_FIXED_FACTOR_* helper macros are added. The rationale > > > > is the same as the single parent CLK_HW_INIT_* helpers. > > > > > > > > 4) Bulk conversion of CLK_FIXED_FACTOR to use local parent references, > > > > either struct clk_hw * or DT .fw_name types, whichever the hardware > > > > requires. > > > > > > > > 5) The beginning of SUNXI_CCU_GATE conversion to local parent > > > > references. This part is not done. They are included as justification > > > > and examples for the shared list of clk parents case. > > > > > > That series is pretty neat. As far as sunxi is concerned, you can add my > > > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > > > > > > > I realize this is going to be many patches every time I convert a clock > > > > type. Going forward would the people involved prefer I send out > > > > individual patches like this series, or squash them all together? > > > > > > For bisection, I guess it would be good to keep the approach you've > > > had in this series. If this is really too much, I guess we can always > > > change oru mind later on. > > > > Any thoughts on this series and how to proceed? > > > > I have a few minor nitpicks but otherwise the series looks good to me. > I'm perfectly happy to see the individual patches unless you want to > squash them into one big patch. I can review the conversions either way. OK. Based on your and Maxime's response, I'll send them individually. > Did you need me to apply any patches here? Or can I assume you'll resend > with a pull request so it can be merged into clk-next? I can send them as part of our normal pull request. Or did you want this as a separate topic? I'll still send out a v2 to cover your review comments. > BTW, did you have to update any DT bindings or documentation? I didn't > see anything, so I'm a little surprised that all that stuff was already > in place. The bindings had the clocks / clock-names all defined, and the DT all had the properties, because we had already gone through one rewrite. It's just the driver didn't follow them properly, because the parents were cross node / driver, and we had these statically initialized parent name arrays. I had started work on having the driver rewrite the parents lists based on fetching clock names via DT, but it was far from elegant. Then this came up. :) Regards ChenYu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-06-11 5:34 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-05-20 8:03 [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1 Chen-Yu Tsai 2019-05-20 8:03 ` Chen-Yu Tsai 2019-05-20 8:03 ` [PATCH 01/25] clk: Fix debugfs clk_possible_parents for clks without parent string names Chen-Yu Tsai 2019-05-20 8:03 ` Chen-Yu Tsai 2019-06-07 18:14 ` Stephen Boyd 2019-06-07 18:14 ` Stephen Boyd 2019-05-20 8:03 ` [PATCH 02/25] clk: Add CLK_HW_INIT_* macros using .parent_hws Chen-Yu Tsai 2019-05-20 8:03 ` Chen-Yu Tsai 2019-06-07 18:17 ` Stephen Boyd 2019-06-07 18:17 ` Stephen Boyd 2019-05-20 8:03 ` [PATCH 03/25] clk: Add CLK_HW_INIT_FW_NAME macro using .fw_name in .parent_data Chen-Yu Tsai 2019-05-20 8:03 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 04/25] clk: Add CLK_HW_INIT_PARENT_DATA macro using .parent_data Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 05/25] clk: fixed-factor: Add CLK_FIXED_FACTOR_HW which takes clk_hw pointer as parent Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 06/25] clk: fixed-factor: Add CLK_FIXED_FACTOR_HWS which takes list of struct clk_hw * Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 07/25] clk: fixed-factor: Add CLK_FIXED_FACTOR_FW_NAME for DT clock-names parent Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 08/25] clk: sunxi-ng: switch to of_clk_hw_register() for registering clks Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 09/25] clk: sunxi-ng: sun8i-r: Use local parent references for CLK_HW_INIT_* Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 10/25] clk: sunxi-ng: a10: Use local parent references for CLK_FIXED_FACTOR Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 11/25] clk: sunxi-ng: sun5i: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 12/25] clk: sunxi-ng: a31: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 13/25] clk: sunxi-ng: a23: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 14/25] clk: sunxi-ng: a33: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 15/25] clk: sunxi-ng: h3: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 16/25] clk: sunxi-ng: r40: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 17/25] clk: sunxi-ng: v3s: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 18/25] clk: sunxi-ng: sun8i-r: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 19/25] clk: sunxi-ng: f1c100s: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 20/25] clk: sunxi-ng: a64: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 21/25] clk: sunxi-ng: h6: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 22/25] clk: sunxi-ng: h6-r: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 23/25] clk: sunxi-ng: gate: Add macros for referencing local clock parents Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 24/25] clk: sunxi-ng: a80-usb: Use local parent references for SUNXI_CCU_GATE Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 8:04 ` [PATCH 25/25] clk: sunxi-ng: sun8i-r: " Chen-Yu Tsai 2019-05-20 8:04 ` Chen-Yu Tsai 2019-05-20 9:03 ` [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1 Maxime Ripard 2019-05-20 9:03 ` Maxime Ripard 2019-06-03 16:38 ` Chen-Yu Tsai 2019-06-03 16:38 ` Chen-Yu Tsai 2019-06-07 18:46 ` Stephen Boyd 2019-06-07 18:46 ` Stephen Boyd 2019-06-11 5:34 ` Chen-Yu Tsai [this message] 2019-06-11 5:34 ` Chen-Yu Tsai
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