From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen-Yu Tsai Subject: Re: [PATCH RESEND net-next v2 1/8] dt-bindings: net: dwmac-sun8i: Clean up clock delay chain descriptions Date: Sun, 13 May 2018 12:53:27 -0700 Message-ID: References: <20180513191425.9801-1-wens@csie.org> <20180513191425.9801-2-wens@csie.org> <20180513194919.GE12738@lunn.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Cc: Giuseppe Cavallaro , linux-arm-kernel , devicetree , netdev , Corentin Labbe , Icenowy Zheng , Maxime Ripard , Rob Herring To: Andrew Lunn Return-path: Received: from mail-wm0-f68.google.com ([74.125.82.68]:38084 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751295AbeEMTxu (ORCPT ); Sun, 13 May 2018 15:53:50 -0400 In-Reply-To: <20180513194919.GE12738@lunn.ch> Sender: netdev-owner@vger.kernel.org List-ID: On Sun, May 13, 2018 at 12:49 PM, Andrew Lunn wrote: > On Mon, May 14, 2018 at 03:14:18AM +0800, Chen-Yu Tsai wrote: >> The clock delay chains found in the glue layer for dwmac-sun8i are only >> used with RGMII PHYs. They are not intended for non-RGMII PHYs, such as >> MII external PHYs or the internal PHY. Also, a recent SoC has a smaller >> range of possible values for the delay chain. >> >> This patch reformats the delay chain section of the device tree binding >> to make it clear that the delay chains only apply to RGMII PHYs, and >> make it easier to add the R40-specific bits later. >> >> Signed-off-by: Chen-Yu Tsai >> Reviewed-by: Rob Herring >> Acked-by: Maxime Ripard >> --- >> Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 11 +++++++---- >> 1 file changed, 7 insertions(+), 4 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt >> index 3d6d5fa0c4d5..e04ce75e24a3 100644 >> --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt >> +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt >> @@ -28,10 +28,13 @@ Required properties: >> - allwinner,sun8i-a83t-system-controller >> >> Optional properties: >> -- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) >> -- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) >> -Both delay properties need to be a multiple of 100. They control the delay for >> -external PHY. >> +- allwinner,tx-delay-ps: TX clock delay chain value in ps. >> + Range is 0-700. Default is 0. >> +- allwinner,rx-delay-ps: RX clock delay chain value in ps. >> + Range is 0-3100. Default is 0. >> +Both delay properties need to be a multiple of 100. They control the >> +clock delay for external RGMII PHY. They do not apply to the internal >> +PHY or external non-RGMII PHYs. > > Hi Chen-Yu > > Are these delays the MAC applies? Not the PHY. It would be good to > make it clear here these are MAC imposed delays. Yes these are applied on the MAC side. Being described in the device tree bindings for the MAC, I thought this was implied to be the case? Are there known exceptions? Thanks ChenYu From mboxrd@z Thu Jan 1 00:00:00 1970 From: wens@csie.org (Chen-Yu Tsai) Date: Sun, 13 May 2018 12:53:27 -0700 Subject: [PATCH RESEND net-next v2 1/8] dt-bindings: net: dwmac-sun8i: Clean up clock delay chain descriptions In-Reply-To: <20180513194919.GE12738@lunn.ch> References: <20180513191425.9801-1-wens@csie.org> <20180513191425.9801-2-wens@csie.org> <20180513194919.GE12738@lunn.ch> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Sun, May 13, 2018 at 12:49 PM, Andrew Lunn wrote: > On Mon, May 14, 2018 at 03:14:18AM +0800, Chen-Yu Tsai wrote: >> The clock delay chains found in the glue layer for dwmac-sun8i are only >> used with RGMII PHYs. They are not intended for non-RGMII PHYs, such as >> MII external PHYs or the internal PHY. Also, a recent SoC has a smaller >> range of possible values for the delay chain. >> >> This patch reformats the delay chain section of the device tree binding >> to make it clear that the delay chains only apply to RGMII PHYs, and >> make it easier to add the R40-specific bits later. >> >> Signed-off-by: Chen-Yu Tsai >> Reviewed-by: Rob Herring >> Acked-by: Maxime Ripard >> --- >> Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 11 +++++++---- >> 1 file changed, 7 insertions(+), 4 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt >> index 3d6d5fa0c4d5..e04ce75e24a3 100644 >> --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt >> +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt >> @@ -28,10 +28,13 @@ Required properties: >> - allwinner,sun8i-a83t-system-controller >> >> Optional properties: >> -- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) >> -- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) >> -Both delay properties need to be a multiple of 100. They control the delay for >> -external PHY. >> +- allwinner,tx-delay-ps: TX clock delay chain value in ps. >> + Range is 0-700. Default is 0. >> +- allwinner,rx-delay-ps: RX clock delay chain value in ps. >> + Range is 0-3100. Default is 0. >> +Both delay properties need to be a multiple of 100. They control the >> +clock delay for external RGMII PHY. They do not apply to the internal >> +PHY or external non-RGMII PHYs. > > Hi Chen-Yu > > Are these delays the MAC applies? Not the PHY. It would be good to > make it clear here these are MAC imposed delays. Yes these are applied on the MAC side. Being described in the device tree bindings for the MAC, I thought this was implied to be the case? Are there known exceptions? Thanks ChenYu