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Mon, 14 Dec 2020 09:49:08 -0800 (PST) MIME-Version: 1.0 References: <20201211222223.2252172-1-wuhaotsh@google.com> <20201211222223.2252172-4-wuhaotsh@google.com> <2d6eca6e-1690-8411-51c2-c0e7f8e8d677@amsat.org> In-Reply-To: <2d6eca6e-1690-8411-51c2-c0e7f8e8d677@amsat.org> Date: Mon, 14 Dec 2020 09:48:56 -0800 Message-ID: Subject: Re: [PATCH v2 3/4] hw/adc: Add an ADC module for NPCM7XX To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Content-Type: multipart/alternative; boundary="000000000000469f1305b67042ca" Received-SPF: pass client-ip=2a00:1450:4864:20::144; envelope-from=wuhaotsh@google.com; helo=mail-lf1-x144.google.com X-Spam_score_int: -175 X-Spam_score: -17.6 X-Spam_bar: ----------------- X-Spam_report: (-17.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, ENV_AND_HDR_SPF_MATCH=-0.5, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5, USER_IN_DEF_SPF_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , minyard@acm.org, Patrick Venture , QEMU Developers , Havard Skinnemoen , CS20 KFTing , qemu-arm , IS20 Avi Fishman Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reply-to: Hao Wu From: Hao Wu via --000000000000469f1305b67042ca Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Thanks for your comment! We'll incorporate them into our next patch version= . We plan to let the user use QOM get/set QMP commands to control ADC/PWM values, similar to hw/misc/tmp105.c. The user can set a voltage value as input using QOM-set, and the QEMU guest can read the converted value through this module. Similar for PWM, the user can read the duty-cycle and frequency using QOM-get. The user can also run a third-party simulator and alter these values during execution. Our test code also shows how to deal with these values. If you have a better suggestion, please let us know. On Sun, Dec 13, 2020 at 3:47 AM Philippe Mathieu-Daud=C3=A9 wrote: > On 12/11/20 11:22 PM, Hao Wu via wrote: > > The ADC is part of NPCM7XX Module. Its behavior is controled by the > > ADC_CON register. It converts one of the eight analog inputs into a > > digital input and stores it in the ADC_DATA register when enabled. > > > > Reviewed-by: Havard Skinnemoen > > Reviewed-by: Tyrone Ting > > Signed-off-by: Hao Wu > > --- > > docs/system/arm/nuvoton.rst | 2 +- > > hw/adc/meson.build | 1 + > > hw/adc/npcm7xx_adc.c | 318 ++++++++++++++++++++++++++ > > hw/arm/npcm7xx.c | 24 +- > > include/hw/adc/npcm7xx_adc.h | 72 ++++++ > > include/hw/arm/npcm7xx.h | 2 + > > tests/qtest/meson.build | 3 +- > > tests/qtest/npcm7xx_adc-test.c | 400 +++++++++++++++++++++++++++++++++ > > 8 files changed, 819 insertions(+), 3 deletions(-) > > create mode 100644 hw/adc/npcm7xx_adc.c > > create mode 100644 include/hw/adc/npcm7xx_adc.h > > create mode 100644 tests/qtest/npcm7xx_adc-test.c > ... > > > +static void npcm7xx_adc_init(Object *obj) > > +{ > > + NPCM7xxADCState *s =3D NPCM7XX_ADC(obj); > > + SysBusDevice *sbd =3D &s->parent; > > + int i; > > + > > + sysbus_init_irq(sbd, &s->irq); > > + > > + timer_init_ns(&s->conv_timer, QEMU_CLOCK_VIRTUAL, > > + npcm7xx_adc_convert_done, s); > > + timer_init_ns(&s->reset_timer, QEMU_CLOCK_VIRTUAL, > > + npcm7xx_adc_reset_done, s); > > + memory_region_init_io(&s->iomem, obj, &npcm7xx_adc_ops, s, > > + TYPE_NPCM7XX_ADC, 4 * KiB); > > + sysbus_init_mmio(sbd, &s->iomem); > > + s->clock =3D qdev_init_clock_in(DEVICE(s), "clock", NULL, NULL); > > + > > + for (i =3D 0; i < NPCM7XX_ADC_NUM_INPUTS; ++i) { > > + object_property_add_uint32_ptr(obj, "adci[*]", > > + &s->adci[i], OBJ_PROP_FLAG_WRITE); > > How do you use this, any example? > > FWIW I'm experimenting with other ADC to use the "audio/audio.h" > API (which is not voice/audio specific, but generic DSP), then > I can pass any QEMU source and consume it using AUD_read() to fill > the ADC buffer (device sram or in main ram). > > But I'm doing that alone during my free time, so don't expect it > any time soon :( > > > + } > > + object_property_add_uint32_ptr(obj, "vref", > > + &s->vref, OBJ_PROP_FLAG_WRITE); > > + npcm7xx_adc_calibrate(s); > > +} > --000000000000469f1305b67042ca Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Thanks for your comment! We'll incorporate them into o= ur next patch version.

We plan to let the user use QOM g= et/set QMP commands to control ADC/PWM values, similar to hw/misc/tmp105.c.= The user can set a voltage value as input using QOM-set, and the QEMU gues= t can read the converted value through this module. Similar for PWM, the us= er can read the duty-cycle and frequency using QOM-get. The user can also r= un a third-party simulator and alter these values during execution. Our tes= t code also shows how to deal with these values.

I= f you have a better suggestion, please let us know.

On Sun, Dec 13, 20= 20 at 3:47 AM Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org> wrote:
On 12/11/20 11:22 PM, Hao Wu via wro= te:
> The ADC is part of NPCM7XX Module. Its behavior is controled by the > ADC_CON register. It converts one of the eight analog inputs into a > digital input and stores it in the ADC_DATA register when enabled.
>
> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
> Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
> Signed-off-by: Hao Wu <wuhaotsh@google.com>
> ---
>=C2=A0 docs/system/arm/nuvoton.rst=C2=A0 =C2=A0 |=C2=A0 =C2=A02 +-
>=C2=A0 hw/adc/meson.build=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0|=C2=A0 =C2=A01 +
>=C2=A0 hw/adc/npcm7xx_adc.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0| 3= 18 ++++++++++++++++++++++++++
>=C2=A0 hw/arm/npcm7xx.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0|=C2=A0 24 +-
>=C2=A0 include/hw/adc/npcm7xx_adc.h=C2=A0 =C2=A0|=C2=A0 72 ++++++
>=C2=A0 include/hw/arm/npcm7xx.h=C2=A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 =C2= =A02 +
>=C2=A0 tests/qtest/meson.build=C2=A0 =C2=A0 =C2=A0 =C2=A0 |=C2=A0 =C2= =A03 +-
>=C2=A0 tests/qtest/npcm7xx_adc-test.c | 400 +++++++++++++++++++++++++++= ++++++
>=C2=A0 8 files changed, 819 insertions(+), 3 deletions(-)
>=C2=A0 create mode 100644 hw/adc/npcm7xx_adc.c
>=C2=A0 create mode 100644 include/hw/adc/npcm7xx_adc.h
>=C2=A0 create mode 100644 tests/qtest/npcm7xx_adc-test.c
...

> +static void npcm7xx_adc_init(Object *obj)
> +{
> +=C2=A0 =C2=A0 NPCM7xxADCState *s =3D NPCM7XX_ADC(obj);
> +=C2=A0 =C2=A0 SysBusDevice *sbd =3D &s->parent;
> +=C2=A0 =C2=A0 int i;
> +
> +=C2=A0 =C2=A0 sysbus_init_irq(sbd, &s->irq);
> +
> +=C2=A0 =C2=A0 timer_init_ns(&s->conv_timer, QEMU_CLOCK_VIRTUAL= ,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 npcm7xx_adc_convert_done, s= );
> +=C2=A0 =C2=A0 timer_init_ns(&s->reset_timer, QEMU_CLOCK_VIRTUA= L,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 npcm7xx_adc_reset_done, s);=
> +=C2=A0 =C2=A0 memory_region_init_io(&s->iomem, obj, &npcm7= xx_adc_ops, s,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 TYPE_NPCM7XX_ADC, 4 * KiB);
> +=C2=A0 =C2=A0 sysbus_init_mmio(sbd, &s->iomem);
> +=C2=A0 =C2=A0 s->clock =3D qdev_init_clock_in(DEVICE(s), "clo= ck", NULL, NULL);
> +
> +=C2=A0 =C2=A0 for (i =3D 0; i < NPCM7XX_ADC_NUM_INPUTS; ++i) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 object_property_add_uint32_ptr(obj, "= ;adci[*]",
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 &s->ad= ci[i], OBJ_PROP_FLAG_WRITE);

How do you use this, any example?

FWIW I'm experimenting with other ADC to use the "audio/audio.h&qu= ot;
API (which is not voice/audio specific, but generic DSP), then
I can pass any QEMU source and consume it using AUD_read() to fill
the ADC buffer (device sram or in main ram).

But I'm doing that alone during my free time, so don't expect it any time soon :(

> +=C2=A0 =C2=A0 }
> +=C2=A0 =C2=A0 object_property_add_uint32_ptr(obj, "vref", > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 &s->vref, OBJ_PROP_F= LAG_WRITE);
> +=C2=A0 =C2=A0 npcm7xx_adc_calibrate(s);
> +}
--000000000000469f1305b67042ca--