From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=bytedance.com (client-ip=2a00:1450:4864:20::142; helo=mail-lf1-x142.google.com; envelope-from=yulei.sh@bytedance.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=bytedance.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=bytedance-com.20150623.gappssmtp.com header.i=@bytedance-com.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=lhTd8dEO; dkim-atps=neutral Received: from mail-lf1-x142.google.com (mail-lf1-x142.google.com [IPv6:2a00:1450:4864:20::142]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Brx013RrZzDqCs for ; Wed, 16 Sep 2020 20:18:56 +1000 (AEST) Received: by mail-lf1-x142.google.com with SMTP id b12so6343364lfp.9 for ; Wed, 16 Sep 2020 03:18:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=csIwAabSYDj7rcpRTTD+orxcNqW1qSuuLquwhQ5NQD0=; b=lhTd8dEOCBqOBh8YCLPWAAvUbXxlQPV/DfiftcWR6EPU7Jx7KqEtUxjU0mkf8UCFPY hjbV84fksRSJgvChHzMWk/IbcpAqYpsgPqZdT47B4hBODnVAksalbxxcTFCky/hBOXzg TA5frC+MtoohvXzDeDkHcBAf9IEuh34b0oyjTPPGwic16yUMMhGihL4jHmYBs+qNLA+w uPmmvAsjA4x3Hv4c/I4ayj6gtLT0SaJfR4cig95iotuwwxSk0rI3Zj4Gi3xOucOTTOgW FGli1J/+xzyCJ33fdQLSTrTklhsazcFHVVoHwMma/be705P5cosAB9pVoM5HTGlPi/Dy xclQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=csIwAabSYDj7rcpRTTD+orxcNqW1qSuuLquwhQ5NQD0=; b=Sb7Xj4/2GVBLAknXiSU2A+1EGNAG2DLA1wOMdw7VVutKnZ+S2vwyb9H/MeCC3tAYbG uvjiKaagQ8UqWhOHH7w6MnzVqyo/jtBo1uReWbz96h/AtkEHwoL2MwyZFAszn5Aaq5Qt L31o+zgIzTAIfSKlLN3OuhcSDsNbD+rlFMfcFlaGhZwNe413FexZRLAX9VxFf19E8DlM QbX6YNXPxUCOlrWxOnL8xD0VvV8ewf0I6lJAeq7u+7XMeY31Rti3H7ItFXdcrpzaXM5N yDItXhS8W8dYs5ZZRzJPPydeITVdbr+VkKUiA0AC+2MIjDiAunzvQyyJxfXAOxKYXIWz LLXA== X-Gm-Message-State: AOAM532x7RRR5rtpdoyA3ylZkj56H/eoS13JV4HOg6o1tvV5N+cjmkr1 ap3PuYclpTe+ISEA/cbi+8AvlfprjcOio03jOl8hew== X-Google-Smtp-Source: ABdhPJw2kRKTDUO/AdshPJJJJsc9z4qH8bTKQwWN4weIgrc1MNEun+cOkNClQlL7VjvW3ccHdCXRUQ15JO6oe3hyBLU= X-Received: by 2002:a19:c645:: with SMTP id w66mr7534634lff.112.1600251531410; Wed, 16 Sep 2020 03:18:51 -0700 (PDT) MIME-Version: 1.0 References: <636cd7a2-8b60-2868-104f-70378bf30a08@yadro.com> <9ae6b1f98e354503aab6ed1af5452e8cffba7d7f.camel@yadro.com> <27aecca09a3f74d12974bfafde830ded5d69a7e0.camel@yadro.com> In-Reply-To: <27aecca09a3f74d12974bfafde830ded5d69a7e0.camel@yadro.com> From: Lei Yu Date: Wed, 16 Sep 2020 18:18:40 +0800 Message-ID: Subject: Re: Design proposal for dual BMC flash with "golden image" To: Ivan Mikhaylov Cc: Alexander Amelkin , openbmc Content-Type: text/plain; charset="UTF-8" X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Sep 2020 10:18:58 -0000 On Wed, Sep 16, 2020 at 5:55 PM Ivan Mikhaylov wrote: > > For now, we use "devmem" to manipulate the registers for testing purpose. > > It's nice to have that driver, but in productions there will be no > > need to use devmem nor the ioctl on watchdog, so it's not a must for > > us to use the driver. > > > > And how you switch safely into golden side in this case? > The plan is: 1. When the primary flash is broken and u-boot could not be started, aspeed will switch to the golden side automatically. 2. When the primary flash's u-boot is OK, but the kernel/rofs fails a couple of times, the u-boot could detect this and switch to the golden side by setting the related registers. See example in https://github.com/openbmc/openbmc/blob/master/meta-phosphor/aspeed-layer/recipes-bsp/u-boot/files/0005-config-ast-common-Fall-back-to-secondary-flash-on-fa.patch