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Date: Wed, 17 Apr 2013 10:01:47 -0400
Message-ID: <CAH3drwZ=0iXJwXrZdVUngpwddsu9yj5HCdCcWJuXtz8p=sMWpA@mail.gmail.com>
Subject: Re: [LSF/MM TOPIC] Hardware initiated paging of user process pages,
 hardware access to the CPU page tables of user processes
From: Jerome Glisse <j.glisse@gmail.com>
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To: Simon Jeons <simon.jeons@gmail.com>
Cc: Shachar Raindel <raindel@mellanox.com>, lsf-pc@lists.linux-foundation.org, linux-mm@kvack.org, Andrea Arcangeli <aarcange@redhat.com>, Roland Dreier <roland@purestorage.com>, Haggai Eran <haggaie@mellanox.com>, Or Gerlitz <ogerlitz@mellanox.com>, Sagi Grimberg <sagig@mellanox.com>, Liran Liss <liranl@mellanox.com>

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On Tue, Apr 16, 2013 at 7:50 PM, Simon Jeons <simon.jeons@gmail.com> wrote:

> On 04/17/2013 12:27 AM, Jerome Glisse wrote:
>
> [snip]
>
>
>>
>> As i said this is for pre-filling already present entry, ie pte that are
>> present with a valid page (no special bit set). This is an optimization so
>> that the GPU can pre-fill its tlb without having to take any mmap_sem. Hope
>> is that in most common case this will be enough, but in some case you will
>> have to go through the lengthy non fast gup.
>>
>
> I know this. What I concern is the pte you mentioned is for normal cpu,
> correct? How can you pre-fill pte and tlb of GPU?
>

You getting confuse, idea is to look at cpu pte and prefill gpu pte. I do
not prefill cpu pte, if a cpu pte is valid then i use the page it point to
prefill the GPU pte.

So i don't pre-fill CPU PTE and TLB GPU, i pre-fill GPU PTE from CPU PTE if
CPU PTE is valid. Other GPU PTE are marked as invalid and will trigger a
fault that will be handle using gup that will fill CPU PTE (if fault happen
at a valid address) at which point GPU PTE is updated or error is reported
if fault happened at an invalid address.

Cheers,
Jerome

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<div class=3D"gmail_quote">On Tue, Apr 16, 2013 at 7:50 PM, Simon Jeons <sp=
an dir=3D"ltr">&lt;<a href=3D"mailto:simon.jeons@gmail.com" target=3D"_blan=
k">simon.jeons@gmail.com</a>&gt;</span> wrote:<br><blockquote class=3D"gmai=
l_quote" style=3D"margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left=
:1ex">
On 04/17/2013 12:27 AM, Jerome Glisse wrote:<br>
<br>
[snip]<div class=3D"im"><br>
<blockquote class=3D"gmail_quote" style=3D"margin:0 0 0 .8ex;border-left:1p=
x #ccc solid;padding-left:1ex">
<br>
<br>
As i said this is for pre-filling already present entry, ie pte that are pr=
esent with a valid page (no special bit set). This is an optimization so th=
at the GPU can pre-fill its tlb without having to take any mmap_sem. Hope i=
s that in most common case this will be enough, but in some case you will h=
ave to go through the lengthy non fast gup.<br>

</blockquote>
<br></div>
I know this. What I concern is the pte you mentioned is for normal cpu, cor=
rect? How can you pre-fill pte and tlb of GPU?<br></blockquote></div><br>Yo=
u getting confuse, idea is to look at cpu pte and prefill gpu pte. I do not=
 prefill cpu pte, if a cpu pte is valid then i use the page it point to pre=
fill the GPU pte.<br>
<br>So i don&#39;t pre-fill CPU PTE and TLB GPU, i pre-fill GPU PTE from CP=
U PTE if CPU PTE is valid. Other GPU PTE are marked as invalid and will tri=
gger a fault that will be handle using gup that will fill CPU PTE (if fault=
 happen at a valid address) at which point GPU PTE is updated or error is r=
eported if fault happened at an invalid address.<br>
<br>Cheers,<br>Jerome<br>

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