From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48905) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bBOOn-0006E8-Jq for qemu-devel@nongnu.org; Fri, 10 Jun 2016 11:31:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bBOOj-0000w0-LB for qemu-devel@nongnu.org; Fri, 10 Jun 2016 11:31:05 -0400 Received: from mail-it0-x242.google.com ([2607:f8b0:4001:c0b::242]:33485) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bBOOj-0000vs-EC for qemu-devel@nongnu.org; Fri, 10 Jun 2016 11:31:01 -0400 Received: by mail-it0-x242.google.com with SMTP id i6so2646053ith.0 for ; Fri, 10 Jun 2016 08:31:00 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <871t45gjdl.fsf@linaro.org> References: <20160526163549.3276-1-a.rigo@virtualopensystems.com> <871t45gjdl.fsf@linaro.org> From: alvise rigo Date: Fri, 10 Jun 2016 17:30:45 +0200 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC 00/10] MTTCG: Slow-path for atomic insns List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?QWxleCBCZW5uw6ll?= Cc: MTTCG Devel , QEMU Developers , Jani Kokkonen , Claudio Fontana , VirtualOpenSystems Technical Team , =?UTF-8?B?S09OUkFEIEZyw6lkw6lyaWM=?= , Paolo Bonzini , Richard Henderson , Sergey Fedorov , "Emilio G. Cota" , Peter Maydell I might have broken something while rebasing on top of enable-mttcg-for-armv7-v1. I will sort this problem out. Thank you, alvise On Fri, Jun 10, 2016 at 5:21 PM, Alex Benn=C3=A9e = wrote: > > Alvise Rigo writes: > >> Hi, >> >> This series ports the latest iteration of the LL/SC work on top of the >> latest MTTCG reference branch posted recently by Alex. >> >> These patches apply on top of the following series: >> >> - [RFC v1 00/12] Enable MTTCG for 32 bit arm on x86 >> https://github.com/stsquad/qemu/tree/mttcg/enable-mttcg-for-armv7-v1 >> - [RFC v8 00/14] Slow-path for atomic instruction translation >> https://git.virtualopensystems.com/dev/qemu-mt/tree/\ >> slowpath-for-atomic-v8-no-mttcg - only minor changes have been necessa= ry >> - Few recent patches from Emilio regarding the spinlock implementation >> >> Overall, these patches allow the LL/SC infrastructure to work in multi-t= hreaded >> mode (patches 01-02-04) and make TLB flushes to other VCPUs safe. >> >> Patch 03 introduces a new API to submit a work item to a VCPU and wait f= or its >> completion. This API is used to query TLB flushes that result from the >> emulation of some ARM instructions. Patches 07, 08 and 09 modify the cur= rent >> tlb_flush_* functions to use the new API. Patch 10 fixes a rare hang th= at I >> was experiencing with this branch. >> >> The whole work can be fetched from the following repository: >> git@git.virtualopensystems.com:dev/qemu-mt.git >> at the branch "slowpath-for-atomic-v8-mttcg". > > Hmm this branch has build failures for linux-user and other > architectures. Is this the latest one? > >> >> Alvise Rigo (10): >> exec: Introduce tcg_exclusive_{lock,unlock}() >> softmmu_llsc_template.h: Move to multi-threading >> cpus: Introduce async_wait_run_on_cpu() >> cputlb: Introduce tlb_flush_other() >> target-arm: End TB after ldrex instruction >> cputlb: Add tlb_tables_flush_bitmap() >> cputlb: Query tlb_flush_by_mmuidx >> cputlb: Query tlb_flush_page_by_mmuidx >> cputlb: Query tlb_flush_page_all >> cpus: Do not sleep if some work item is pending >> >> cpus.c | 48 ++++++++++- >> cputlb.c | 202 ++++++++++++++++++++++++++++++++++----= ------- >> exec.c | 18 ++++ >> include/exec/exec-all.h | 13 +-- >> include/qom/cpu.h | 36 ++++++++ >> softmmu_llsc_template.h | 13 ++- >> softmmu_template.h | 6 ++ >> target-arm/helper.c | 79 +++++++++--------- >> target-arm/op_helper.c | 6 ++ >> target-arm/translate-a64.c | 2 + >> target-arm/translate.c | 2 + >> 11 files changed, 327 insertions(+), 98 deletions(-) > > > -- > Alex Benn=C3=A9e