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Thu, 15 Dec 2022 01:47:03 -0800 (PST) MIME-Version: 1.0 References: <20221214203124.564537-1-bhupesh.sharma@linaro.org> <20221214203124.564537-4-bhupesh.sharma@linaro.org> In-Reply-To: From: Bhupesh Sharma Date: Thu, 15 Dec 2022 15:16:51 +0530 Message-ID: Subject: Re: [PATCH v2 3/3] arm64: dts: qcom: sm6115: Add USB SS qmp phy node To: Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, agross@kernel.org, bhupesh.linux@gmail.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, konrad.dybcio@linaro.org, andersson@kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu, 15 Dec 2022 at 13:49, Krzysztof Kozlowski wrote: > > On 14/12/2022 21:31, Bhupesh Sharma wrote: > > Add USB superspeed qmp phy node to dtsi. > > Make sure that the oneplus board dts (which includes the > > sm4250.dtsi) continues to work as intended. > > > > Signed-off-by: Bhupesh Sharma > > --- > > .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++ > > arch/arm64/boot/dts/qcom/sm6115.dtsi | 38 ++++++++++++++++++- > > 2 files changed, 39 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > > index 3f39f25e0721e..4f0d65574448b 100644 > > --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > > +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts > > @@ -232,6 +232,9 @@ &usb { > > &usb_dwc3 { > > maximum-speed = "high-speed"; > > dr_mode = "peripheral"; > > + > > + phys = <&usb_hsphy>; > > + phy-names = "usb2-phy"; > > }; > > > > &usb_hsphy { > > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > > index e4ce135264f3d..15f311dcd289f 100644 > > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > > @@ -579,6 +579,40 @@ usb_hsphy: phy@1613000 { > > status = "disabled"; > > }; > > > > + usb_qmpphy: phy@1615000 { > > + compatible = "qcom,sm6115-qmp-usb3-phy"; > > + reg = <0x01615000 0x200>; > > + clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, > > + <&gcc GCC_USB3_PRIM_CLKREF_CLK>, > > + <&gcc GCC_AHB2PHY_USB_CLK>; > > + clock-names = "com_aux", > > + "ref", > > + "cfg_ahb"; > > + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>, > > + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>; > > + reset-names = "phy", "phy_phy"; > > + status = "disabled"; > > + #clock-cells = <1>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges; > > + > > + usb_ssphy: phy@1615200 { > > + reg = <0x01615200 0x200>, > > + <0x01615400 0x200>, > > + <0x01615c00 0x400>, > > + <0x01615600 0x200>, > > + <0x01615800 0x200>, > > + <0x01615a00 0x100>; > > + #phy-cells = <0>; > > + #clock-cells = <1>; > > + clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; > > + clock-names = "pipe0"; > > + clock-output-names = "usb3_phy_pipe_clk_src"; > > + }; > > + }; > > + > > + > > Still two blank lines. Ok, I have sent a fixed v3. Please help review. Thanks, Bhupesh