From mboxrd@z Thu Jan 1 00:00:00 1970 From: Adam Ford Date: Wed, 3 Apr 2019 06:36:28 -0500 Subject: [U-Boot] [PATCH] ARM: imx6q_logic: Correct phy fixup for broken ethernet In-Reply-To: References: <20190112233200.19112-1-aford173@gmail.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, Apr 2, 2019 at 11:58 PM Jagan Teki wrote: > > Hi Adam, > > On Sun, Jan 13, 2019 at 5:02 AM Adam Ford wrote: > > > > The Ethernet has been broken for some time. This patch unifies > > this board with a few others that use a similar approach to > > enabling phy. This fixes ar8031 Ethernet controller so it works. > > > > Signed-off-by: Adam Ford > > > > diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c > > index cda76a8084..eb4849117d 100644 > > --- a/board/logicpd/imx6/imx6logic.c > > +++ b/board/logicpd/imx6/imx6logic.c > > @@ -60,57 +60,6 @@ static iomux_v3_cfg_t const uart3_pads[] = { > > MX6_PAD_EIM_EB3__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), > > }; > > > > -#ifndef CONFIG_SPL_BUILD > > -static void fixup_enet_clock(void) > > -{ > > - struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; > > - struct gpio_desc nint; > > - struct gpio_desc reset; > > - int ret; > > - > > - /* Set Ref Clock to 50 MHz */ > > - enable_fec_anatop_clock(0, ENET_50MHZ); > > I just wonder why the fec working w/o ene_ref set rate to 50MHz, any idea? The original source was setup for a different ethernet controller 100Mb instead of 1000Mb. I got a bit ahead of myself when I pushed the original board to U-Boot, but I thought it was going to market sooner. That revision of the board was never released, and eventually Logic PD migrated to the AR8031 controller, so the original code was completely wrong. The patch you're referencing was to make the AR8031 controller actually work. Since the older hardware was never released, I didn't mention it in the commit. adam