From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6AFB5C7EE23 for ; Tue, 30 May 2023 22:35:13 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7EE03827A6; Wed, 31 May 2023 00:35:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="W6FETeIV"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 36E9686075; Wed, 31 May 2023 00:35:09 +0200 (CEST) Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 294118211B for ; Wed, 31 May 2023 00:35:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=aford173@gmail.com Received: by mail-pj1-x1033.google.com with SMTP id 98e67ed59e1d1-2564c6a2b7dso2293790a91.3 for ; Tue, 30 May 2023 15:35:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1685486104; x=1688078104; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=JX+pDgygNvUnxBQ5dkDtldqw1sc6NTEYhydstiG6M+U=; b=W6FETeIVqSuft/XL9U7YH2mXUW6SOcsgd1QSHKwcuCGg+pNF0dq+ybIKFgHW877Doz 9hkeDNH4s3tcMF0dgBIilxiBLQbJ9CVcKnNjIsLQE+LrASserep/8NUc+YgjgnjYzMGn ebPA5XJHu+LYCVkQgGipqzEeRIz7DD7izZRkzhNqJixz65jAcpu5FIeq2m8BBHwCAwKi rrZ+kzJh1TmwcHwTl4+P3TPby0Rn1zsSz7iLSA7Shxu3xIUL/OXbgIhWzDQ3gFU3b0CD x5OI7bpAyjTqt18pmtP2Yigc2kBVYI9We7oX18/kkNJ/Bx3CyogSNqos3MloJchN7jdn IP6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685486104; x=1688078104; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JX+pDgygNvUnxBQ5dkDtldqw1sc6NTEYhydstiG6M+U=; b=IbOsJMDGSqtYeHsDqRM8A81hxbtvnmZixlWVd35xyHv4LHK56GkdO/4wVZro2eXwo3 hvDBjgD/pUIh1Jlzedr/hHLwGtEw4uAHriyvZ96Bet4fYjJWmx2/j9zrKBza/oVvaUPc MH62veZGETs8loIw4IfMW/YyiwqqsJ5nqdGNxCaYdllz1lCZWZF/T/3VJNBIKy6iq2lh OfV7IC/GRmJ5n+XzytPuQhaVjGbB/yFAj/Ntvvf91O8whZ45THir3QlWckOcZTR4ms3u XzFjqOUGYm+qZjMBSM3NnWWhkOUNwQFvYwsjRpxBlpJ4tkc+LN/MYo1HWQMPLF0UhSuL 6rSg== X-Gm-Message-State: AC+VfDy06NMBHzTPZoQ9PC9Ph/YRHDUg+cY1JQQVarAc+R5iqL8kG6dT Vjakbb+s2BVrO974z9yoOosWJQjYCfu3Ekyp7fo= X-Google-Smtp-Source: ACHHUZ4xf41ueN4JxnPl6acFTq+5KncunvhTi6NRgJXtjr2xoLU2fL/gNEmWDlAOfzwN0Eia0SSl8aShXg8pTxrazT0= X-Received: by 2002:a17:902:e806:b0:1a9:8ba4:d0d3 with SMTP id u6-20020a170902e80600b001a98ba4d0d3mr4587929plg.8.1685486104270; Tue, 30 May 2023 15:35:04 -0700 (PDT) MIME-Version: 1.0 References: <20230427180845.127439-1-festevam@gmail.com> <20230427180845.127439-3-festevam@gmail.com> In-Reply-To: From: Adam Ford Date: Tue, 30 May 2023 17:34:53 -0500 Message-ID: Subject: Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3 To: Tim Harvey Cc: Fabio Estevam , sbabic@denx.de, u-boot@lists.denx.de, Fabio Estevam Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Tue, May 30, 2023 at 1:40=E2=80=AFPM Tim Harvey = wrote: > > On Tue, May 30, 2023 at 10:28=E2=80=AFAM Adam Ford w= rote: > > > > On Tue, May 30, 2023 at 12:23=E2=80=AFPM Tim Harvey wrote: > > > > > > On Mon, May 29, 2023 at 10:45=E2=80=AFAM Adam Ford wrote: > > > > > > > > On Wed, May 24, 2023 at 9:02=E2=80=AFPM Fabio Estevam wrote: > > > > > > > > > > Hi Tim, > > > > > > > > > > On Fri, May 19, 2023 at 8:00=E2=80=AFPM Tim Harvey wrote: > > > > > > > > > > > Fabio, > > > > > > > > + Marek > > > > I am adding Marek since he did the HSIO power domain driver. > > > > > > > > > > > > > > > > There's more to be done here also. With this patch, and with th= e > > > > > > spba-bus added to u-boot.dtsi, if you try to enable usb (usb st= art) > > > > > > you get: > > > > > > starting USB... > > > > > > Bus usb@38200000: > > > > > > Enable clock-controller@30380000 failed > > > > > > probe failed, error -2 > > > > > > No working controllers found > > > > > > > > > > Does this help? > > > > > > > > A bit. I finally got some time to try to troubleshoot USB on my 8M= P. > > > > > > > > > > > > > > --- a/drivers/clk/imx/clk-imx8mp.c > > > > > +++ b/drivers/clk/imx/clk-imx8mp.c > > > > > @@ -337,8 +337,8 @@ static int imx8mp_clk_probe(struct udevice *d= ev) > > > > > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_c= lk", > > > > > "uart2", base + 0x44a0, 0)); > > > > > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_c= lk", > > > > > "uart3", base + 0x44b0, 0)); > > > > > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_c= lk", > > > > > "uart4", base + 0x44c0, 0)); > > > > > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", > > > > > "usb_core_ref", base + 0x44d0, 0)); > > > > > - clk_dm(IMX8MP_CLK_USB_PHY_ROOT, > > > > > > > > IMX8MP_CLK_USB_PHY_ROOT is also referenced in the device tree, so I > > > > don't think we can delete it. I had keep IMX8MP_CLK_USB_ROOT, and > > > > IMX8MP_CLK_USB_PHY_ROOT while also adding IMX8MP_CLK_USB_SUSP. > > > > > > > > > imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0= )); > > > > > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", > > > > > "hsio_axi", base + 0x44d0, 0)); > > > > > + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate4("usb_suspend_cl= k", > > > > > "osc_32k", base + 0x44d0, 0)); > > > > > clk_dm(IMX8MP_CLK_USDHC1_ROOT, > > > > > imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0)); > > > > > clk_dm(IMX8MP_CLK_USDHC2_ROOT, > > > > > imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0)); > > > > > clk_dm(IMX8MP_CLK_WDOG1_ROOT, imx_clk_gate4("wdog1_root_c= lk", > > > > > "wdog", base + 0x4530, 0)); > > > > > > > > At this point, the missing clock errors go away, but it hangs. I > > > > updated my 8MP USB clocks based on the latest Linux kernel so my > > > > clocks looks like: > > > > > > > > clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi= ", > > > > base + 0x44d0, 0)); > > > > clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk", > > > > "clock-osc-24m", base + 0x44d0, 0)); > > > > clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", > > > > "usb_phy_ref", base + 0x44f0, 0)); > > > > > > > > The linux kernel uses gate2 for USB_ROOT and USB_SUSP while gate4 i= s > > > > used for IMX8MP_CLK_USB_PHY_ROOT. I didn't verify this against the > > > > reference manual. > > > > > > > > With some debugging enabled, it looks to me like it might be > > > > power-domain related, but I am not 100% certain. > > > > When I start the USB, it appears to go through some clocks, and sta= rt > > > > one power domain, but I think we have a power-domain chain where on= e > > > > power domain starts another. I saw a patch on another thread for > > > > enabling parent power-domains, but it didn't seem to help me. > > > > > > > > u-boot=3D> usb start > > > > starting USB... > > > > Bus usb@38200000: ofnode_read_prop: maximum-speed: > > > > ofnode_read_prop: dr_mode: host > > > > dev_power_domain_on usb@32f10108 > > > > ofnode_read_prop: assigned-clock-rates: > > > > Looking for clock-controller@30380000 > > > > Looking for clock-controller@30380000 > > > > - result for clock-controller@30380000: clock-controller@3038000= 0 (ret=3D0) > > > > - result for clock-controller@30380000: clock-controller@3038000= 0 (ret=3D0) > > > > Looking for clock-controller@30380000 > > > > Looking for clock-controller@30380000 > > > > - result for clock-controller@30380000: clock-controller@3038000= 0 (ret=3D0) > > > > - result for clock-controller@30380000: clock-controller@3038000= 0 (ret=3D0) > > > > ofnode_read_prop: dr_mode: host > > > > > > > > > > > > > > > > I added some debug code to the imx8mp_hsiomix_on in HSIOmix power > > > > domain driver, and it doesn't appear to be getting called, yet > > > > dev_power_domain_on usb@32f10108 should be invoking it. > > > > > > > > I am not positive it's a power domain issue, that's my first guess. > > > > > > > > > > > > Tim - have you had any success? > > > > > > > > > > Adam, > > > > > > No success here yet but I don't have any time to work on it for at > > > least another week. > > > > No worries. I'll try to spend some more time this week, and keep you > > informed of any progress. I'd like to see the USB working too. > > > > Adam, > > Thanks for keeping me in the loop. For my boards I also need to add > vbus regulator enable to the dwc controller (which I've worked on a > bit but have not submitted anything yet) and eventually gpio dual-role > based detect/configure as well (which I have not worked on and > currently just force dr-mode to host in a u-boot.dtsi file to deal > with). I have it working now. I need some time to clean my stuff and re-base the imx8mp.dtsi file, but I can submit a patch which fixes the clocks and re-sync's the device tree with the current stuff from kernel.org. I should be able to get a patch series out tonight. adam > > Best Regards, > > Tim