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From: Michael Clark <mjc@sifive.com>
Date: Fri, 16 Mar 2018 11:36:16 -0700
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Subject: Re: [Qemu-devel] [PATCH v8 19/23] SiFive RISC-V UART Device
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To: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= <f4bug@amsat.org>, Stefan O'Rear <sorear2@gmail.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Palmer Dabbelt <palmer@sifive.com>, QEMU Developers <qemu-devel@nongnu.org>, RISC-V Patches <patches@groups.riscv.org>

On Fri, Mar 16, 2018 at 11:30 AM, Michael Clark <mjc@sifive.com> wrote:

>
>
> On Sun, Mar 11, 2018 at 4:43 AM, Bastian Koppelmann <
> kbastian@mail.uni-paderborn.de> wrote:
>
>> Hi Mark,
>>
>> On 03/10/2018 10:40 AM, Mark Cave-Ayland wrote:
>> > On 10/03/18 03:02, Michael Clark wrote:
>> >
>> >> On Sat, Mar 10, 2018 at 1:39 AM, Philippe Mathieu-Daud=C3=A9 <
>> f4bug@amsat.org>
>> >> wrote:
>> >>
>> [...]
>> > Another general note: for each of the main QEMU platforms supported
>> > there is a home page on the official wiki, so do make sure that you se=
t
>> > yourself a template for RiscV and add some information to help people
>> > get started.
>> >
>> Thanks for the pointer. I went ahead and created a basic page for RISC-V
>> with instructions on how to build QEMU and boot Fedora.
>>
>
> Thanks Bastian! I'll add a link back to the official QEMU RISC-V
> Architecture page from the riscv-qemu repo wiki...
>

I noticed there is a spelling mistake in the description: "implented"
instead of "implemented"

Michael.