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From: Michael Clark <mjc@sifive.com>
To: Laurent Vivier <laurent@vivier.eu>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	qemu-trivial@nongnu.org,
	RISC-V Patches <patches@groups.riscv.org>,
	Michael Tokarev <mjt@tls.msk.ru>,
	Richard Henderson <richard.henderson@linaro.org>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Jim Wilson <jimw@sifive.com>
Subject: Re: [Qemu-devel] [PATCH v2] elf: Add RISC-V PSABI ELF header defines
Date: Fri, 25 May 2018 21:25:57 +1200	[thread overview]
Message-ID: <CAHNT7NvTAh9iWPvJaaH+Jr8wbtyp5JOvDCaGvnMqugwHvRfy1g@mail.gmail.com> (raw)
In-Reply-To: <4926fd94-b29b-8dad-bbdb-e19729bfa39f@vivier.eu>

On Fri, May 25, 2018 at 7:53 PM, Laurent Vivier <laurent@vivier.eu> wrote:

> Le 25/05/2018 à 09:22, Michael Clark a écrit :
> > Refer to the RISC-V PSABI specification for details:
> >
> > - https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
> >
> > Cc: Michael Tokarev <mjt@tls.msk.ru>
> > Cc: Laurent Vivier <laurent@vivier.eu>
> > Cc: Richard Henderson <richard.henderson@linaro.org>
> > Cc: Alistair Francis <Alistair.Francis@wdc.com>
> > Signed-off-by: Michael Clark <mjc@sifive.com>
> > ---
> >  include/elf.h | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/include/elf.h b/include/elf.h
> > index 934dbbd6b3ae..bd0493f43d19 100644
> > --- a/include/elf.h
> > +++ b/include/elf.h
> > @@ -1285,6 +1285,14 @@ typedef struct {
> >  #define R_IA64_DTPREL64LSB   0xb7    /* @dtprel(sym + add), data8 LSB */
> >  #define R_IA64_LTOFF_DTPREL22        0xba    /* @ltoff(@dtprel(s+a)),
> imm22 */
> >
> > +/* RISC-V specific definitions.  */
> > +#define EF_RISCV_RVC 0x0001
> > +#define EF_RISCV_FLOAT_ABI_SINGLE 0x0002
> > +#define EF_RISCV_FLOAT_ABI_DOUBLE 0x0004
> > +#define EF_RISCV_FLOAT_ABI_QUAD 0x0006
> > +#define EF_RISCV_RVE 0x0008
> > +#define EF_RISCV_TSO 0x0010
> > +
> >  typedef struct elf32_rel {
> >    Elf32_Addr r_offset;
> >    Elf32_Word r_info;
> >
>
> from glibc (and binutils), I have:
>
>   /* RISC-V ELF Flags */
>   #define EF_RISCV_RVC                    0x0001
>   #define EF_RISCV_FLOAT_ABI              0x0006
>   #define EF_RISCV_FLOAT_ABI_SOFT         0x0000
>   #define EF_RISCV_FLOAT_ABI_SINGLE       0x0002
>   #define EF_RISCV_FLOAT_ABI_DOUBLE       0x0004
>   #define EF_RISCV_FLOAT_ABI_QUAD         0x0006
>
> Perhaps you can also define EF_RISCV_FLOAT_ABI_SOFT and EF_RISCV_FLOAT_ABI?
>

Will do. I'll align them also.

Anyway:
>
> Reviewed-by: Laurent Vivier <laurent@vivier.eu>
>
>
Thanks for checking glibc and binutils. I'll update to add the extra
definitions before I make a PR. Thanks!

Michael.

      reply	other threads:[~2018-05-25  9:26 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-25  7:22 [Qemu-devel] [PATCH v2] elf: Add RISC-V PSABI ELF header defines Michael Clark
2018-05-25  7:53 ` Laurent Vivier
2018-05-25  9:25   ` Michael Clark [this message]

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