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From: Michael Clark <mjc@sifive.com>
Date: Sat, 24 Feb 2018 11:24:15 +1300
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Subject: Re: [Qemu-devel] [PATCH v6 00/23] RISC-V QEMU Port Submission
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To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Palmer Dabbelt <palmer@sifive.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, RISC-V Patches <patches@groups.riscv.org>, Peter Maydell <peter.maydell@linaro.org>

On Sat, Feb 24, 2018 at 10:31 AM, Richard Henderson <
richard.henderson@linaro.org> wrote:

> On 02/22/2018 04:11 PM, Michael Clark wrote:
> > QEMU RISC-V Emulation Support (RV64GC, RV32GC)
> >
> > This is hopefully the "fix remaining issues in-tree" release.
>
> FWIW, I'm happy with this.
>
> For those patches that I haven't given an explicit R-b, e.g. most of hw/, I
> didn't see anything obviously wrong.  So I'll give them
>
> Acked-by: Richard Henderson <richard.henderson@linaro.org>
>
> Unless anyone has any other comments, I would expect the next step would
> be for
> you to create a signed pull request for Peter.
>

Thanks Richard!

I might see if I can sort out the license changes for include/hw/riscv/*.h
and hw/riscv/*.h

In either case, I've set the wheels in motion for the license change so it
can happen out-of-tree or in-tree... as SiFive is fine with GPLv2+, at
least for their stuff...