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bh=As3ERYDpe1xajWwl0P5phR10L73tho+c84KJAVM3/Kk=; b=yc8syW9HV9l82a40voWdzcIOT2Zn8VmLg1O354Xev8G0tHtvj8u9tu1n1GsM0Ojmxm 6KcOrxS72Ls00jkcpO90R7LsW1PGZ0hNne9BsniyMbf1A/vy9cjm2hcKi8XYn8QYntoD AjKRYN+N4fAmeX2ZzboKw35LV6sO5OE9evAHSC4E6jRbMHsuP91eZBWe4z78fm9JIYOQ sCRR3uVf2YxTU15EwEEi0MRLHrIKdlff8ABNVI3U5p6hUQrmvIbLdInIZHdByecouFm7 SiJrXeWjDgR9qQVdH9gNaZuiHYO/YMC+4PcYcRQdHLSy8Q0hbOydqP6zZu3i5y9qpulC A+ow== X-Gm-Message-State: AFqh2kofhOpkwSLwls8v3fDTTDEE2bFmq5LHLKEYAdFrdE8Li51G0LxX QAgHL7K0iZ2aoN+M368RDgOtAy7fOMfQN4Me3FYr9Q== X-Google-Smtp-Source: AMrXdXvlUpW+fAmQ9rapa70r/uzL07EUa2hOEg7mAOoLpYYTmX+07w/E9/FSoXB62IhEpvc82OS4tmjU5MSHQwJk/oM= X-Received: by 2002:a7b:c4d0:0:b0:3db:459:5847 with SMTP id g16-20020a7bc4d0000000b003db04595847mr1540405wmk.5.1674554207821; Tue, 24 Jan 2023 01:56:47 -0800 (PST) MIME-Version: 1.0 References: <20230123090324.732681-1-alexghiti@rivosinc.com> <20230123090324.732681-4-alexghiti@rivosinc.com> <20230123101429.a3x6vlatbvbp7kox@orel> In-Reply-To: <20230123101429.a3x6vlatbvbp7kox@orel> From: Alexandre Ghiti Date: Tue, 24 Jan 2023 10:56:37 +0100 Message-ID: Subject: Re: [PATCH v6 3/5] riscv: Allow user to set the satp mode To: Andrew Jones Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Frank Chang , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Ludovic Henry Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=alexghiti@rivosinc.com; helo=mail-wm1-x332.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon, Jan 23, 2023 at 11:14 AM Andrew Jones wrote: > > On Mon, Jan 23, 2023 at 10:03:22AM +0100, Alexandre Ghiti wrote: > > RISC-V specifies multiple sizes for addressable memory and Linux probes for > > the machine's support at startup via the satp CSR register (done in > > csr.c:validate_vm). > > > > As per the specification, sv64 must support sv57, which in turn must > > support sv48...etc. So we can restrict machine support by simply setting the > > "highest" supported mode and the bare mode is always supported. > > > > You can set the satp mode using the new properties "sv32", "sv39", "sv48", > > "sv57" and "sv64" as follows: > > -cpu rv64,sv57=on # Linux will boot using sv57 scheme > > -cpu rv64,sv39=on # Linux will boot using sv39 scheme > > -cpu rv64,sv57=off # Linux will boot using sv48 scheme > > -cpu rv64 # Linux will boot using sv57 scheme by default > > > > We take the highest level set by the user: > > -cpu rv64,sv48=on,sv57=on # Linux will boot using sv57 scheme > > > > We make sure that invalid configurations are rejected: > > -cpu rv64,sv32=on # Can't enable 32-bit satp mode in 64-bit > > -cpu rv64,sv39=off,sv48=on # sv39 must be supported if higher modes are > > # enabled > > > > We accept "redundant" configurations: > > -cpu rv64,sv48=on,sv57=off # Linux will boot using sv48 scheme > > > > And contradictory configurations: > > -cpu rv64,sv48=on,sv48=off # Linux will boot using sv39 scheme > > > > In addition, we now correctly set the device-tree entry 'mmu-type' using > > those new properties. > > This sentence no longer applies to this patch. Sorry about that and thanks for noticing. Alex > > Thanks, > drew