From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04CA2C43215 for ; Tue, 26 Nov 2019 09:22:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D3335206BF for ; Tue, 26 Nov 2019 09:22:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ovYMWZh7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727573AbfKZJWq (ORCPT ); Tue, 26 Nov 2019 04:22:46 -0500 Received: from mail-lf1-f67.google.com ([209.85.167.67]:44874 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727446AbfKZJWp (ORCPT ); Tue, 26 Nov 2019 04:22:45 -0500 Received: by mail-lf1-f67.google.com with SMTP id v201so12413831lfa.11; Tue, 26 Nov 2019 01:22:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=nP42ri7Gfuyq7+jTSAaeHSR6UUUTuVIMdi0iTbY+h84=; b=ovYMWZh7rJIAiQIsOphqx1xCiq5HXT19ucp08A6Hyajw4ROMLr8llSUbHC6t4TQbbK ACgpjDob4IqxBrXWeNyQ5DWuHtKzhfrodRgDe4HZf/I2BlO9dhb3KFOYPGGzQqpr4Tzr Kl7nncerWp7c7U/GWoDkqcdJA+K99QdIKjNxi/eA7+Yv9A/t6aCYgQZ1FltbxaTzzoTE 4AsFg2bM2KX0RP0FCJD/O/IG2nDPuPaGlcdLAqqPOOCj4YZLwBtna/a3teKAk5JeJkwa k4Y0SxxyKhf06vtLD9Dqg7qh8UPyothUXTyyVUQ2V+T4JeSm4OLreRurbik48BVaGIKV G4Ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=nP42ri7Gfuyq7+jTSAaeHSR6UUUTuVIMdi0iTbY+h84=; b=aYzwSDYwp0LMXU1ubKhSGt8LjA+WbD/rAZDwrn2fVQwZ+Rc/E/u65XupxAWFjgjrkt jfshW28p3gLHKDPumbAq3dEjoblgomURSW0sctMNNP5KilcHBqXHeP0Y7fV2x+ClRAOC hQWCm0vu1eH3++/v0k2MTca4H4QAB+QJn5Jv9DhTqz3pTCPyNJ41RP6Gs07THV1OQn2Y KiHeznXpejc+XPghYFhmj16OcPVJ8pfeXBQFQxQHhZK6mZtVefLHoRILW775+NGtsxsb FYBfs78Y0t4UU6SDWP4Lh1Resktij2gyIyBtAQSTYcg+csB+yJty9DiRW6TWOrzov1U8 DaqQ== X-Gm-Message-State: APjAAAUJczQmjehFtfAspbAF/lescnkWAVdfxaeLRiq5mTsIOUWUtAcJ Dbv5iIG1Zq2ByreIYxw/wQQaYSqpUK6ts9VlbTQ= X-Google-Smtp-Source: APXvYqxwEoS4JdUZHseRdgXnA2T0ZSH6rIjpNKMLHoZ81qrtdpjff/6z2EOp2yzjzjEVqX1615n2wklv8ouZ3FFfeSM= X-Received: by 2002:ac2:5283:: with SMTP id q3mr23177580lfm.21.1574760162745; Tue, 26 Nov 2019 01:22:42 -0800 (PST) MIME-Version: 1.0 References: <20191121095350.158689-1-tali.perry1@gmail.com> <20191121095350.158689-3-tali.perry1@gmail.com> <20191125151618.GE2412@kunai> In-Reply-To: From: Tali Perry Date: Tue, 26 Nov 2019 11:27:54 +0200 Message-ID: Subject: Re: [PATCH v7 2/2] i2c: npcm: Add Nuvoton NPCM I2C controller driver To: Wolfram Sang Cc: Rob Herring , Mark Rutland , Nancy Yuen , Patrick Venture , Benjamin Fair , avifishman70@gmail.com, joel@jms.id.au, Tomer Maimon , syniurge@gmail.com, linux-i2c@vger.kernel.org, OpenBMC Maillist , devicetree , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Wolfram, Thanks for your comments. The NPCM7XX BMC I2C\SMB controller HW module supports both SMB and I2C. It's main features are: 1. Supports Fast-Mode (400 KHz clock) I2C and Fast-Mode-plus (1 MHz clock) = I2C 2. Supports the =E2=80=98fairness=E2=80=99 arbitration protocol defined by = the MCTP SMBus/I2C Transport Binding Specification v1.0.0 3. 32KB packets : this is an I2C spec limitation. The HW has no limit on packets size. It has a 16 bytes FIFO which can be reloaded over and over. 4. w\o size byte (for SMB block protocol). 5. Both master and slave. It can also replace modes in run time (requirement for IPMB and MCTP). 6. Bus timing is selected to support both specs. Originally the HW spec stated SMB everywhere . Should I rename the SMB to I2C all over the driver? Thanks, Tali Perry On Tue, Nov 26, 2019 at 8:47 AM Tali Perry wrote: > > Hi Wolfram, > > Thanks for your comments. > > The NPCM7XX BMC I2C\SMB controller HW module supports both SMB and I2C. > It's main features are: > 1. Supports Fast-Mode (400 KHz clock) I2C and Fast-Mode-plus (1 MHz clock= ) I2C > 2. Supports the =E2=80=98fairness=E2=80=99 arbitration protocol defined b= y the MCTP SMBus/I2C Transport Binding Specification v1.0.0 > 3. 32KB packets : this is an I2C spec limitation. The HW has no limit on = packets size. It has a 16 bytes FIFO which can be reloaded over and over. > 4. w\o size byte (for SMB block protocol). > 5. Both master and slave. It can also replace modes in run time (requirem= ent for IPMB and MCTP). > 6. Bus timing is selected to support both specs. > > Originally the HW spec stated SMB everywhere . > > Should I rename the SMB to I2C all over the driver? > > Thanks, > Tali Perry > > > On Mon, Nov 25, 2019 at 5:16 PM Wolfram Sang wrote: >> >> On Thu, Nov 21, 2019 at 11:53:50AM +0200, Tali Perry wrote: >> > Add Nuvoton NPCM BMC i2c controller driver. >> > >> > Signed-off-by: Tali Perry >> >> Looking at all this SMB_* naming of the registers and also the quirks, >> this looks more like an SMBUS controller to me? >> >> > + // currently I2C slave IF only supports single byte operations. >> > + // in order to utilyze the npcm HW FIFO, the driver will ask for= 16bytes >> > + // at a time, pack them in buffer, and then transmit them all to= gether >> > + // to the FIFO and onward to the bus . >> > + // NACK on read will be once reached to bus->adap->quirks->max_r= ead_len >> > + // sending a NACK whever the backend requests for it is not supp= orted. >> >> This for example... >> >> > +static const struct i2c_adapter_quirks npcm_i2c_quirks =3D { >> > + .max_read_len =3D 32768, >> > + .max_write_len =3D 32768, >> > + .max_num_msgs =3D 2, >> > + .flags =3D I2C_AQ_COMB_WRITE_THEN_READ >> > +}; >> >> ... and this. Like SMBus with the only exception of being able to send >> 32K in a row. Or? >> From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2a00:1450:4864:20::141; helo=mail-lf1-x141.google.com; envelope-from=tali.perry1@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ovYMWZh7"; dkim-atps=neutral Received: from mail-lf1-x141.google.com (mail-lf1-x141.google.com [IPv6:2a00:1450:4864:20::141]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 47MdjQ0HDdzDq6l for ; Tue, 26 Nov 2019 20:22:46 +1100 (AEDT) Received: by mail-lf1-x141.google.com with SMTP id d6so13487957lfc.0 for ; Tue, 26 Nov 2019 01:22:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=nP42ri7Gfuyq7+jTSAaeHSR6UUUTuVIMdi0iTbY+h84=; b=ovYMWZh7rJIAiQIsOphqx1xCiq5HXT19ucp08A6Hyajw4ROMLr8llSUbHC6t4TQbbK ACgpjDob4IqxBrXWeNyQ5DWuHtKzhfrodRgDe4HZf/I2BlO9dhb3KFOYPGGzQqpr4Tzr Kl7nncerWp7c7U/GWoDkqcdJA+K99QdIKjNxi/eA7+Yv9A/t6aCYgQZ1FltbxaTzzoTE 4AsFg2bM2KX0RP0FCJD/O/IG2nDPuPaGlcdLAqqPOOCj4YZLwBtna/a3teKAk5JeJkwa k4Y0SxxyKhf06vtLD9Dqg7qh8UPyothUXTyyVUQ2V+T4JeSm4OLreRurbik48BVaGIKV G4Ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=nP42ri7Gfuyq7+jTSAaeHSR6UUUTuVIMdi0iTbY+h84=; b=Q4H21VBlmoJxzTZBDxZp8wNVBgikp3shNzhBPOAuM075Ex7BfjqAA9vg9ogERdcWSD h1RurQSnaDCAJrT7GyrYOG0oJpyHqkUj0smIFn1Al5HLOggq5OiZjeetVEX6n5bzMdAi xeh45fnOxDxgjWynZiLOmCjwtkw02NJei3Fx8lUXsCh7aJI/OdOQ3sxQNg7zoBD3YvsK bDmghYpP4udSyGsPnFyakZFav6MPmKwmLvqsBK38UXjC0Wsc4HmvKSesMiK5ZvU2tJ7T gTRE5cx8MyiWW+4RungeReTuZqjOpzgfwdkcmugMdWeg2d7+aEXd/evSrJkP+otcpfi/ hlEw== X-Gm-Message-State: APjAAAWA7aTnzkVTMGP0CYopetLIJ+1aW7S++kDVvOQbrxYiJwopqris IRNsv8daCD5PHxuc+T5EXMFAWlA3qsj2pnyNu9c= X-Google-Smtp-Source: APXvYqxwEoS4JdUZHseRdgXnA2T0ZSH6rIjpNKMLHoZ81qrtdpjff/6z2EOp2yzjzjEVqX1615n2wklv8ouZ3FFfeSM= X-Received: by 2002:ac2:5283:: with SMTP id q3mr23177580lfm.21.1574760162745; Tue, 26 Nov 2019 01:22:42 -0800 (PST) MIME-Version: 1.0 References: <20191121095350.158689-1-tali.perry1@gmail.com> <20191121095350.158689-3-tali.perry1@gmail.com> <20191125151618.GE2412@kunai> In-Reply-To: From: Tali Perry Date: Tue, 26 Nov 2019 11:27:54 +0200 Message-ID: Subject: Re: [PATCH v7 2/2] i2c: npcm: Add Nuvoton NPCM I2C controller driver To: Wolfram Sang Cc: Rob Herring , Mark Rutland , Nancy Yuen , Patrick Venture , Benjamin Fair , avifishman70@gmail.com, joel@jms.id.au, Tomer Maimon , syniurge@gmail.com, linux-i2c@vger.kernel.org, OpenBMC Maillist , devicetree , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 26 Nov 2019 09:22:50 -0000 Hi Wolfram, Thanks for your comments. The NPCM7XX BMC I2C\SMB controller HW module supports both SMB and I2C. It's main features are: 1. Supports Fast-Mode (400 KHz clock) I2C and Fast-Mode-plus (1 MHz clock) = I2C 2. Supports the =E2=80=98fairness=E2=80=99 arbitration protocol defined by = the MCTP SMBus/I2C Transport Binding Specification v1.0.0 3. 32KB packets : this is an I2C spec limitation. The HW has no limit on packets size. It has a 16 bytes FIFO which can be reloaded over and over. 4. w\o size byte (for SMB block protocol). 5. Both master and slave. It can also replace modes in run time (requirement for IPMB and MCTP). 6. Bus timing is selected to support both specs. Originally the HW spec stated SMB everywhere . Should I rename the SMB to I2C all over the driver? Thanks, Tali Perry On Tue, Nov 26, 2019 at 8:47 AM Tali Perry wrote: > > Hi Wolfram, > > Thanks for your comments. > > The NPCM7XX BMC I2C\SMB controller HW module supports both SMB and I2C. > It's main features are: > 1. Supports Fast-Mode (400 KHz clock) I2C and Fast-Mode-plus (1 MHz clock= ) I2C > 2. Supports the =E2=80=98fairness=E2=80=99 arbitration protocol defined b= y the MCTP SMBus/I2C Transport Binding Specification v1.0.0 > 3. 32KB packets : this is an I2C spec limitation. The HW has no limit on = packets size. It has a 16 bytes FIFO which can be reloaded over and over. > 4. w\o size byte (for SMB block protocol). > 5. Both master and slave. It can also replace modes in run time (requirem= ent for IPMB and MCTP). > 6. Bus timing is selected to support both specs. > > Originally the HW spec stated SMB everywhere . > > Should I rename the SMB to I2C all over the driver? > > Thanks, > Tali Perry > > > On Mon, Nov 25, 2019 at 5:16 PM Wolfram Sang wrote: >> >> On Thu, Nov 21, 2019 at 11:53:50AM +0200, Tali Perry wrote: >> > Add Nuvoton NPCM BMC i2c controller driver. >> > >> > Signed-off-by: Tali Perry >> >> Looking at all this SMB_* naming of the registers and also the quirks, >> this looks more like an SMBUS controller to me? >> >> > + // currently I2C slave IF only supports single byte operations. >> > + // in order to utilyze the npcm HW FIFO, the driver will ask for= 16bytes >> > + // at a time, pack them in buffer, and then transmit them all to= gether >> > + // to the FIFO and onward to the bus . >> > + // NACK on read will be once reached to bus->adap->quirks->max_r= ead_len >> > + // sending a NACK whever the backend requests for it is not supp= orted. >> >> This for example... >> >> > +static const struct i2c_adapter_quirks npcm_i2c_quirks =3D { >> > + .max_read_len =3D 32768, >> > + .max_write_len =3D 32768, >> > + .max_num_msgs =3D 2, >> > + .flags =3D I2C_AQ_COMB_WRITE_THEN_READ >> > +}; >> >> ... and this. Like SMBus with the only exception of being able to send >> 32K in a row. Or? >>