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From: Mike Lothian <mike@fireburn.co.uk>
To: Felix Kuehling <Felix.Kuehling@amd.com>
Cc: Philip Yang <philip.yang@amd.com>,
	christian.koenig@amd.com, amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v8] drm/amdgpu: handle IH ring1 overflow
Date: Thu, 2 Dec 2021 12:43:41 +0000	[thread overview]
Message-ID: <CAHbf0-Eyn9O_hzXa4qfQcQqmme9=nadEnhrWW7fKHAorw3Dr_A@mail.gmail.com> (raw)
In-Reply-To: <d5862808-c97e-a1c2-4429-7d0216425fdf@amd.com>

On Thu, 25 Nov 2021 at 20:42, Felix Kuehling <felix.kuehling@amd.com> wrote:
>
> OK. Dealing with processed timestamp rather than decoded timestamp fixes
> the race condition where drain would have returned before the last fault
> was processed. But we're still assuming that each interrupt has a unique
> timestamp. We haven't seen evidence of the contrary. But I'd like to add
> a check to be sure, in case that assumption becomes invalid on future
> hardware. Something like this (before updating ih->processed_timestamp):
>
>     WARN_ONCE(ih->processed_timestamp == entry.timestamp, "IH timestamps
> are not unique");
>
> With that fixed, the patch is
>
> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
>

Hi,

I'm seeing this on my machine
https://gitlab.freedesktop.org/drm/amd/-/issues/1818

Cheers

Mike

  reply	other threads:[~2021-12-02 12:43 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-25 20:30 [PATCH v8] drm/amdgpu: handle IH ring1 overflow Philip Yang
2021-11-25 20:41 ` Felix Kuehling
2021-12-02 12:43   ` Mike Lothian [this message]
2021-12-02 15:51     ` philip yang

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