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X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Chris Wulff , Sagar Karandikar , David Hildenbrand , Mark Cave-Ayland , QEMU Developers , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Marek Vasut , Yoshinori Sato , qemu-ppc@nongnu.org, Aleksandar Rikalo , David Gibson , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Artyom Tarasenko , Eduardo Habkost , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Stafford Horne , Richard Henderson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , Laurent Vivier , Michael Walle , Palmer Dabbelt , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --0000000000004018db05a34199ba Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable 4:26 PM Uto, 14.04.2020. Alex Benn=C3=A9e =D1=98= =D0=B5 =D0=BD=D0=B0=D0=BF=D0=B8=D1=81=D0=B0=D0=BE/=D0=BB=D0=B0: > > > Philippe Mathieu-Daud=C3=A9 writes: > > > On 4/14/20 3:35 PM, Aleksandar Markovic wrote: > >> 1:28 PM Uto, 14.04.2020. Philippe Mathieu-Daud=C3=A9 >> > =D1=98=D0=B5 =D0=BD=D0=B0=D0=BF=D0=B8=D1= =81=D0=B0=D0=BE/=D0=BB=D0=B0: > >> > > >> > GByteArray type has should not be treated as a u8[] buffer. > >> > The GLib Byte Arrays API should be used instead. > >> > Rename the 'mem_buf' variable as 'array' to make it more > >> > obvious in the code. > >> > > >> Hi, Philippe. > >> "array" is a horrible choice for a name. It must be more specific. > > > > This is how the prototype is documented: > > > > https://developer.gnome.org/glib/stable/glib-Byte-Arrays.html#g-byte-array-= append > > > > GByteArray * > > g_byte_array_append (GByteArray *array, > > const guint8 *data, > > guint len); > > > > What do you suggest? > > *buf was also pretty generic. That said I think the "array"-like > properties of this structure are fairly incidental to it's purpose which > is a opaque place to store the register data for gdbstub. As we already > communicate the type in the function prototype maybe *reg or *regdata? > I am not a frequent user of this interface, but mostly as an observer, Alex' "regdata" seems a reasonable choice to me. Does anybody happen to have a better idea? Regards, Aleksandar > > > >> Regards, > >> Aleksandar > >> > Signed-off-by: Philippe Mathieu-Daud=C3=A9 >> > > >> > --- > >> > Based-on: <20200414111846.27495-1-philmd@redhat.com > >> > > >> > Signed-off-by: Philippe Mathieu-Daud=C3=A9 >> > > >> > --- > >> > include/exec/gdbstub.h | 34 +++++++------- > >> > include/hw/core/cpu.h | 2 +- > >> > target/alpha/cpu.h | 2 +- > >> > target/arm/cpu.h | 4 +- > >> > target/cris/cpu.h | 4 +- > >> > target/hppa/cpu.h | 2 +- > >> > target/i386/cpu.h | 2 +- > >> > target/lm32/cpu.h | 2 +- > >> > target/m68k/cpu.h | 2 +- > >> > target/microblaze/cpu.h | 2 +- > >> > target/mips/internal.h | 2 +- > >> > target/openrisc/cpu.h | 2 +- > >> > target/ppc/cpu.h | 4 +- > >> > target/riscv/cpu.h | 2 +- > >> > target/rx/cpu.h | 2 +- > >> > target/s390x/internal.h | 2 +- > >> > target/sh4/cpu.h | 2 +- > >> > target/sparc/cpu.h | 2 +- > >> > target/xtensa/cpu.h | 2 +- > >> > gdbstub.c | 6 +-- > >> > hw/core/cpu.c | 3 +- > >> > target/alpha/gdbstub.c | 4 +- > >> > target/arm/gdbstub.c | 10 ++-- > >> > target/arm/gdbstub64.c | 10 ++-- > >> > target/cris/gdbstub.c | 34 +++++++------- > >> > target/hppa/gdbstub.c | 6 +-- > >> > target/i386/gdbstub.c | 92 ++++++++++++++++++------------------- > >> > target/lm32/gdbstub.c | 18 ++++---- > >> > target/m68k/gdbstub.c | 10 ++-- > >> > target/m68k/helper.c | 24 +++++----- > >> > target/microblaze/gdbstub.c | 6 +-- > >> > target/mips/gdbstub.c | 30 ++++++------ > >> > target/nios2/cpu.c | 8 ++-- > >> > target/openrisc/gdbstub.c | 10 ++-- > >> > target/riscv/gdbstub.c | 6 +-- > >> > target/rx/gdbstub.c | 22 ++++----- > >> > target/s390x/gdbstub.c | 28 +++++------ > >> > target/sh4/gdbstub.c | 38 +++++++-------- > >> > target/sparc/gdbstub.c | 46 +++++++++---------- > >> > target/xtensa/gdbstub.c | 20 ++++---- > >> > 40 files changed, 254 insertions(+), 253 deletions(-) > >> > > >> > diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h > >> > index 52a4a936c6..29150d1344 100644 > >> > --- a/include/exec/gdbstub.h > >> > +++ b/include/exec/gdbstub.h > >> > @@ -80,47 +80,47 @@ void gdb_register_coprocessor(CPUState *cpu, > >> > * append to the array. > >> > */ > >> > > >> > -static inline int gdb_get_reg8(GByteArray *buf, uint8_t val) > >> > +static inline int gdb_get_reg8(GByteArray *array, uint8_t val) > >> > { > >> > - g_byte_array_append(buf, &val, 1); > >> > + g_byte_array_append(array, &val, 1); > >> > return 1; > >> > } > >> > > >> > -static inline int gdb_get_reg16(GByteArray *buf, uint16_t val) > >> > +static inline int gdb_get_reg16(GByteArray *array, uint16_t val) > >> > { > >> > uint16_t to_word =3D tswap16(val); > >> > - g_byte_array_append(buf, (uint8_t *) &to_word, 2); > >> > + g_byte_array_append(array, (uint8_t *) &to_word, 2); > >> > return 2; > >> > } > >> > > >> > -static inline int gdb_get_reg32(GByteArray *buf, uint32_t val) > >> > +static inline int gdb_get_reg32(GByteArray *array, uint32_t val) > >> > { > >> > uint32_t to_long =3D tswap32(val); > >> > - g_byte_array_append(buf, (uint8_t *) &to_long, 4); > >> > + g_byte_array_append(array, (uint8_t *) &to_long, 4); > >> > return 4; > >> > } > >> > > >> > -static inline int gdb_get_reg64(GByteArray *buf, uint64_t val) > >> > +static inline int gdb_get_reg64(GByteArray *array, uint64_t val) > >> > { > >> > uint64_t to_quad =3D tswap64(val); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > return 8; > >> > } > >> > > >> > -static inline int gdb_get_reg128(GByteArray *buf, uint64_t val_hi, > >> > +static inline int gdb_get_reg128(GByteArray *array, uint64_t val_hi, > >> > uint64_t val_lo) > >> > { > >> > uint64_t to_quad; > >> > #ifdef TARGET_WORDS_BIGENDIAN > >> > to_quad =3D tswap64(val_hi); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > to_quad =3D tswap64(val_lo); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > #else > >> > to_quad =3D tswap64(val_lo); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > to_quad =3D tswap64(val_hi); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > #endif > >> > return 16; > >> > } > >> > @@ -154,16 +154,16 @@ static inline int gdb_get_zeroes(GByteArray > >> *array, size_t len) > >> > * element for additional processing. Some front-ends do additiona= l > >> > * dynamic swapping of the elements based on CPU state. > >> > */ > >> > -static inline uint8_t * gdb_get_reg_ptr(GByteArray *buf, int len) > >> > +static inline uint8_t *gdb_get_reg_ptr(GByteArray *array, int len) > >> > { > >> > - return buf->data + buf->len - len; > >> > + return array->data + array->len - len; > >> > } > >> > > >> > #if TARGET_LONG_BITS =3D=3D 64 > >> > -#define gdb_get_regl(buf, val) gdb_get_reg64(buf, val) > >> > +#define gdb_get_regl(array, val) gdb_get_reg64(array, val) > >> > #define ldtul_p(addr) ldq_p(addr) > >> > #else > >> > -#define gdb_get_regl(buf, val) gdb_get_reg32(buf, val) > >> > +#define gdb_get_regl(array, val) gdb_get_reg32(array, val) > >> > #define ldtul_p(addr) ldl_p(addr) > >> > #endif > >> > > >> > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h > >> > index 5bf94d28cf..31434d3b1f 100644 > >> > --- a/include/hw/core/cpu.h > >> > +++ b/include/hw/core/cpu.h > >> > @@ -193,7 +193,7 @@ typedef struct CPUClass { > >> > hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, > >> > MemTxAttrs *attrs); > >> > int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs); > >> > - int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); > >> > + int (*gdb_read_register)(CPUState *cpu, GByteArray *array, int reg); > >> > int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); > >> > bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp); > >> > void (*debug_excp_handler)(CPUState *cpu); > >> > diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h > >> > index be29bdd530..94853d0bee 100644 > >> > --- a/target/alpha/cpu.h > >> > +++ b/target/alpha/cpu.h > >> > @@ -280,7 +280,7 @@ void alpha_cpu_do_interrupt(CPUState *cpu); > >> > bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags); > >> > hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, > >> > MMUAccessType access_type, > >> > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > >> > index 8b9f2961ba..cbd3a262f3 100644 > >> > --- a/target/arm/cpu.h > >> > +++ b/target/arm/cpu.h > >> > @@ -975,7 +975,7 @@ bool arm_cpu_exec_interrupt(CPUState *cpu, > >> int int_req); > >> > hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr= , > >> > MemTxAttrs *attrs); > >> > > >> > -int arm_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int arm_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > /* > >> > @@ -997,7 +997,7 @@ int > >> arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, > >> > int cpuid, void *opaque); > >> > > >> > #ifdef TARGET_AARCH64 > >> > -int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *buf, int reg); > >> > +int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, > >> int reg); > >> > void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); > >> > void aarch64_sve_change_el(CPUARMState *env, int old_el, > >> > diff --git a/target/cris/cpu.h b/target/cris/cpu.h > >> > index 8f08d7628b..474a06f929 100644 > >> > --- a/target/cris/cpu.h > >> > +++ b/target/cris/cpu.h > >> > @@ -195,8 +195,8 @@ void cris_cpu_dump_state(CPUState *cs, FILE > >> *f, int flags); > >> > > >> > hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > > >> > -int crisv10_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *buf, int reg); > >> > -int cris_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int crisv10_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > +int cris_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > /* you can call this signal handler from your SIGBUS and SIGSEGV > >> > diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h > >> > index 801a4fb1ba..d584ad49b4 100644 > >> > --- a/target/hppa/cpu.h > >> > +++ b/target/hppa/cpu.h > >> > @@ -321,7 +321,7 @@ void cpu_hppa_change_prot_id(CPUHPPAState *env)= ; > >> > > >> > int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc); > >> > hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr); > >> > -int hppa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int hppa_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void hppa_cpu_do_interrupt(CPUState *cpu); > >> > bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > >> > index e818fc712a..9ad798c87e 100644 > >> > --- a/target/i386/cpu.h > >> > +++ b/target/i386/cpu.h > >> > @@ -1770,7 +1770,7 @@ void x86_cpu_dump_state(CPUState *cs, FILE > >> *f, int flags); > >> > hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr= , > >> > MemTxAttrs *attrs); > >> > > >> > -int x86_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int x86_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > void x86_cpu_exec_enter(CPUState *cpu); > >> > diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h > >> > index 01d408eb55..b64e7fdc44 100644 > >> > --- a/target/lm32/cpu.h > >> > +++ b/target/lm32/cpu.h > >> > @@ -202,7 +202,7 @@ void lm32_cpu_do_interrupt(CPUState *cpu); > >> > bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req); > >> > void lm32_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int lm32_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int lm32_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > typedef enum { > >> > diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h > >> > index 521ac67cdd..705d26746d 100644 > >> > --- a/target/m68k/cpu.h > >> > +++ b/target/m68k/cpu.h > >> > @@ -168,7 +168,7 @@ void m68k_cpu_do_interrupt(CPUState *cpu); > >> > bool m68k_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void m68k_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int m68k_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int m68k_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > void m68k_tcg_init(void); > >> > diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h > >> > index 1a700a880c..77d6c859ae 100644 > >> > --- a/target/microblaze/cpu.h > >> > +++ b/target/microblaze/cpu.h > >> > @@ -313,7 +313,7 @@ void mb_cpu_do_interrupt(CPUState *cs); > >> > bool mb_cpu_exec_interrupt(CPUState *cs, int int_req); > >> > void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, int reg); > >> > int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > void mb_tcg_init(void); > >> > diff --git a/target/mips/internal.h b/target/mips/internal.h > >> > index 1bf274b3ef..27a9e811f7 100644 > >> > --- a/target/mips/internal.h > >> > +++ b/target/mips/internal.h > >> > @@ -82,7 +82,7 @@ void mips_cpu_do_interrupt(CPUState *cpu); > >> > bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void mips_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int mips_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int mips_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, > >> > MMUAccessType access_type, > >> > diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h > >> > index f37a52e153..1d2d5214c2 100644 > >> > --- a/target/openrisc/cpu.h > >> > +++ b/target/openrisc/cpu.h > >> > @@ -320,7 +320,7 @@ void openrisc_cpu_do_interrupt(CPUState *cpu); > >> > bool openrisc_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)= ; > >> > -int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *buf, int reg); > >> > +int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, > >> int reg); > >> > void openrisc_translate_init(void); > >> > bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > >> > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > >> > index 88d9449555..049400f8d7 100644 > >> > --- a/target/ppc/cpu.h > >> > +++ b/target/ppc/cpu.h > >> > @@ -1207,8 +1207,8 @@ bool ppc_cpu_exec_interrupt(CPUState *cpu, > >> int int_req); > >> > void ppc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > void ppc_cpu_dump_statistics(CPUState *cpu, int flags); > >> > hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int ppc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > -int ppc_cpu_gdb_read_register_apple(CPUState *cpu, GByteArray > >> *buf, int reg); > >> > +int ppc_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > +int ppc_cpu_gdb_read_register_apple(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t > >> *buf, int reg); > >> > #ifndef CONFIG_USER_ONLY > >> > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > >> > index 7d21addbab..806cb3b044 100644 > >> > --- a/target/riscv/cpu.h > >> > +++ b/target/riscv/cpu.h > >> > @@ -293,7 +293,7 @@ extern const char * const riscv_excp_names[]; > >> > extern const char * const riscv_intr_names[]; > >> > > >> > void riscv_cpu_do_interrupt(CPUState *cpu); > >> > -int riscv_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int riscv_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int riscv_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request)= ; > >> > bool riscv_cpu_fp_enabled(CPURISCVState *env); > >> > diff --git a/target/rx/cpu.h b/target/rx/cpu.h > >> > index d1fb1ef3ca..994ab0c6fd 100644 > >> > --- a/target/rx/cpu.h > >> > +++ b/target/rx/cpu.h > >> > @@ -128,7 +128,7 @@ const char *rx_crname(uint8_t cr); > >> > void rx_cpu_do_interrupt(CPUState *cpu); > >> > bool rx_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void rx_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > -int rx_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int rx_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, int reg); > >> > int rx_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > hwaddr rx_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > > >> > diff --git a/target/s390x/internal.h b/target/s390x/internal.h > >> > index 8c95c734db..04fcb7da74 100644 > >> > --- a/target/s390x/internal.h > >> > +++ b/target/s390x/internal.h > >> > @@ -292,7 +292,7 @@ uint16_t float128_dcmask(CPUS390XState *env, > >> float128 f1); > >> > > >> > > >> > /* gdbstub.c */ > >> > -int s390_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int s390_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int s390_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void s390_cpu_gdb_init(CPUState *cs); > >> > > >> > diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h > >> > index dbe58c7888..6901c88d7e 100644 > >> > --- a/target/sh4/cpu.h > >> > +++ b/target/sh4/cpu.h > >> > @@ -208,7 +208,7 @@ void superh_cpu_do_interrupt(CPUState *cpu); > >> > bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void superh_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, > >> > MMUAccessType access_type, > >> > diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h > >> > index b9369398f2..bb9126b546 100644 > >> > --- a/target/sparc/cpu.h > >> > +++ b/target/sparc/cpu.h > >> > @@ -571,7 +571,7 @@ extern const VMStateDescription vmstate_sparc_cpu; > >> > void sparc_cpu_do_interrupt(CPUState *cpu); > >> > void sparc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu, > >> vaddr addr, > >> > MMUAccessType > >> access_type, > >> > diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h > >> > index 7a46dccbe1..8a851e0b00 100644 > >> > --- a/target/xtensa/cpu.h > >> > +++ b/target/xtensa/cpu.h > >> > @@ -572,7 +572,7 @@ void xtensa_cpu_dump_state(CPUState *cpu, > >> FILE *f, int flags); > >> > hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > void xtensa_count_regs(const XtensaConfig *config, > >> > unsigned *n_regs, unsigned *n_core_regs); > >> > -int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, > >> > MMUAccessType access_type, > >> > diff --git a/gdbstub.c b/gdbstub.c > >> > index 171e150950..bc24b613b2 100644 > >> > --- a/gdbstub.c > >> > +++ b/gdbstub.c > >> > @@ -906,19 +906,19 @@ static const char *get_feature_xml(const > >> char *p, const char **newp, > >> > return name ? xml_builtin[i][1] : NULL; > >> > } > >> > > >> > -static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) > >> > +static int gdb_read_register(CPUState *cpu, GByteArray *array, int reg) > >> > { > >> > CPUClass *cc =3D CPU_GET_CLASS(cpu); > >> > CPUArchState *env =3D cpu->env_ptr; > >> > GDBRegisterState *r; > >> > > >> > if (reg < cc->gdb_num_core_regs) { > >> > - return cc->gdb_read_register(cpu, buf, reg); > >> > + return cc->gdb_read_register(cpu, array, reg); > >> > } > >> > > >> > for (r =3D cpu->gdb_regs; r; r =3D r->next) { > >> > if (r->base_reg <=3D reg && reg < r->base_reg + r->num_reg= s) { > >> > - return r->get_reg(env, buf, reg - r->base_reg); > >> > + return r->get_reg(env, array, reg - r->base_reg); > >> > } > >> > } > >> > return 0; > >> > diff --git a/hw/core/cpu.c b/hw/core/cpu.c > >> > index 786a1bec8a..0f2bd00176 100644 > >> > --- a/hw/core/cpu.c > >> > +++ b/hw/core/cpu.c > >> > @@ -177,7 +177,8 @@ static int > >> cpu_common_write_elf64_note(WriteCoreDumpFunction f, > >> > } > >> > > >> > > >> > -static int cpu_common_gdb_read_register(CPUState *cpu, > >> GByteArray *buf, int reg) > >> > +static int cpu_common_gdb_read_register(CPUState *cpu, > >> GByteArray *array, > >> > + int reg) > >> > { > >> > return 0; > >> > } > >> > diff --git a/target/alpha/gdbstub.c b/target/alpha/gdbstub.c > >> > index 0cd76ddaa9..415f422b03 100644 > >> > --- a/target/alpha/gdbstub.c > >> > +++ b/target/alpha/gdbstub.c > >> > @@ -21,7 +21,7 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int alpha_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int alpha_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > AlphaCPU *cpu =3D ALPHA_CPU(cs); > >> > CPUAlphaState *env =3D &cpu->env; > >> > @@ -54,7 +54,7 @@ int alpha_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > default: > >> > return 0; > >> > } > >> > - return gdb_get_regl(mem_buf, val); > >> > + return gdb_get_regl(array, val); > >> > } > >> > > >> > int alpha_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) > >> > diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c > >> > index 063551df23..66a8af8a19 100644 > >> > --- a/target/arm/gdbstub.c > >> > +++ b/target/arm/gdbstub.c > >> > @@ -33,21 +33,21 @@ typedef struct RegisterSysregXmlParam { > >> > We hack round this by giving the FPA regs zero size when talking to a > >> > newer gdb. */ > >> > > >> > -int arm_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int arm_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > ARMCPU *cpu =3D ARM_CPU(cs); > >> > CPUARMState *env =3D &cpu->env; > >> > > >> > if (n < 16) { > >> > /* Core integer register. */ > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } > >> > if (n < 24) { > >> > /* FPA registers. */ > >> > if (gdb_has_xml) { > >> > return 0; > >> > } > >> > - return gdb_get_zeroes(mem_buf, 12); > >> > + return gdb_get_zeroes(array, 12); > >> > } > >> > switch (n) { > >> > case 24: > >> > @@ -55,10 +55,10 @@ int arm_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > if (gdb_has_xml) { > >> > return 0; > >> > } > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > case 25: > >> > /* CPSR */ > >> > - return gdb_get_reg32(mem_buf, cpsr_read(env)); > >> > + return gdb_get_reg32(array, cpsr_read(env)); > >> > } > >> > /* Unknown register. */ > >> > return 0; > >> > diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c > >> > index 35d0b80c2d..16860a0522 100644 > >> > --- a/target/arm/gdbstub64.c > >> > +++ b/target/arm/gdbstub64.c > >> > @@ -20,22 +20,22 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *array, int n) > >> > { > >> > ARMCPU *cpu =3D ARM_CPU(cs); > >> > CPUARMState *env =3D &cpu->env; > >> > > >> > if (n < 31) { > >> > /* Core integer register. */ > >> > - return gdb_get_reg64(mem_buf, env->xregs[n]); > >> > + return gdb_get_reg64(array, env->xregs[n]); > >> > } > >> > switch (n) { > >> > case 31: > >> > - return gdb_get_reg64(mem_buf, env->xregs[31]); > >> > + return gdb_get_reg64(array, env->xregs[31]); > >> > case 32: > >> > - return gdb_get_reg64(mem_buf, env->pc); > >> > + return gdb_get_reg64(array, env->pc); > >> > case 33: > >> > - return gdb_get_reg32(mem_buf, pstate_read(env)); > >> > + return gdb_get_reg32(array, pstate_read(env)); > >> > } > >> > /* Unknown register. */ > >> > return 0; > >> > diff --git a/target/cris/gdbstub.c b/target/cris/gdbstub.c > >> > index b01b2aa081..dd7f754935 100644 > >> > --- a/target/cris/gdbstub.c > >> > +++ b/target/cris/gdbstub.c > >> > @@ -21,31 +21,31 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int crisv10_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int crisv10_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *array, int n) > >> > { > >> > CRISCPU *cpu =3D CRIS_CPU(cs); > >> > CPUCRISState *env =3D &cpu->env; > >> > > >> > if (n < 15) { > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } > >> > > >> > if (n =3D=3D 15) { > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > } > >> > > >> > if (n < 32) { > >> > switch (n) { > >> > case 16: > >> > - return gdb_get_reg8(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg8(array, env->pregs[n - 16]); > >> > case 17: > >> > - return gdb_get_reg8(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg8(array, env->pregs[n - 16]); > >> > case 20: > >> > case 21: > >> > - return gdb_get_reg16(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg16(array, env->pregs[n - 16]); > >> > default: > >> > if (n >=3D 23) { > >> > - return gdb_get_reg32(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg32(array, env->pregs[n - 16]); > >> > } > >> > break; > >> > } > >> > @@ -53,7 +53,7 @@ int crisv10_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > return 0; > >> > } > >> > > >> > -int cris_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int cris_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > CRISCPU *cpu =3D CRIS_CPU(cs); > >> > CPUCRISState *env =3D &cpu->env; > >> > @@ -61,28 +61,28 @@ int cris_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > > >> > srs =3D env->pregs[PR_SRS]; > >> > if (n < 16) { > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } > >> > > >> > if (n >=3D 21 && n < 32) { > >> > - return gdb_get_reg32(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg32(array, env->pregs[n - 16]); > >> > } > >> > if (n >=3D 33 && n < 49) { > >> > - return gdb_get_reg32(mem_buf, env->sregs[srs][n - 33]); > >> > + return gdb_get_reg32(array, env->sregs[srs][n - 33]); > >> > } > >> > switch (n) { > >> > case 16: > >> > - return gdb_get_reg8(mem_buf, env->pregs[0]); > >> > + return gdb_get_reg8(array, env->pregs[0]); > >> > case 17: > >> > - return gdb_get_reg8(mem_buf, env->pregs[1]); > >> > + return gdb_get_reg8(array, env->pregs[1]); > >> > case 18: > >> > - return gdb_get_reg32(mem_buf, env->pregs[2]); > >> > + return gdb_get_reg32(array, env->pregs[2]); > >> > case 19: > >> > - return gdb_get_reg8(mem_buf, srs); > >> > + return gdb_get_reg8(array, srs); > >> > case 20: > >> > - return gdb_get_reg16(mem_buf, env->pregs[4]); > >> > + return gdb_get_reg16(array, env->pregs[4]); > >> > case 32: > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > } > >> > > >> > return 0; > >> > diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c > >> > index a6428a2893..d0618f5175 100644 > >> > --- a/target/hppa/gdbstub.c > >> > +++ b/target/hppa/gdbstub.c > >> > @@ -21,7 +21,7 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int hppa_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int hppa_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > HPPACPU *cpu =3D HPPA_CPU(cs); > >> > CPUHPPAState *env =3D &cpu->env; > >> > @@ -140,9 +140,9 @@ int hppa_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > } > >> > > >> > if (TARGET_REGISTER_BITS =3D=3D 64) { > >> > - return gdb_get_reg64(mem_buf, val); > >> > + return gdb_get_reg64(array, val); > >> > } else { > >> > - return gdb_get_reg32(mem_buf, val); > >> > + return gdb_get_reg32(array, val); > >> > } > >> > } > >> > > >> > diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c > >> > index f3d23b614e..40f1b03a36 100644 > >> > --- a/target/i386/gdbstub.c > >> > +++ b/target/i386/gdbstub.c > >> > @@ -79,7 +79,7 @@ static const int gpr_map32[8] =3D { 0, 1, 2, 3, > >> 4, 5, 6, 7 }; > >> > #endif > >> > > >> > > >> > -int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > X86CPU *cpu =3D X86_CPU(cs); > >> > CPUX86State *env =3D &cpu->env; > >> > @@ -93,25 +93,25 @@ int x86_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > if (n < CPU_NB_REGS) { > >> > if (TARGET_LONG_BITS =3D=3D 64) { > >> > if (env->hflags & HF_CS64_MASK) { > >> > - return gdb_get_reg64(mem_buf, env->regs[gpr_map[n]]); > >> > + return gdb_get_reg64(array, env->regs[gpr_map[n]])= ; > >> > } else if (n < CPU_NB_REGS32) { > >> > - return gdb_get_reg64(mem_buf, > >> > + return gdb_get_reg64(array, > >> > env->regs[gpr_map[n]] & > >> 0xffffffffUL); > >> > } else { > >> > - return gdb_get_regl(mem_buf, 0); > >> > + return gdb_get_regl(array, 0); > >> > } > >> > } else { > >> > - return gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]])= ; > >> > + return gdb_get_reg32(array, env->regs[gpr_map32[n]]); > >> > } > >> > } else if (n >=3D IDX_FP_REGS && n < IDX_FP_REGS + 8) { > >> > floatx80 *fp =3D (floatx80 *) &env->fpregs[n - IDX_FP_REGS= ]; > >> > - int len =3D gdb_get_reg64(mem_buf, cpu_to_le64(fp->low)); > >> > - len +=3D gdb_get_reg16(mem_buf + len, cpu_to_le16(fp->high= )); > >> > + int len =3D gdb_get_reg64(array, cpu_to_le64(fp->low)); > >> > + len +=3D gdb_get_reg16(array + len, cpu_to_le16(fp->high))= ; > >> > return len; > >> > } else if (n >=3D IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { > >> > n -=3D IDX_XMM_REGS; > >> > if (n < CPU_NB_REGS32 || TARGET_LONG_BITS =3D=3D 64) { > >> > - return gdb_get_reg128(mem_buf, > >> > + return gdb_get_reg128(array, > >> > env->xmm_regs[n].ZMM_Q(0), > >> > env->xmm_regs[n].ZMM_Q(1)); > >> > } > >> > @@ -120,95 +120,95 @@ int x86_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > case IDX_IP_REG: > >> > if (TARGET_LONG_BITS =3D=3D 64) { > >> > if (env->hflags & HF_CS64_MASK) { > >> > - return gdb_get_reg64(mem_buf, env->eip); > >> > + return gdb_get_reg64(array, env->eip); > >> > } else { > >> > - return gdb_get_reg64(mem_buf, env->eip & > >> 0xffffffffUL); > >> > + return gdb_get_reg64(array, env->eip & > >> 0xffffffffUL); > >> > } > >> > } else { > >> > - return gdb_get_reg32(mem_buf, env->eip); > >> > + return gdb_get_reg32(array, env->eip); > >> > } > >> > case IDX_FLAGS_REG: > >> > - return gdb_get_reg32(mem_buf, env->eflags); > >> > + return gdb_get_reg32(array, env->eflags); > >> > > >> > case IDX_SEG_REGS: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_CS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_CS].selector); > >> > case IDX_SEG_REGS + 1: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_SS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_SS].selector); > >> > case IDX_SEG_REGS + 2: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_DS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_DS].selector); > >> > case IDX_SEG_REGS + 3: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_ES].selector); > >> > + return gdb_get_reg32(array, env->segs[R_ES].selector); > >> > case IDX_SEG_REGS + 4: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_FS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_FS].selector); > >> > case IDX_SEG_REGS + 5: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_GS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_GS].selector); > >> > > >> > case IDX_SEG_REGS + 6: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->segs[R_FS].base); > >> > + return gdb_get_reg64(array, env->segs[R_FS].base); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->segs[R_FS].base); > >> > + return gdb_get_reg32(array, env->segs[R_FS].base); > >> > > >> > case IDX_SEG_REGS + 7: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->segs[R_GS].base); > >> > + return gdb_get_reg64(array, env->segs[R_GS].base); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->segs[R_GS].base); > >> > + return gdb_get_reg32(array, env->segs[R_GS].base); > >> > > >> > case IDX_SEG_REGS + 8: > >> > #ifdef TARGET_X86_64 > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->kernelgsbase); > >> > + return gdb_get_reg64(array, env->kernelgsbase); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->kernelgsbase); > >> > + return gdb_get_reg32(array, env->kernelgsbase); > >> > #else > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > #endif > >> > > >> > case IDX_FP_REGS + 8: > >> > - return gdb_get_reg32(mem_buf, env->fpuc); > >> > + return gdb_get_reg32(array, env->fpuc); > >> > case IDX_FP_REGS + 9: > >> > - return gdb_get_reg32(mem_buf, (env->fpus & ~0x3800) | > >> > + return gdb_get_reg32(array, (env->fpus & ~0x3800) | > >> > (env->fpstt & 0x7) << 11); > >> > case IDX_FP_REGS + 10: > >> > - return gdb_get_reg32(mem_buf, 0); /* ftag */ > >> > + return gdb_get_reg32(array, 0); /* ftag */ > >> > case IDX_FP_REGS + 11: > >> > - return gdb_get_reg32(mem_buf, 0); /* fiseg */ > >> > + return gdb_get_reg32(array, 0); /* fiseg */ > >> > case IDX_FP_REGS + 12: > >> > - return gdb_get_reg32(mem_buf, 0); /* fioff */ > >> > + return gdb_get_reg32(array, 0); /* fioff */ > >> > case IDX_FP_REGS + 13: > >> > - return gdb_get_reg32(mem_buf, 0); /* foseg */ > >> > + return gdb_get_reg32(array, 0); /* foseg */ > >> > case IDX_FP_REGS + 14: > >> > - return gdb_get_reg32(mem_buf, 0); /* fooff */ > >> > + return gdb_get_reg32(array, 0); /* fooff */ > >> > case IDX_FP_REGS + 15: > >> > - return gdb_get_reg32(mem_buf, 0); /* fop */ > >> > + return gdb_get_reg32(array, 0); /* fop */ > >> > > >> > case IDX_MXCSR_REG: > >> > - return gdb_get_reg32(mem_buf, env->mxcsr); > >> > + return gdb_get_reg32(array, env->mxcsr); > >> > > >> > case IDX_CTL_CR0_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->cr[0]); > >> > + return gdb_get_reg64(array, env->cr[0]); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->cr[0]); > >> > + return gdb_get_reg32(array, env->cr[0]); > >> > > >> > case IDX_CTL_CR2_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->cr[2]); > >> > + return gdb_get_reg64(array, env->cr[2]); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->cr[2]); > >> > + return gdb_get_reg32(array, env->cr[2]); > >> > > >> > case IDX_CTL_CR3_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->cr[3]); > >> > + return gdb_get_reg64(array, env->cr[3]); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->cr[3]); > >> > + return gdb_get_reg32(array, env->cr[3]); > >> > > >> > case IDX_CTL_CR4_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->cr[4]); > >> > + return gdb_get_reg64(array, env->cr[4]); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->cr[4]); > >> > + return gdb_get_reg32(array, env->cr[4]); > >> > > >> > case IDX_CTL_CR8_REG: > >> > #ifdef CONFIG_SOFTMMU > >> > @@ -217,15 +217,15 @@ int x86_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > tpr =3D 0; > >> > #endif > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, tpr); > >> > + return gdb_get_reg64(array, tpr); > >> > } > >> > - return gdb_get_reg32(mem_buf, tpr); > >> > + return gdb_get_reg32(array, tpr); > >> > > >> > case IDX_CTL_EFER_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->efer); > >> > + return gdb_get_reg64(array, env->efer); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->efer); > >> > + return gdb_get_reg32(array, env->efer); > >> > } > >> > } > >> > return 0; > >> > diff --git a/target/lm32/gdbstub.c b/target/lm32/gdbstub.c > >> > index b6fe12e1d6..6198719944 100644 > >> > --- a/target/lm32/gdbstub.c > >> > +++ b/target/lm32/gdbstub.c > >> > @@ -22,30 +22,30 @@ > >> > #include "exec/gdbstub.h" > >> > #include "hw/lm32/lm32_pic.h" > >> > > >> > -int lm32_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int lm32_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > LM32CPU *cpu =3D LM32_CPU(cs); > >> > CPULM32State *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } else { > >> > switch (n) { > >> > case 32: > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > /* FIXME: put in right exception ID */ > >> > case 33: > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > case 34: > >> > - return gdb_get_reg32(mem_buf, env->eba); > >> > + return gdb_get_reg32(array, env->eba); > >> > case 35: > >> > - return gdb_get_reg32(mem_buf, env->deba); > >> > + return gdb_get_reg32(array, env->deba); > >> > case 36: > >> > - return gdb_get_reg32(mem_buf, env->ie); > >> > + return gdb_get_reg32(array, env->ie); > >> > case 37: > >> > - return gdb_get_reg32(mem_buf, > >> lm32_pic_get_im(env->pic_state)); > >> > + return gdb_get_reg32(array, > >> lm32_pic_get_im(env->pic_state)); > >> > case 38: > >> > - return gdb_get_reg32(mem_buf, > >> lm32_pic_get_ip(env->pic_state)); > >> > + return gdb_get_reg32(array, > >> lm32_pic_get_ip(env->pic_state)); > >> > } > >> > } > >> > return 0; > >> > diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c > >> > index eb2d030e14..9405dc4b4e 100644 > >> > --- a/target/m68k/gdbstub.c > >> > +++ b/target/m68k/gdbstub.c > >> > @@ -21,24 +21,24 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int m68k_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int m68k_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > M68kCPU *cpu =3D M68K_CPU(cs); > >> > CPUM68KState *env =3D &cpu->env; > >> > > >> > if (n < 8) { > >> > /* D0-D7 */ > >> > - return gdb_get_reg32(mem_buf, env->dregs[n]); > >> > + return gdb_get_reg32(array, env->dregs[n]); > >> > } else if (n < 16) { > >> > /* A0-A7 */ > >> > - return gdb_get_reg32(mem_buf, env->aregs[n - 8]); > >> > + return gdb_get_reg32(array, env->aregs[n - 8]); > >> > } else { > >> > switch (n) { > >> > case 16: > >> > /* SR is made of SR+CCR, CCR is many 1bit flags so > >> uses helper */ > >> > - return gdb_get_reg32(mem_buf, env->sr | > >> cpu_m68k_get_ccr(env)); > >> > + return gdb_get_reg32(array, env->sr | > >> cpu_m68k_get_ccr(env)); > >> > case 17: > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > } > >> > } > >> > /* > >> > diff --git a/target/m68k/helper.c b/target/m68k/helper.c > >> > index 014657c637..968371476a 100644 > >> > --- a/target/m68k/helper.c > >> > +++ b/target/m68k/helper.c > >> > @@ -68,19 +68,19 @@ void m68k_cpu_list(void) > >> > g_slist_free(list); > >> > } > >> > > >> > -static int cf_fpu_gdb_get_reg(CPUM68KState *env, GByteArray > >> *mem_buf, int n) > >> > +static int cf_fpu_gdb_get_reg(CPUM68KState *env, GByteArray > >> *array, int n) > >> > { > >> > if (n < 8) { > >> > float_status s; > >> > - return gdb_get_reg64(mem_buf, > >> floatx80_to_float64(env->fregs[n].d, &s)); > >> > + return gdb_get_reg64(array, > >> floatx80_to_float64(env->fregs[n].d, &s)); > >> > } > >> > switch (n) { > >> > case 8: /* fpcontrol */ > >> > - return gdb_get_reg32(mem_buf, env->fpcr); > >> > + return gdb_get_reg32(array, env->fpcr); > >> > case 9: /* fpstatus */ > >> > - return gdb_get_reg32(mem_buf, env->fpsr); > >> > + return gdb_get_reg32(array, env->fpsr); > >> > case 10: /* fpiar, not implemented */ > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > } > >> > return 0; > >> > } > >> > @@ -105,21 +105,21 @@ static int cf_fpu_gdb_set_reg(CPUM68KState > >> *env, uint8_t *mem_buf, int n) > >> > return 0; > >> > } > >> > > >> > -static int m68k_fpu_gdb_get_reg(CPUM68KState *env, GByteArray > >> *mem_buf, int n) > >> > +static int m68k_fpu_gdb_get_reg(CPUM68KState *env, GByteArray > >> *array, int n) > >> > { > >> > if (n < 8) { > >> > - int len =3D gdb_get_reg16(mem_buf, env->fregs[n].l.upper); > >> > - len +=3D gdb_get_reg16(mem_buf + len, 0); > >> > - len +=3D gdb_get_reg64(mem_buf + len, env->fregs[n].l.lowe= r); > >> > + int len =3D gdb_get_reg16(array, env->fregs[n].l.upper); > >> > + len +=3D gdb_get_reg16(array + len, 0); > >> > + len +=3D gdb_get_reg64(array + len, env->fregs[n].l.lower)= ; > >> > return len; > >> > } > >> > switch (n) { > >> > case 8: /* fpcontrol */ > >> > - return gdb_get_reg32(mem_buf, env->fpcr); > >> > + return gdb_get_reg32(array, env->fpcr); > >> > case 9: /* fpstatus */ > >> > - return gdb_get_reg32(mem_buf, env->fpsr); > >> > + return gdb_get_reg32(array, env->fpsr); > >> > case 10: /* fpiar, not implemented */ > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > } > >> > return 0; > >> > } > >> > diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c > >> > index f41ebf1f33..40d41e12ce 100644 > >> > --- a/target/microblaze/gdbstub.c > >> > +++ b/target/microblaze/gdbstub.c > >> > @@ -21,15 +21,15 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > MicroBlazeCPU *cpu =3D MICROBLAZE_CPU(cs); > >> > CPUMBState *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } else { > >> > - return gdb_get_reg32(mem_buf, env->sregs[n - 32]); > >> > + return gdb_get_reg32(array, env->sregs[n - 32]); > >> > } > >> > return 0; > >> > } > >> > diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c > >> > index 98f56e660d..0fc957d5cd 100644 > >> > --- a/target/mips/gdbstub.c > >> > +++ b/target/mips/gdbstub.c > >> > @@ -22,54 +22,54 @@ > >> > #include "internal.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int mips_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int mips_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > MIPSCPU *cpu =3D MIPS_CPU(cs); > >> > CPUMIPSState *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_regl(mem_buf, env->active_tc.gpr[n]); > >> > + return gdb_get_regl(array, env->active_tc.gpr[n]); > >> > } > >> > if (env->CP0_Config1 & (1 << CP0C1_FP) && n >=3D 38 && n < 72)= { > >> > switch (n) { > >> > case 70: > >> > - return gdb_get_regl(mem_buf, > >> (int32_t)env->active_fpu.fcr31); > >> > + return gdb_get_regl(array, (int32_t)env->active_fpu.fcr31); > >> > case 71: > >> > - return gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr0); > >> > + return gdb_get_regl(array, (int32_t)env->active_fpu.fcr0); > >> > default: > >> > if (env->CP0_Status & (1 << CP0St_FR)) { > >> > - return gdb_get_regl(mem_buf, > >> > + return gdb_get_regl(array, > >> > env->active_fpu.fpr[n - 38].d); > >> > } else { > >> > - return gdb_get_regl(mem_buf, > >> > + return gdb_get_regl(array, > >> > env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]); > >> > } > >> > } > >> > } > >> > switch (n) { > >> > case 32: > >> > - return gdb_get_regl(mem_buf, (int32_t)env->CP0_Status); > >> > + return gdb_get_regl(array, (int32_t)env->CP0_Status); > >> > case 33: > >> > - return gdb_get_regl(mem_buf, env->active_tc.LO[0]); > >> > + return gdb_get_regl(array, env->active_tc.LO[0]); > >> > case 34: > >> > - return gdb_get_regl(mem_buf, env->active_tc.HI[0]); > >> > + return gdb_get_regl(array, env->active_tc.HI[0]); > >> > case 35: > >> > - return gdb_get_regl(mem_buf, env->CP0_BadVAddr); > >> > + return gdb_get_regl(array, env->CP0_BadVAddr); > >> > case 36: > >> > - return gdb_get_regl(mem_buf, (int32_t)env->CP0_Cause); > >> > + return gdb_get_regl(array, (int32_t)env->CP0_Cause); > >> > case 37: > >> > - return gdb_get_regl(mem_buf, env->active_tc.PC | > >> > + return gdb_get_regl(array, env->active_tc.PC | > >> > !!(env->hflags & MIPS_HFLAG_M16)); > >> > case 72: > >> > - return gdb_get_regl(mem_buf, 0); /* fp */ > >> > + return gdb_get_regl(array, 0); /* fp */ > >> > case 89: > >> > - return gdb_get_regl(mem_buf, (int32_t)env->CP0_PRid); > >> > + return gdb_get_regl(array, (int32_t)env->CP0_PRid); > >> > default: > >> > if (n > 89) { > >> > return 0; > >> > } > >> > /* 16 embedded regs. */ > >> > - return gdb_get_regl(mem_buf, 0); > >> > + return gdb_get_regl(array, 0); > >> > } > >> > > >> > return 0; > >> > diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c > >> > index 8f7011fcb9..3cf696402f 100644 > >> > --- a/target/nios2/cpu.c > >> > +++ b/target/nios2/cpu.c > >> > @@ -124,7 +124,7 @@ static void nios2_cpu_disas_set_info(CPUState > >> *cpu, disassemble_info *info) > >> > #endif > >> > } > >> > > >> > -static int nios2_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +static int nios2_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *array, int n) > >> > { > >> > Nios2CPU *cpu =3D NIOS2_CPU(cs); > >> > CPUClass *cc =3D CPU_GET_CLASS(cs); > >> > @@ -135,11 +135,11 @@ static int > >> nios2_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int > >> n) > >> > } > >> > > >> > if (n < 32) { /* GP regs */ > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } else if (n =3D=3D 32) { /* PC */ > >> > - return gdb_get_reg32(mem_buf, env->regs[R_PC]); > >> > + return gdb_get_reg32(array, env->regs[R_PC]); > >> > } else if (n < 49) { /* Status regs */ > >> > - return gdb_get_reg32(mem_buf, env->regs[n - 1]); > >> > + return gdb_get_reg32(array, env->regs[n - 1]); > >> > } > >> > > >> > /* Invalid regs */ > >> > diff --git a/target/openrisc/gdbstub.c b/target/openrisc/gdbstub.c > >> > index 095bf76c12..c34d3696ec 100644 > >> > --- a/target/openrisc/gdbstub.c > >> > +++ b/target/openrisc/gdbstub.c > >> > @@ -21,23 +21,23 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int openrisc_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int openrisc_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *array, int n) > >> > { > >> > OpenRISCCPU *cpu =3D OPENRISC_CPU(cs); > >> > CPUOpenRISCState *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_reg32(mem_buf, cpu_get_gpr(env, n)); > >> > + return gdb_get_reg32(array, cpu_get_gpr(env, n)); > >> > } else { > >> > switch (n) { > >> > case 32: /* PPC */ > >> > - return gdb_get_reg32(mem_buf, env->ppc); > >> > + return gdb_get_reg32(array, env->ppc); > >> > > >> > case 33: /* NPC (equals PC) */ > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > > >> > case 34: /* SR */ > >> > - return gdb_get_reg32(mem_buf, cpu_get_sr(env)); > >> > + return gdb_get_reg32(array, cpu_get_sr(env)); > >> > > >> > default: > >> > break; > >> > diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c > >> > index eba12a86f2..8e1d64c1cf 100644 > >> > --- a/target/riscv/gdbstub.c > >> > +++ b/target/riscv/gdbstub.c > >> > @@ -270,15 +270,15 @@ static int csr_register_map[] =3D { > >> > CSR_MHCOUNTEREN, > >> > }; > >> > > >> > -int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > RISCVCPU *cpu =3D RISCV_CPU(cs); > >> > CPURISCVState *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_regl(mem_buf, env->gpr[n]); > >> > + return gdb_get_regl(array, env->gpr[n]); > >> > } else if (n =3D=3D 32) { > >> > - return gdb_get_regl(mem_buf, env->pc); > >> > + return gdb_get_regl(array, env->pc); > >> > } > >> > return 0; > >> > } > >> > diff --git a/target/rx/gdbstub.c b/target/rx/gdbstub.c > >> > index 9391e8151e..91dee774f6 100644 > >> > --- a/target/rx/gdbstub.c > >> > +++ b/target/rx/gdbstub.c > >> > @@ -20,32 +20,32 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > RXCPU *cpu =3D RXCPU(cs); > >> > CPURXState *env =3D &cpu->env; > >> > > >> > switch (n) { > >> > case 0 ... 15: > >> > - return gdb_get_regl(mem_buf, env->regs[n]); > >> > + return gdb_get_regl(array, env->regs[n]); > >> > case 16: > >> > - return gdb_get_regl(mem_buf, (env->psw_u) ? env->regs[0] > >> : env->usp); > >> > + return gdb_get_regl(array, (env->psw_u) ? env->regs[0] : > >> env->usp); > >> > case 17: > >> > - return gdb_get_regl(mem_buf, (!env->psw_u) ? > >> env->regs[0] : env->isp); > >> > + return gdb_get_regl(array, (!env->psw_u) ? env->regs[0] > >> : env->isp); > >> > case 18: > >> > - return gdb_get_regl(mem_buf, rx_cpu_pack_psw(env)); > >> > + return gdb_get_regl(array, rx_cpu_pack_psw(env)); > >> > case 19: > >> > - return gdb_get_regl(mem_buf, env->pc); > >> > + return gdb_get_regl(array, env->pc); > >> > case 20: > >> > - return gdb_get_regl(mem_buf, env->intb); > >> > + return gdb_get_regl(array, env->intb); > >> > case 21: > >> > - return gdb_get_regl(mem_buf, env->bpsw); > >> > + return gdb_get_regl(array, env->bpsw); > >> > case 22: > >> > - return gdb_get_regl(mem_buf, env->bpc); > >> > + return gdb_get_regl(array, env->bpc); > >> > case 23: > >> > - return gdb_get_regl(mem_buf, env->fintv); > >> > + return gdb_get_regl(array, env->fintv); > >> > case 24: > >> > - return gdb_get_regl(mem_buf, env->fpsw); > >> > + return gdb_get_regl(array, env->fpsw); > >> > case 25: > >> > return 0; > >> > } > >> > diff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c > >> > index d6fce5ff1e..adbe7b5d39 100644 > >> > --- a/target/s390x/gdbstub.c > >> > +++ b/target/s390x/gdbstub.c > >> > @@ -27,7 +27,7 @@ > >> > #include "sysemu/hw_accel.h" > >> > #include "sysemu/tcg.h" > >> > > >> > -int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > S390CPU *cpu =3D S390_CPU(cs); > >> --0000000000004018db05a34199ba Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

4:26 PM Uto, 14.04.2020. Alex Benn=C3=A9e <alex.bennee@linaro.org> =D1=98=D0=B5 =D0= =BD=D0=B0=D0=BF=D0=B8=D1=81=D0=B0=D0=BE/=D0=BB=D0=B0:
>
>
> Philippe Mathieu-Daud=C3=A9 <p= hilmd@redhat.com> writes:
>
> > On 4/14/20 3:35 PM, Aleksandar Markovic wrote:
> >> 1:28 PM Uto, 14.04.2020. Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com
> >> <mailto:philmd@redhat= .com>> =D1=98=D0=B5 =D0=BD=D0=B0=D0=BF=D0=B8=D1=81=D0=B0=D0=BE/= =D0=BB=D0=B0:
> >>=C2=A0 >
> >>=C2=A0 > GByteArray type has should not be treated as a u8[= ] buffer.
> >>=C2=A0 > The GLib Byte Arrays API should be used instead. > >>=C2=A0 > Rename the 'mem_buf' variable as 'arra= y' to make it more
> >>=C2=A0 > obvious in the code.
> >>=C2=A0 >
> >> Hi, Philippe.
> >> "array" is a horrible choice for a name. It must be= more specific.
> >
> > This is how the prototype is documented:
> >
> > https://developer.gnome.org/glib/stable/glib-B= yte-Arrays.html#g-byte-array-append
> >
> > GByteArray *
> > g_byte_array_append (GByteArray *array,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 const guint8 *data,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 guint len);
> >
> > What do you suggest?
>
> *buf was also pretty generic. That said I think the "array"-= like
> properties of this structure are fairly incidental to it's purpose= which
> is a opaque place to store the register data for gdbstub. As we alread= y
> communicate the type in the function prototype maybe *reg or *regdata?=
>

I am not a frequent user of this interface, but mostly as an= observer, Alex' "regdata" seems a reasonable choice to me.

Does anybody happen to have a better idea?

Regards,
Aleksandar

> >
> >> Regards,
> >> Aleksandar
> >>=C2=A0 > Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com
> >> <mailto:philmd@redhat= .com>>
> >>=C2=A0 > ---
> >>=C2=A0 > Based-on: <20200414111846.27495-1-philmd@redhat.com
> >> <mailto:20200414111846.27495-1-philmd@redhat.com>>
> >>=C2=A0 > Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com
> >> <mailto:philmd@redhat= .com>>
> >>=C2=A0 > ---
> >>=C2=A0 >=C2=A0 include/exec/gdbstub.h=C2=A0 =C2=A0 =C2=A0 |= 34 +++++++-------
> >>=C2=A0 >=C2=A0 include/hw/core/cpu.h=C2=A0 =C2=A0 =C2=A0 = =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/alpha/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 |=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/arm/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 |=C2=A0 4 +-
> >>=C2=A0 >=C2=A0 target/cris/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 4 +-
> >>=C2=A0 >=C2=A0 target/hppa/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/i386/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/lm32/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/m68k/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/microblaze/cpu.h=C2=A0 =C2=A0 =C2=A0|= =C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/mips/internal.h=C2=A0 =C2=A0 =C2=A0 |= =C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/openrisc/cpu.h=C2=A0 =C2=A0 =C2=A0 = =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/ppc/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 |=C2=A0 4 +-
> >>=C2=A0 >=C2=A0 target/riscv/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 |=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/rx/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/s390x/internal.h=C2=A0 =C2=A0 =C2=A0|= =C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/sh4/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 |=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/sparc/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 |=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/xtensa/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 gdbstub.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 6 +--
> >>=C2=A0 >=C2=A0 hw/core/cpu.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 3 +-
> >>=C2=A0 >=C2=A0 target/alpha/gdbstub.c=C2=A0 =C2=A0 =C2=A0 |= =C2=A0 4 +-
> >>=C2=A0 >=C2=A0 target/arm/gdbstub.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 | 10 ++--
> >>=C2=A0 >=C2=A0 target/arm/gdbstub64.c=C2=A0 =C2=A0 =C2=A0 |= 10 ++--
> >>=C2=A0 >=C2=A0 target/cris/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 34 +++++++-------
> >>=C2=A0 >=C2=A0 target/hppa/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0|=C2=A0 6 +--
> >>=C2=A0 >=C2=A0 target/i386/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 92 ++++++++++++++++++-------------------
> >>=C2=A0 >=C2=A0 target/lm32/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 18 ++++----
> >>=C2=A0 >=C2=A0 target/m68k/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 10 ++--
> >>=C2=A0 >=C2=A0 target/m68k/helper.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 | 24 +++++-----
> >>=C2=A0 >=C2=A0 target/microblaze/gdbstub.c |=C2=A0 6 +-- > >>=C2=A0 >=C2=A0 target/mips/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 30 ++++++------
> >>=C2=A0 >=C2=A0 target/nios2/cpu.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 |=C2=A0 8 ++--
> >>=C2=A0 >=C2=A0 target/openrisc/gdbstub.c=C2=A0 =C2=A0| 10 += +--
> >>=C2=A0 >=C2=A0 target/riscv/gdbstub.c=C2=A0 =C2=A0 =C2=A0 |= =C2=A0 6 +--
> >>=C2=A0 >=C2=A0 target/rx/gdbstub.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0| 22 ++++-----
> >>=C2=A0 >=C2=A0 target/s390x/gdbstub.c=C2=A0 =C2=A0 =C2=A0 |= 28 +++++------
> >>=C2=A0 >=C2=A0 target/sh4/gdbstub.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 | 38 +++++++--------
> >>=C2=A0 >=C2=A0 target/sparc/gdbstub.c=C2=A0 =C2=A0 =C2=A0 |= 46 +++++++++----------
> >>=C2=A0 >=C2=A0 target/xtensa/gdbstub.c=C2=A0 =C2=A0 =C2=A0|= 20 ++++----
> >>=C2=A0 >=C2=A0 40 files changed, 254 insertions(+), 253 del= etions(-)
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/include/exec/gdbstub.h b/include/exec= /gdbstub.h
> >>=C2=A0 > index 52a4a936c6..29150d1344 100644
> >>=C2=A0 > --- a/include/exec/gdbstub.h
> >>=C2=A0 > +++ b/include/exec/gdbstub.h
> >>=C2=A0 > @@ -80,47 +80,47 @@ void gdb_register_coprocessor(= CPUState *cpu,
> >>=C2=A0 >=C2=A0 =C2=A0* append to the array.
> >>=C2=A0 >=C2=A0 =C2=A0*/
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg8(GByteArray *buf, u= int8_t val)
> >>=C2=A0 > +static inline int gdb_get_reg8(GByteArray *array,= uint8_t val)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, &val, = 1);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, &val= , 1);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 1;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg16(GByteArray *buf, = uint16_t val)
> >>=C2=A0 > +static inline int gdb_get_reg16(GByteArray *array= , uint16_t val)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 uint16_t to_word =3D tswap16(v= al);
> >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_word, 2);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_word, 2);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 2;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg32(GByteArray *buf, = uint32_t val)
> >>=C2=A0 > +static inline int gdb_get_reg32(GByteArray *array= , uint32_t val)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 uint32_t to_long =3D tswap32(v= al);
> >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_long, 4);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_long, 4);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 4;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg64(GByteArray *buf, = uint64_t val)
> >>=C2=A0 > +static inline int gdb_get_reg64(GByteArray *array= , uint64_t val)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 uint64_t to_quad =3D tswap64(v= al);
> >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 8;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg128(GByteArray *buf,= uint64_t val_hi,
> >>=C2=A0 > +static inline int gdb_get_reg128(GByteArray *arra= y, uint64_t val_hi,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0uint64_t val_lo)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 uint64_t to_quad;
> >>=C2=A0 >=C2=A0 #ifdef TARGET_WORDS_BIGENDIAN
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 to_quad =3D tswap64(val_hi); > >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 to_quad =3D tswap64(val_lo); > >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 #else
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 to_quad =3D tswap64(val_lo); > >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 to_quad =3D tswap64(val_hi); > >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 16;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > @@ -154,16 +154,16 @@ static inline int gdb_get_ze= roes(GByteArray
> >> *array, size_t len)
> >>=C2=A0 >=C2=A0 =C2=A0* element for additional processing. S= ome front-ends do additional
> >>=C2=A0 >=C2=A0 =C2=A0* dynamic swapping of the elements bas= ed on CPU state.
> >>=C2=A0 >=C2=A0 =C2=A0*/
> >>=C2=A0 > -static inline uint8_t * gdb_get_reg_ptr(GByteArra= y *buf, int len)
> >>=C2=A0 > +static inline uint8_t *gdb_get_reg_ptr(GByteArray= *array, int len)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 > -=C2=A0 =C2=A0 return buf->data + buf->len -= len;
> >>=C2=A0 > +=C2=A0 =C2=A0 return array->data + array->l= en - len;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 #if TARGET_LONG_BITS =3D=3D 64
> >>=C2=A0 > -#define gdb_get_regl(buf, val) gdb_get_reg64(buf,= val)
> >>=C2=A0 > +#define gdb_get_regl(array, val) gdb_get_reg64(ar= ray, val)
> >>=C2=A0 >=C2=A0 #define ldtul_p(addr) ldq_p(addr)
> >>=C2=A0 >=C2=A0 #else
> >>=C2=A0 > -#define gdb_get_regl(buf, val) gdb_get_reg32(buf,= val)
> >>=C2=A0 > +#define gdb_get_regl(array, val) gdb_get_reg32(ar= ray, val)
> >>=C2=A0 >=C2=A0 #define ldtul_p(addr) ldl_p(addr)
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/include/hw/core/cpu.h b/include/hw/co= re/cpu.h
> >>=C2=A0 > index 5bf94d28cf..31434d3b1f 100644
> >>=C2=A0 > --- a/include/hw/core/cpu.h
> >>=C2=A0 > +++ b/include/hw/core/cpu.h
> >>=C2=A0 > @@ -193,7 +193,7 @@ typedef struct CPUClass {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 hwaddr (*get_phys_page_attrs_d= ebug)(CPUState *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 MemTxAttrs *attrs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 int (*asidx_from_attrs)(CPUSta= te *cpu, MemTxAttrs attrs);
> >>=C2=A0 > -=C2=A0 =C2=A0 int (*gdb_read_register)(CPUState *= cpu, GByteArray *buf, int reg);
> >>=C2=A0 > +=C2=A0 =C2=A0 int (*gdb_read_register)(CPUState *= cpu, GByteArray *array, int reg);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 int (*gdb_write_register)(CPUS= tate *cpu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 bool (*debug_check_watchpoint)= (CPUState *cpu, CPUWatchpoint *wp);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 void (*debug_excp_handler)(CPU= State *cpu);
> >>=C2=A0 > diff --git a/target/alpha/cpu.h b/target/alpha/cpu= .h
> >>=C2=A0 > index be29bdd530..94853d0bee 100644
> >>=C2=A0 > --- a/target/alpha/cpu.h
> >>=C2=A0 > +++ b/target/alpha/cpu.h
> >>=C2=A0 > @@ -280,7 +280,7 @@ void alpha_cpu_do_interrupt(CP= UState *cpu);
> >>=C2=A0 >=C2=A0 bool alpha_cpu_exec_interrupt(CPUState *cpu,= int int_req);
> >>=C2=A0 >=C2=A0 void alpha_cpu_dump_state(CPUState *cs, FILE= *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr alpha_cpu_get_phys_page_debug(CPUStat= e *cpu, vaddr addr);
> >>=C2=A0 > -int alpha_cpu_gdb_read_register(CPUState *cpu, GB= yteArray *buf,
> >> int reg);
> >>=C2=A0 > +int alpha_cpu_gdb_read_register(CPUState *cpu, GB= yteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int alpha_cpu_gdb_write_register(CPUState *c= pu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void alpha_cpu_do_unaligned_access(CPUState = *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0MMUAccessType access_type,
> >>=C2=A0 > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > >>=C2=A0 > index 8b9f2961ba..cbd3a262f3 100644
> >>=C2=A0 > --- a/target/arm/cpu.h
> >>=C2=A0 > +++ b/target/arm/cpu.h
> >>=C2=A0 > @@ -975,7 +975,7 @@ bool arm_cpu_exec_interrupt(CP= UState *cpu,
> >> int int_req);
> >>=C2=A0 >=C2=A0 hwaddr arm_cpu_get_phys_page_attrs_debug(CPU= State *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MemTxAttrs *attrs);
> >>=C2=A0 >
> >>=C2=A0 > -int arm_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *buf, int reg);
> >>=C2=A0 > +int arm_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int arm_cpu_gdb_write_register(CPUState *cpu= , uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 /*
> >>=C2=A0 > @@ -997,7 +997,7 @@ int
> >> arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *c= s,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0int cpuid, vo= id *opaque);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 #ifdef TARGET_AARCH64
> >>=C2=A0 > -int aarch64_cpu_gdb_read_register(CPUState *cpu, = GByteArray
> >> *buf, int reg);
> >>=C2=A0 > +int aarch64_cpu_gdb_read_register(CPUState *cpu, = GByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int aarch64_cpu_gdb_write_register(CPUState = *cpu, uint8_t *buf,
> >> int reg);
> >>=C2=A0 >=C2=A0 void aarch64_sve_narrow_vq(CPUARMState *env,= unsigned vq);
> >>=C2=A0 >=C2=A0 void aarch64_sve_change_el(CPUARMState *env,= int old_el,
> >>=C2=A0 > diff --git a/target/cris/cpu.h b/target/cris/cpu.h=
> >>=C2=A0 > index 8f08d7628b..474a06f929 100644
> >>=C2=A0 > --- a/target/cris/cpu.h
> >>=C2=A0 > +++ b/target/cris/cpu.h
> >>=C2=A0 > @@ -195,8 +195,8 @@ void cris_cpu_dump_state(CPUSt= ate *cs, FILE
> >> *f, int flags);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 hwaddr cris_cpu_get_phys_page_debug(CPUState= *cpu, vaddr addr);
> >>=C2=A0 >
> >>=C2=A0 > -int crisv10_cpu_gdb_read_register(CPUState *cpu, = GByteArray
> >> *buf, int reg);
> >>=C2=A0 > -int cris_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int crisv10_cpu_gdb_read_register(CPUState *cpu, = GByteArray
> >> *array, int reg);
> >>=C2=A0 > +int cris_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int cris_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 /* you can call this signal handler from you= r SIGBUS and SIGSEGV
> >>=C2=A0 > diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h=
> >>=C2=A0 > index 801a4fb1ba..d584ad49b4 100644
> >>=C2=A0 > --- a/target/hppa/cpu.h
> >>=C2=A0 > +++ b/target/hppa/cpu.h
> >>=C2=A0 > @@ -321,7 +321,7 @@ void cpu_hppa_change_prot_id(C= PUHPPAState *env);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 int cpu_hppa_signal_handler(int host_signum,= void *pinfo, void *puc);
> >>=C2=A0 >=C2=A0 hwaddr hppa_cpu_get_phys_page_debug(CPUState= *cs, vaddr addr);
> >>=C2=A0 > -int hppa_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int hppa_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int hppa_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void hppa_cpu_do_interrupt(CPUState *cpu); > >>=C2=A0 >=C2=A0 bool hppa_cpu_exec_interrupt(CPUState *cpu, = int int_req);
> >>=C2=A0 > diff --git a/target/i386/cpu.h b/target/i386/cpu.h=
> >>=C2=A0 > index e818fc712a..9ad798c87e 100644
> >>=C2=A0 > --- a/target/i386/cpu.h
> >>=C2=A0 > +++ b/target/i386/cpu.h
> >>=C2=A0 > @@ -1770,7 +1770,7 @@ void x86_cpu_dump_state(CPUS= tate *cs, FILE
> >> *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr x86_cpu_get_phys_page_attrs_debug(CPU= State *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MemTxAttrs *attrs);
> >>=C2=A0 >
> >>=C2=A0 > -int x86_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *buf, int reg);
> >>=C2=A0 > +int x86_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int x86_cpu_gdb_write_register(CPUState *cpu= , uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 void x86_cpu_exec_enter(CPUState *cpu);
> >>=C2=A0 > diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h=
> >>=C2=A0 > index 01d408eb55..b64e7fdc44 100644
> >>=C2=A0 > --- a/target/lm32/cpu.h
> >>=C2=A0 > +++ b/target/lm32/cpu.h
> >>=C2=A0 > @@ -202,7 +202,7 @@ void lm32_cpu_do_interrupt(CPU= State *cpu);
> >>=C2=A0 >=C2=A0 bool lm32_cpu_exec_interrupt(CPUState *cs, i= nt int_req);
> >>=C2=A0 >=C2=A0 void lm32_cpu_dump_state(CPUState *cpu, FILE= *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr lm32_cpu_get_phys_page_debug(CPUState= *cpu, vaddr addr);
> >>=C2=A0 > -int lm32_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int lm32_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int lm32_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 typedef enum {
> >>=C2=A0 > diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h=
> >>=C2=A0 > index 521ac67cdd..705d26746d 100644
> >>=C2=A0 > --- a/target/m68k/cpu.h
> >>=C2=A0 > +++ b/target/m68k/cpu.h
> >>=C2=A0 > @@ -168,7 +168,7 @@ void m68k_cpu_do_interrupt(CPU= State *cpu);
> >>=C2=A0 >=C2=A0 bool m68k_cpu_exec_interrupt(CPUState *cpu, = int int_req);
> >>=C2=A0 >=C2=A0 void m68k_cpu_dump_state(CPUState *cpu, FILE= *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr m68k_cpu_get_phys_page_debug(CPUState= *cpu, vaddr addr);
> >>=C2=A0 > -int m68k_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int m68k_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int m68k_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 void m68k_tcg_init(void);
> >>=C2=A0 > diff --git a/target/microblaze/cpu.h b/target/micr= oblaze/cpu.h
> >>=C2=A0 > index 1a700a880c..77d6c859ae 100644
> >>=C2=A0 > --- a/target/microblaze/cpu.h
> >>=C2=A0 > +++ b/target/microblaze/cpu.h
> >>=C2=A0 > @@ -313,7 +313,7 @@ void mb_cpu_do_interrupt(CPUSt= ate *cs);
> >>=C2=A0 >=C2=A0 bool mb_cpu_exec_interrupt(CPUState *cs, int= int_req);
> >>=C2=A0 >=C2=A0 void mb_cpu_dump_state(CPUState *cpu, FILE *= f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr mb_cpu_get_phys_page_debug(CPUState *= cpu, vaddr addr);
> >>=C2=A0 > -int mb_cpu_gdb_read_register(CPUState *cpu, GByte= Array *buf, int reg);
> >>=C2=A0 > +int mb_cpu_gdb_read_register(CPUState *cpu, GByte= Array *array, int reg);
> >>=C2=A0 >=C2=A0 int mb_cpu_gdb_write_register(CPUState *cpu,= uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 void mb_tcg_init(void);
> >>=C2=A0 > diff --git a/target/mips/internal.h b/target/mips/= internal.h
> >>=C2=A0 > index 1bf274b3ef..27a9e811f7 100644
> >>=C2=A0 > --- a/target/mips/internal.h
> >>=C2=A0 > +++ b/target/mips/internal.h
> >>=C2=A0 > @@ -82,7 +82,7 @@ void mips_cpu_do_interrupt(CPUSt= ate *cpu);
> >>=C2=A0 >=C2=A0 bool mips_cpu_exec_interrupt(CPUState *cpu, = int int_req);
> >>=C2=A0 >=C2=A0 void mips_cpu_dump_state(CPUState *cpu, FILE= *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr mips_cpu_get_phys_page_debug(CPUState= *cpu, vaddr addr);
> >>=C2=A0 > -int mips_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int mips_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int mips_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void mips_cpu_do_unaligned_access(CPUState *= cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 MMUAccessType access_type,
> >>=C2=A0 > diff --git a/target/openrisc/cpu.h b/target/openri= sc/cpu.h
> >>=C2=A0 > index f37a52e153..1d2d5214c2 100644
> >>=C2=A0 > --- a/target/openrisc/cpu.h
> >>=C2=A0 > +++ b/target/openrisc/cpu.h
> >>=C2=A0 > @@ -320,7 +320,7 @@ void openrisc_cpu_do_interrupt= (CPUState *cpu);
> >>=C2=A0 >=C2=A0 bool openrisc_cpu_exec_interrupt(CPUState *c= pu, int int_req);
> >>=C2=A0 >=C2=A0 void openrisc_cpu_dump_state(CPUState *cpu, = FILE *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr openrisc_cpu_get_phys_page_debug(CPUS= tate *cpu, vaddr addr);
> >>=C2=A0 > -int openrisc_cpu_gdb_read_register(CPUState *cpu,= GByteArray
> >> *buf, int reg);
> >>=C2=A0 > +int openrisc_cpu_gdb_read_register(CPUState *cpu,= GByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int openrisc_cpu_gdb_write_register(CPUState= *cpu, uint8_t *buf,
> >> int reg);
> >>=C2=A0 >=C2=A0 void openrisc_translate_init(void);
> >>=C2=A0 >=C2=A0 bool openrisc_cpu_tlb_fill(CPUState *cs, vad= dr address, int size,
> >>=C2=A0 > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > >>=C2=A0 > index 88d9449555..049400f8d7 100644
> >>=C2=A0 > --- a/target/ppc/cpu.h
> >>=C2=A0 > +++ b/target/ppc/cpu.h
> >>=C2=A0 > @@ -1207,8 +1207,8 @@ bool ppc_cpu_exec_interrupt(= CPUState *cpu,
> >> int int_req);
> >>=C2=A0 >=C2=A0 void ppc_cpu_dump_state(CPUState *cpu, FILE = *f, int flags);
> >>=C2=A0 >=C2=A0 void ppc_cpu_dump_statistics(CPUState *cpu, = int flags);
> >>=C2=A0 >=C2=A0 hwaddr ppc_cpu_get_phys_page_debug(CPUState = *cpu, vaddr addr);
> >>=C2=A0 > -int ppc_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *buf, int reg);
> >>=C2=A0 > -int ppc_cpu_gdb_read_register_apple(CPUState *cpu= , GByteArray
> >> *buf, int reg);
> >>=C2=A0 > +int ppc_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *array,
> >> int reg);
> >>=C2=A0 > +int ppc_cpu_gdb_read_register_apple(CPUState *cpu= , GByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int ppc_cpu_gdb_write_register(CPUState *cpu= , uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 int ppc_cpu_gdb_write_register_apple(CPUStat= e *cpu, uint8_t
> >> *buf, int reg);
> >>=C2=A0 >=C2=A0 #ifndef CONFIG_USER_ONLY
> >>=C2=A0 > diff --git a/target/riscv/cpu.h b/target/riscv/cpu= .h
> >>=C2=A0 > index 7d21addbab..806cb3b044 100644
> >>=C2=A0 > --- a/target/riscv/cpu.h
> >>=C2=A0 > +++ b/target/riscv/cpu.h
> >>=C2=A0 > @@ -293,7 +293,7 @@ extern const char * const risc= v_excp_names[];
> >>=C2=A0 >=C2=A0 extern const char * const riscv_intr_names[]= ;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 void riscv_cpu_do_interrupt(CPUState *cpu);<= br> > >>=C2=A0 > -int riscv_cpu_gdb_read_register(CPUState *cpu, GB= yteArray *buf,
> >> int reg);
> >>=C2=A0 > +int riscv_cpu_gdb_read_register(CPUState *cpu, GB= yteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int riscv_cpu_gdb_write_register(CPUState *c= pu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 bool riscv_cpu_exec_interrupt(CPUState *cs, = int interrupt_request);
> >>=C2=A0 >=C2=A0 bool riscv_cpu_fp_enabled(CPURISCVState *env= );
> >>=C2=A0 > diff --git a/target/rx/cpu.h b/target/rx/cpu.h
> >>=C2=A0 > index d1fb1ef3ca..994ab0c6fd 100644
> >>=C2=A0 > --- a/target/rx/cpu.h
> >>=C2=A0 > +++ b/target/rx/cpu.h
> >>=C2=A0 > @@ -128,7 +128,7 @@ const char *rx_crname(uint8_t = cr);
> >>=C2=A0 >=C2=A0 void rx_cpu_do_interrupt(CPUState *cpu);
> >>=C2=A0 >=C2=A0 bool rx_cpu_exec_interrupt(CPUState *cpu, in= t int_req);
> >>=C2=A0 >=C2=A0 void rx_cpu_dump_state(CPUState *cpu, FILE *= f, int flags);
> >>=C2=A0 > -int rx_cpu_gdb_read_register(CPUState *cpu, GByte= Array *buf, int reg);
> >>=C2=A0 > +int rx_cpu_gdb_read_register(CPUState *cpu, GByte= Array *array, int reg);
> >>=C2=A0 >=C2=A0 int rx_cpu_gdb_write_register(CPUState *cpu,= uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 hwaddr rx_cpu_get_phys_page_debug(CPUState *= cpu, vaddr addr);
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/target/s390x/internal.h b/target/s390= x/internal.h
> >>=C2=A0 > index 8c95c734db..04fcb7da74 100644
> >>=C2=A0 > --- a/target/s390x/internal.h
> >>=C2=A0 > +++ b/target/s390x/internal.h
> >>=C2=A0 > @@ -292,7 +292,7 @@ uint16_t float128_dcmask(CPUS3= 90XState *env,
> >> float128 f1);
> >>=C2=A0 >
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 /* gdbstub.c */
> >>=C2=A0 > -int s390_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int s390_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int s390_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void s390_cpu_gdb_init(CPUState *cs);
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h > >>=C2=A0 > index dbe58c7888..6901c88d7e 100644
> >>=C2=A0 > --- a/target/sh4/cpu.h
> >>=C2=A0 > +++ b/target/sh4/cpu.h
> >>=C2=A0 > @@ -208,7 +208,7 @@ void superh_cpu_do_interrupt(C= PUState *cpu);
> >>=C2=A0 >=C2=A0 bool superh_cpu_exec_interrupt(CPUState *cpu= , int int_req);
> >>=C2=A0 >=C2=A0 void superh_cpu_dump_state(CPUState *cpu, FI= LE *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr superh_cpu_get_phys_page_debug(CPUSta= te *cpu, vaddr addr);
> >>=C2=A0 > -int superh_cpu_gdb_read_register(CPUState *cpu, G= ByteArray *buf,
> >> int reg);
> >>=C2=A0 > +int superh_cpu_gdb_read_register(CPUState *cpu, G= ByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int superh_cpu_gdb_write_register(CPUState *= cpu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void superh_cpu_do_unaligned_access(CPUState= *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 MMUAccessType access_type,
> >>=C2=A0 > diff --git a/target/sparc/cpu.h b/target/sparc/cpu= .h
> >>=C2=A0 > index b9369398f2..bb9126b546 100644
> >>=C2=A0 > --- a/target/sparc/cpu.h
> >>=C2=A0 > +++ b/target/sparc/cpu.h
> >>=C2=A0 > @@ -571,7 +571,7 @@ extern const VMStateDescriptio= n vmstate_sparc_cpu;
> >>=C2=A0 >=C2=A0 void sparc_cpu_do_interrupt(CPUState *cpu);<= br> > >>=C2=A0 >=C2=A0 void sparc_cpu_dump_state(CPUState *cpu, FIL= E *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr sparc_cpu_get_phys_page_debug(CPUStat= e *cpu, vaddr addr);
> >>=C2=A0 > -int sparc_cpu_gdb_read_register(CPUState *cpu, GB= yteArray *buf,
> >> int reg);
> >>=C2=A0 > +int sparc_cpu_gdb_read_register(CPUState *cpu, GB= yteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int sparc_cpu_gdb_write_register(CPUState *c= pu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void QEMU_NORETURN sparc_cpu_do_unaligned_ac= cess(CPUState *cpu,
> >> vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MMUAccessType > >> access_type,
> >>=C2=A0 > diff --git a/target/xtensa/cpu.h b/target/xtensa/c= pu.h
> >>=C2=A0 > index 7a46dccbe1..8a851e0b00 100644
> >>=C2=A0 > --- a/target/xtensa/cpu.h
> >>=C2=A0 > +++ b/target/xtensa/cpu.h
> >>=C2=A0 > @@ -572,7 +572,7 @@ void xtensa_cpu_dump_state(CPU= State *cpu,
> >> FILE *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr xtensa_cpu_get_phys_page_debug(CPUSta= te *cpu, vaddr addr);
> >>=C2=A0 >=C2=A0 void xtensa_count_regs(const XtensaConfig *c= onfig,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned *n_regs, unsigned *n_core= _regs);
> >>=C2=A0 > -int xtensa_cpu_gdb_read_register(CPUState *cpu, G= ByteArray *buf,
> >> int reg);
> >>=C2=A0 > +int xtensa_cpu_gdb_read_register(CPUState *cpu, G= ByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int xtensa_cpu_gdb_write_register(CPUState *= cpu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void xtensa_cpu_do_unaligned_access(CPUState= *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 MMUAccessType access_type,
> >>=C2=A0 > diff --git a/gdbstub.c b/gdbstub.c
> >>=C2=A0 > index 171e150950..bc24b613b2 100644
> >>=C2=A0 > --- a/gdbstub.c
> >>=C2=A0 > +++ b/gdbstub.c
> >>=C2=A0 > @@ -906,19 +906,19 @@ static const char *get_featu= re_xml(const
> >> char *p, const char **newp,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return name ? xml_builtin[i][1= ] : NULL;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static int gdb_read_register(CPUState *cpu, GByte= Array *buf, int reg)
> >>=C2=A0 > +static int gdb_read_register(CPUState *cpu, GByte= Array *array, int reg)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUClass *cc =3D CPU_GET_CLASS= (cpu);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUArchState *env =3D cpu->= env_ptr;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 GDBRegisterState *r;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (reg < cc->gdb_num_co= re_regs) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return cc->gdb_rea= d_register(cpu, buf, reg);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return cc->gdb_rea= d_register(cpu, array, reg);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 for (r =3D cpu->gdb_regs; r= ; r =3D r->next) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (r->base_r= eg <=3D reg && reg < r->base_reg + r->num_regs) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = r->get_reg(env, buf, reg - r->base_reg);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = r->get_reg(env, array, reg - r->base_reg);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/hw/core/cpu.c b/hw/core/cpu.c
> >>=C2=A0 > index 786a1bec8a..0f2bd00176 100644
> >>=C2=A0 > --- a/hw/core/cpu.c
> >>=C2=A0 > +++ b/hw/core/cpu.c
> >>=C2=A0 > @@ -177,7 +177,8 @@ static int
> >> cpu_common_write_elf64_note(WriteCoreDumpFunction f,
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >
> >>=C2=A0 > -static int cpu_common_gdb_read_register(CPUState = *cpu,
> >> GByteArray *buf, int reg)
> >>=C2=A0 > +static int cpu_common_gdb_read_register(CPUState = *cpu,
> >> GByteArray *array,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 int reg)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > diff --git a/target/alpha/gdbstub.c b/target/alpha= /gdbstub.c
> >>=C2=A0 > index 0cd76ddaa9..415f422b03 100644
> >>=C2=A0 > --- a/target/alpha/gdbstub.c
> >>=C2=A0 > +++ b/target/alpha/gdbstub.c
> >>=C2=A0 > @@ -21,7 +21,7 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int alpha_cpu_gdb_read_register(CPUState *cs, GBy= teArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int alpha_cpu_gdb_read_register(CPUState *cs, GBy= teArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 AlphaCPU *cpu =3D ALPHA_CPU(cs= );
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUAlphaState *env =3D &cp= u->env;
> >>=C2=A0 > @@ -54,7 +54,7 @@ int alpha_cpu_gdb_read_register(= CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > -=C2=A0 =C2=A0 return gdb_get_regl(mem_buf, val);<= br> > >>=C2=A0 > +=C2=A0 =C2=A0 return gdb_get_regl(array, val); > >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 int alpha_cpu_gdb_write_register(CPUState *c= s, uint8_t *mem_buf, int n)
> >>=C2=A0 > diff --git a/target/arm/gdbstub.c b/target/arm/gdb= stub.c
> >>=C2=A0 > index 063551df23..66a8af8a19 100644
> >>=C2=A0 > --- a/target/arm/gdbstub.c
> >>=C2=A0 > +++ b/target/arm/gdbstub.c
> >>=C2=A0 > @@ -33,21 +33,21 @@ typedef struct RegisterSysregX= mlParam {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0We hack round this by giving th= e FPA regs zero size when talking to a
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0newer gdb.=C2=A0 */
> >>=C2=A0 >
> >>=C2=A0 > -int arm_cpu_gdb_read_register(CPUState *cs, GByte= Array *mem_buf, int n)
> >>=C2=A0 > +int arm_cpu_gdb_read_register(CPUState *cs, GByte= Array *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 ARMCPU *cpu =3D ARM_CPU(cs); > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUARMState *env =3D &cpu-= >env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 16) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Core integer = register.=C2=A0 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 24) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* FPA registers= .=C2=A0 */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (gdb_has_xml)= {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 re= turn 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_zeroes= (mem_buf, 12);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_zeroes= (array, 12);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 24:
> >>=C2=A0 > @@ -55,10 +55,10 @@ int arm_cpu_gdb_read_register(= CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (gdb_has_xml)= {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 re= turn 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 25:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* CPSR */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, cpsr_read(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, cpsr_read(env));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 /* Unknown register.=C2=A0 */<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/arm/gdbstub64.c b/target/arm/g= dbstub64.c
> >>=C2=A0 > index 35d0b80c2d..16860a0522 100644
> >>=C2=A0 > --- a/target/arm/gdbstub64.c
> >>=C2=A0 > +++ b/target/arm/gdbstub64.c
> >>=C2=A0 > @@ -20,22 +20,22 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int aarch64_cpu_gdb_read_register(CPUState *cs, G= ByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int aarch64_cpu_gdb_read_register(CPUState *cs, G= ByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 ARMCPU *cpu =3D ARM_CPU(cs); > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUARMState *env =3D &cpu-= >env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 31) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Core integer = register.=C2=A0 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf, env->xregs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array, env->xregs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 31:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf, env->xregs[31]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array, env->xregs[31]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 32:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 33:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, pstate_read(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, pstate_read(env));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 /* Unknown register.=C2=A0 */<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/cris/gdbstub.c b/target/cris/g= dbstub.c
> >>=C2=A0 > index b01b2aa081..dd7f754935 100644
> >>=C2=A0 > --- a/target/cris/gdbstub.c
> >>=C2=A0 > +++ b/target/cris/gdbstub.c
> >>=C2=A0 > @@ -21,31 +21,31 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int crisv10_cpu_gdb_read_register(CPUState *cs, G= ByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int crisv10_cpu_gdb_read_register(CPUState *cs, G= ByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CRISCPU *cpu =3D CRIS_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUCRISState *env =3D &cpu= ->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 15) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n =3D=3D 15) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 16:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg8(mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg8(array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 17:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg8(mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg8(array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 20:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 21:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg16(mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg16(array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= (n >=3D 23) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg32(mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg32(array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 br= eak;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > @@ -53,7 +53,7 @@ int crisv10_cpu_gdb_read_registe= r(CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -int cris_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int cris_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CRISCPU *cpu =3D CRIS_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUCRISState *env =3D &cpu= ->env;
> >>=C2=A0 > @@ -61,28 +61,28 @@ int cris_cpu_gdb_read_register= (CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 srs =3D env->pregs[PR_SRS];=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 16) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n >=3D 21 && n = < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n >=3D 33 && n = < 49) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->sregs[srs][n - 33]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->sregs[srs][n - 33]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 16:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(m= em_buf, env->pregs[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(a= rray, env->pregs[0]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 17:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(m= em_buf, env->pregs[1]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(a= rray, env->pregs[1]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 18:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->pregs[2]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->pregs[2]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 19:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(m= em_buf, srs);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(a= rray, srs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 20:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg16(= mem_buf, env->pregs[4]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg16(= array, env->pregs[4]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 32:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/hppa/gdbstub.c b/target/hppa/g= dbstub.c
> >>=C2=A0 > index a6428a2893..d0618f5175 100644
> >>=C2=A0 > --- a/target/hppa/gdbstub.c
> >>=C2=A0 > +++ b/target/hppa/gdbstub.c
> >>=C2=A0 > @@ -21,7 +21,7 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int hppa_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int hppa_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 HPPACPU *cpu =3D HPPA_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUHPPAState *env =3D &cpu= ->env;
> >>=C2=A0 > @@ -140,9 +140,9 @@ int hppa_cpu_gdb_read_register= (CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (TARGET_REGISTER_BITS =3D= =3D 64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf, val);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array, val);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, val);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, val);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/target/i386/gdbstub.c b/target/i386/g= dbstub.c
> >>=C2=A0 > index f3d23b614e..40f1b03a36 100644
> >>=C2=A0 > --- a/target/i386/gdbstub.c
> >>=C2=A0 > +++ b/target/i386/gdbstub.c
> >>=C2=A0 > @@ -79,7 +79,7 @@ static const int gpr_map32[8] = =3D { 0, 1, 2, 3,
> >> 4, 5, 6, 7 };
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >
> >>=C2=A0 >
> >>=C2=A0 > -int x86_cpu_gdb_read_register(CPUState *cs, GByte= Array *mem_buf, int n)
> >>=C2=A0 > +int x86_cpu_gdb_read_register(CPUState *cs, GByte= Array *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 X86CPU *cpu =3D X86_CPU(cs); > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUX86State *env =3D &cpu-= >env;
> >>=C2=A0 > @@ -93,25 +93,25 @@ int x86_cpu_gdb_read_register(= CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < CPU_NB_REGS) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (TARGET_LONG_= BITS =3D=3D 64) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= (env->hflags & HF_CS64_MASK) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->regs[gpr_map[n]]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->regs[gpr_map[n]]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } = else if (n < CPU_NB_REGS32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0env->regs[gpr_map[n]] &
> >> 0xffffffffUL);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } = else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->regs[gpr_map32[n]]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n >=3D IDX_FP_RE= GS && n < IDX_FP_REGS + 8) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 floatx80 *fp =3D= (floatx80 *) &env->fpregs[n - IDX_FP_REGS];
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 int len =3D gdb_get_r= eg64(mem_buf, cpu_to_le64(fp->low));
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg1= 6(mem_buf + len, cpu_to_le16(fp->high));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 int len =3D gdb_get_r= eg64(array, cpu_to_le64(fp->low));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg1= 6(array + len, cpu_to_le16(fp->high));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return len;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n >=3D IDX_XMM_R= EGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 n -=3D IDX_XMM_R= EGS;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (n < CPU_N= B_REGS32 || TARGET_LONG_BITS =3D=3D 64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg128(mem_buf,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg128(array,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 env->xmm_regs[n].ZMM_Q(0),
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 env->xmm_regs[n].ZMM_Q(1));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > @@ -120,95 +120,95 @@ int x86_cpu_gdb_read_registe= r(CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_IP_REG:=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= (TARGET_LONG_BITS =3D=3D 64) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 if (env->hflags & HF_CS64_MASK) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(mem_buf, env->eip);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(array, env->eip);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 } else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(mem_buf, env->eip &
> >> 0xffffffffUL);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(array, env->eip &
> >> 0xffffffffUL);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } = else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg32(mem_buf, env->eip);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg32(array, env->eip);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FLAGS_R= EG:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->eflags);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->eflags);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_CS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_CS].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 1:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_SS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_SS].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 2:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_DS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_DS].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 3:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_ES].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_ES].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 4:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_FS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_FS].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 5:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_GS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_GS].selector);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 6:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->segs[R_FS].base);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->segs[R_FS].base);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_FS].base);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_FS].base);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 7:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->segs[R_GS].base);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->segs[R_GS].base);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_GS].base);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_GS].base);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 8:
> >>=C2=A0 >=C2=A0 #ifdef TARGET_X86_64
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->kernelgsbase);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->kernelgsbase);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->kernelgsbase);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->kernelgsbase);
> >>=C2=A0 >=C2=A0 #else
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0);
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 8:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->fpuc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->fpuc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 9:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, (env->fpus & ~0x3800) |
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, (env->fpus & ~0x3800) |
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 (env->fpstt & 0x7) << 11);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 10:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* ftag */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* ftag */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 11:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* fiseg */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* fiseg */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 12:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* fioff */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* fioff */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 13:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* foseg */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* foseg */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 14:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* fooff */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* fooff */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 15:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* fop */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* fop */
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_MXCSR_R= EG:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->mxcsr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->mxcsr);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR0= _REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->cr[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->cr[0]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->cr[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->cr[0]);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR2= _REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->cr[2]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->cr[2]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->cr[2]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->cr[2]);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR3= _REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->cr[3]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->cr[3]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->cr[3]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->cr[3]);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR4= _REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->cr[4]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->cr[4]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->cr[4]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->cr[4]);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR8= _REG:
> >>=C2=A0 >=C2=A0 #ifdef CONFIG_SOFTMMU
> >>=C2=A0 > @@ -217,15 +217,15 @@ int x86_cpu_gdb_read_registe= r(CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 tp= r =3D 0;
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, tpr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, tpr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, tpr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, tpr);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_EFE= R_REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->efer);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->efer);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->efer);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->efer);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/lm32/gdbstub.c b/target/lm32/g= dbstub.c
> >>=C2=A0 > index b6fe12e1d6..6198719944 100644
> >>=C2=A0 > --- a/target/lm32/gdbstub.c
> >>=C2=A0 > +++ b/target/lm32/gdbstub.c
> >>=C2=A0 > @@ -22,30 +22,30 @@
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >=C2=A0 #include "hw/lm32/lm32_pic.h"
> >>=C2=A0 >
> >>=C2=A0 > -int lm32_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int lm32_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 LM32CPU *cpu =3D LM32_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPULM32State *env =3D &cpu= ->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 32:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* FIXME: put in= right exception ID */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 33:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 34:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->eba);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->eba);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 35:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->deba);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->deba);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 36:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->ie);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->ie);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 37:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf,
> >> lm32_pic_get_im(env->pic_state));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array,
> >> lm32_pic_get_im(env->pic_state));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 38:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf,
> >> lm32_pic_get_ip(env->pic_state));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array,
> >> lm32_pic_get_ip(env->pic_state));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/m68k/gdbstub.c b/target/m68k/g= dbstub.c
> >>=C2=A0 > index eb2d030e14..9405dc4b4e 100644
> >>=C2=A0 > --- a/target/m68k/gdbstub.c
> >>=C2=A0 > +++ b/target/m68k/gdbstub.c
> >>=C2=A0 > @@ -21,24 +21,24 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int m68k_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int m68k_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 M68kCPU *cpu =3D M68K_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUM68KState *env =3D &cpu= ->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 8) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* D0-D7 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->dregs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->dregs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n < 16) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* A0-A7 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->aregs[n - 8]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->aregs[n - 8]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 16:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /*= SR is made of SR+CCR, CCR is many 1bit flags so
> >> uses helper */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->sr |
> >> cpu_m68k_get_ccr(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->sr |
> >> cpu_m68k_get_ccr(env));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 17:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 /*
> >>=C2=A0 > diff --git a/target/m68k/helper.c b/target/m68k/he= lper.c
> >>=C2=A0 > index 014657c637..968371476a 100644
> >>=C2=A0 > --- a/target/m68k/helper.c
> >>=C2=A0 > +++ b/target/m68k/helper.c
> >>=C2=A0 > @@ -68,19 +68,19 @@ void m68k_cpu_list(void)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 g_slist_free(list);
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static int cf_fpu_gdb_get_reg(CPUM68KState *env, = GByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +static int cf_fpu_gdb_get_reg(CPUM68KState *env, = GByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 8) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 float_status s;<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf,
> >> floatx80_to_float64(env->fregs[n].d, &s));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array,
> >> floatx80_to_float64(env->fregs[n].d, &s));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 8: /* fpcontrol */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->fpcr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->fpcr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 9: /* fpstatus */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->fpsr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->fpsr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 10: /* fpiar, not impleme= nted */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > @@ -105,21 +105,21 @@ static int cf_fpu_gdb_set_re= g(CPUM68KState
> >> *env, uint8_t *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static int m68k_fpu_gdb_get_reg(CPUM68KState *env= , GByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +static int m68k_fpu_gdb_get_reg(CPUM68KState *env= , GByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 8) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 int len =3D gdb_get_r= eg16(mem_buf, env->fregs[n].l.upper);
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg1= 6(mem_buf + len, 0);
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg6= 4(mem_buf + len, env->fregs[n].l.lower);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 int len =3D gdb_get_r= eg16(array, env->fregs[n].l.upper);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg1= 6(array + len, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg6= 4(array + len, env->fregs[n].l.lower);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return len;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 8: /* fpcontrol */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->fpcr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->fpcr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 9: /* fpstatus */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->fpsr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->fpsr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 10: /* fpiar, not impleme= nted */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > diff --git a/target/microblaze/gdbstub.c b/target/= microblaze/gdbstub.c
> >>=C2=A0 > index f41ebf1f33..40d41e12ce 100644
> >>=C2=A0 > --- a/target/microblaze/gdbstub.c
> >>=C2=A0 > +++ b/target/microblaze/gdbstub.c
> >>=C2=A0 > @@ -21,15 +21,15 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int mb_cpu_gdb_read_register(CPUState *cs, GByteA= rray *mem_buf, int n)
> >>=C2=A0 > +int mb_cpu_gdb_read_register(CPUState *cs, GByteA= rray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 MicroBlazeCPU *cpu =3D MICROBL= AZE_CPU(cs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUMBState *env =3D &cpu-&= gt;env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->sregs[n - 32]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->sregs[n - 32]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > diff --git a/target/mips/gdbstub.c b/target/mips/g= dbstub.c
> >>=C2=A0 > index 98f56e660d..0fc957d5cd 100644
> >>=C2=A0 > --- a/target/mips/gdbstub.c
> >>=C2=A0 > +++ b/target/mips/gdbstub.c
> >>=C2=A0 > @@ -22,54 +22,54 @@
> >>=C2=A0 >=C2=A0 #include "internal.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int mips_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int mips_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 MIPSCPU *cpu =3D MIPS_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUMIPSState *env =3D &cpu= ->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->active_tc.gpr[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->active_tc.gpr[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (env->CP0_Config1 & = (1 << CP0C1_FP) && n >=3D 38 && n < 72) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 70:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_regl(mem_buf,
> >> (int32_t)env->active_fpu.fcr31);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_regl(array, (int32_t)env->active_fpu.fcr31);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 71:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_regl(array, (int32_t)env->active_fpu.fcr0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= (env->CP0_Status & (1 << CP0St_FR)) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(mem_buf,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(array,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 env->active_fpu.fpr[n - 38].d);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } = else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(mem_buf,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(array,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]= );
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 32:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (int32_t)env->CP0_Status);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (int32_t)env->CP0_Status);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 33:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->active_tc.LO[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->active_tc.LO[0]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 34:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->active_tc.HI[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->active_tc.HI[0]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 35:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->CP0_BadVAddr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->CP0_BadVAddr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 36:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (int32_t)env->CP0_Cause);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (int32_t)env->CP0_Cause);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 37:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->active_tc.PC |
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->active_tc.PC |
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0!!(env->hflags & MIPS_HFLAG_M16));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 72:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, 0); /* fp */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, 0); /* fp */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 89:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (int32_t)env->CP0_PRid);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (int32_t)env->CP0_PRid);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (n > 89) {=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 re= turn 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* 16 embedded r= egs.=C2=A0 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/nios2/cpu.c b/target/nios2/cpu= .c
> >>=C2=A0 > index 8f7011fcb9..3cf696402f 100644
> >>=C2=A0 > --- a/target/nios2/cpu.c
> >>=C2=A0 > +++ b/target/nios2/cpu.c
> >>=C2=A0 > @@ -124,7 +124,7 @@ static void nios2_cpu_disas_se= t_info(CPUState
> >> *cpu, disassemble_info *info)
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static int nios2_cpu_gdb_read_register(CPUState *= cs, GByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +static int nios2_cpu_gdb_read_register(CPUState *= cs, GByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 Nios2CPU *cpu =3D NIOS2_CPU(cs= );
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUClass *cc =3D CPU_GET_CLASS= (cs);
> >>=C2=A0 > @@ -135,11 +135,11 @@ static int
> >> nios2_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf= , int
> >> n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 /* GP regs */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n =3D=3D 32) {=C2= =A0 =C2=A0 /* PC */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[R_PC]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[R_PC]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n < 49) {=C2=A0 = =C2=A0 =C2=A0/* Status regs */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n - 1]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n - 1]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 /* Invalid regs */
> >>=C2=A0 > diff --git a/target/openrisc/gdbstub.c b/target/op= enrisc/gdbstub.c
> >>=C2=A0 > index 095bf76c12..c34d3696ec 100644
> >>=C2=A0 > --- a/target/openrisc/gdbstub.c
> >>=C2=A0 > +++ b/target/openrisc/gdbstub.c
> >>=C2=A0 > @@ -21,23 +21,23 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int openrisc_cpu_gdb_read_register(CPUState *cs, = GByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int openrisc_cpu_gdb_read_register(CPUState *cs, = GByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 OpenRISCCPU *cpu =3D OPENRISC_= CPU(cs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUOpenRISCState *env =3D &= ;cpu->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, cpu_get_gpr(env, n));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, cpu_get_gpr(env, n));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 32:=C2=A0 = =C2=A0 /* PPC */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->ppc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->ppc);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 33:=C2=A0 = =C2=A0 /* NPC (equals PC) */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->pc);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 34:=C2=A0 = =C2=A0 /* SR */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, cpu_get_sr(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, cpu_get_sr(env));
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 br= eak;
> >>=C2=A0 > diff --git a/target/riscv/gdbstub.c b/target/riscv= /gdbstub.c
> >>=C2=A0 > index eba12a86f2..8e1d64c1cf 100644
> >>=C2=A0 > --- a/target/riscv/gdbstub.c
> >>=C2=A0 > +++ b/target/riscv/gdbstub.c
> >>=C2=A0 > @@ -270,15 +270,15 @@ static int csr_register_map[= ] =3D {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CSR_MHCOUNTEREN,
> >>=C2=A0 >=C2=A0 };
> >>=C2=A0 >
> >>=C2=A0 > -int riscv_cpu_gdb_read_register(CPUState *cs, GBy= teArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int riscv_cpu_gdb_read_register(CPUState *cs, GBy= teArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 RISCVCPU *cpu =3D RISCV_CPU(cs= );
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPURISCVState *env =3D &cp= u->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->gpr[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->gpr[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n =3D=3D 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > diff --git a/target/rx/gdbstub.c b/target/rx/gdbst= ub.c
> >>=C2=A0 > index 9391e8151e..91dee774f6 100644
> >>=C2=A0 > --- a/target/rx/gdbstub.c
> >>=C2=A0 > +++ b/target/rx/gdbstub.c
> >>=C2=A0 > @@ -20,32 +20,32 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int rx_cpu_gdb_read_register(CPUState *cs, GByteA= rray *mem_buf, int n)
> >>=C2=A0 > +int rx_cpu_gdb_read_register(CPUState *cs, GByteA= rray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 RXCPU *cpu =3D RXCPU(cs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPURXState *env =3D &cpu-&= gt;env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 0 ... 15:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 16:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (env->psw_u) ? env->regs[0]
> >> : env->usp);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (env->psw_u) ? env->regs[0] :
> >> env->usp);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 17:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (!env->psw_u) ?
> >> env->regs[0] : env->isp);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (!env->psw_u) ? env->regs[0]
> >> : env->isp);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 18:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, rx_cpu_pack_psw(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, rx_cpu_pack_psw(env));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 19:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 20:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->intb);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->intb);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 21:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->bpsw);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->bpsw);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 22:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->bpc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->bpc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 23:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->fintv);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->fintv);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 24:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->fpsw);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->fpsw);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 25:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > diff --git a/target/s390x/gdbstub.c b/target/s390x= /gdbstub.c
> >>=C2=A0 > index d6fce5ff1e..adbe7b5d39 100644
> >>=C2=A0 > --- a/target/s390x/gdbstub.c
> >>=C2=A0 > +++ b/target/s390x/gdbstub.c
> >>=C2=A0 > @@ -27,7 +27,7 @@
> >>=C2=A0 >=C2=A0 #include "sysemu/hw_accel.h"
> >>=C2=A0 >=C2=A0 #include "sysemu/tcg.h"
> >>=C2=A0 >
> >>=C2=A0 > -int s390_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int s390_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 S390CPU *cpu =3D S390_CPU(cs);=
> >>

--0000000000004018db05a34199ba-- From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1jOPAE-0002Ql-O6 for mharc-qemu-riscv@gnu.org; Tue, 14 Apr 2020 13:15:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47006) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jOPA2-0002Es-Cr for qemu-riscv@nongnu.org; Tue, 14 Apr 2020 13:15:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jOP9p-0006IX-3j for qemu-riscv@nongnu.org; Tue, 14 Apr 2020 13:15:46 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:36602) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jONCj-0005WG-Qg; Tue, 14 Apr 2020 11:10:26 -0400 Received: by mail-wr1-x42f.google.com with SMTP id u13so14257971wrp.3; Tue, 14 Apr 2020 08:10:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=th6Itvavqdy0oV564Kr9UBTUBaowHEos7g0Mtw+sY3Y=; b=dE3H4IXwA2dxvD6vZAy4J5kEMXqC6XrcH+cufdBA+5YM4nQWTg9rhieB7C95tQRlhc YS+jxyrwVlZR7c2/NP3Ofh+qkxR+Ci2TG+2YhzcQiCRjz2rob5vYB9A3A1FTELFa/pJP bX4iC9UD0uQhNaUrRzXgFeUaJT+MOIwRAEndTm0B6s22lKjcI8GVVI65WvKsj/RYC3LI tSSDAHRJqCViaa4+l+vFkkVy5OAftR4G24qSbtui8h1EIUpDCLge3onsaXjXgtz5/c+M eUVgRygvDMoQIIrtYoUxm8VSuOxk9+dL5MdsEz/13ciQl/8PgQhUyjiy4IH5lZq6QG8C sdkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=th6Itvavqdy0oV564Kr9UBTUBaowHEos7g0Mtw+sY3Y=; b=Q61ZznCH/uOVLz//QsVcWEi5eXuphftLHoIYaOMgKnwnkO88fR8O0ZtSO71lbsw4js UI1SNzOUvg8T+qhJxXMvO+w7uwcRMpf9it6c/AMSAw51SPJZJrggULF71gHGlbDOwvIA bGx/3Itn6v0mCaSpPwDpdv6lE40OKuPsiHzFye3WoM6eoDyY5KELFqgwYZTLBlwr0+Ls 9/cR0fCONWzrpSu11DLFerVUD2un0pU1XM5Jb/me9A2lhJ3Sop2Qy7nYPW8VjAyDWUKv qcrrP0ftUa5W8RmGx/rqK47HzpqP1nNmhA2hHDEiwl0xAaeu7YiX4WBM1ShSgodKPdQP PKMw== X-Gm-Message-State: AGi0Puaiyu5surAMRZvkqFYoohgqDHpAl3s7oFXg1qt+eUwELZ5CzsVR vdH0mBLBgykNrpW3ciIKDrKN0Fvrn8H3kXYvt48= X-Google-Smtp-Source: APiQypIsGvaw+Y+z+ANpoxFa8iWU/h3DIAyMOWFjEmIoTyDj1nvatQIbuw7PtbiVpby54dp9VM62hGCgRQl9ntJy8lI= X-Received: by 2002:adf:efc2:: with SMTP id i2mr23797221wrp.420.1586877022868; Tue, 14 Apr 2020 08:10:22 -0700 (PDT) MIME-Version: 1.0 References: <20200414112849.21787-1-philmd@redhat.com> <87a73e9m9l.fsf@linaro.org> In-Reply-To: <87a73e9m9l.fsf@linaro.org> From: Aleksandar Markovic Date: Tue, 14 Apr 2020 17:10:04 +0200 Message-ID: Subject: Re: [PATCH-for-5.1] gdbstub: Rename GByteArray variable 'mem_buf' as 'array' To: =?UTF-8?B?QWxleCBCZW5uw6ll?= Cc: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , QEMU Developers , Stafford Horne , Artyom Tarasenko , Sagar Karandikar , qemu-arm@nongnu.org, Bastian Koppelmann , Aleksandar Rikalo , Marcel Apfelbaum , "Edgar E. Iglesias" , Eduardo Habkost , Palmer Dabbelt , David Hildenbrand , Mark Cave-Ayland , Laurent Vivier , Cornelia Huck , qemu-s390x@nongnu.org, Alistair Francis , Peter Maydell , qemu-riscv@nongnu.org, Marek Vasut , Aurelien Jarno , Chris Wulff , Richard Henderson , qemu-ppc@nongnu.org, David Gibson , Yoshinori Sato , Paolo Bonzini , Michael Walle , Max Filippov Content-Type: multipart/alternative; boundary="0000000000004018db05a34199ba" X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 14 Apr 2020 17:15:57 -0000 --0000000000004018db05a34199ba Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable 4:26 PM Uto, 14.04.2020. Alex Benn=C3=A9e =D1=98= =D0=B5 =D0=BD=D0=B0=D0=BF=D0=B8=D1=81=D0=B0=D0=BE/=D0=BB=D0=B0: > > > Philippe Mathieu-Daud=C3=A9 writes: > > > On 4/14/20 3:35 PM, Aleksandar Markovic wrote: > >> 1:28 PM Uto, 14.04.2020. Philippe Mathieu-Daud=C3=A9 >> > =D1=98=D0=B5 =D0=BD=D0=B0=D0=BF=D0=B8=D1= =81=D0=B0=D0=BE/=D0=BB=D0=B0: > >> > > >> > GByteArray type has should not be treated as a u8[] buffer. > >> > The GLib Byte Arrays API should be used instead. > >> > Rename the 'mem_buf' variable as 'array' to make it more > >> > obvious in the code. > >> > > >> Hi, Philippe. > >> "array" is a horrible choice for a name. It must be more specific. > > > > This is how the prototype is documented: > > > > https://developer.gnome.org/glib/stable/glib-Byte-Arrays.html#g-byte-array-= append > > > > GByteArray * > > g_byte_array_append (GByteArray *array, > > const guint8 *data, > > guint len); > > > > What do you suggest? > > *buf was also pretty generic. That said I think the "array"-like > properties of this structure are fairly incidental to it's purpose which > is a opaque place to store the register data for gdbstub. As we already > communicate the type in the function prototype maybe *reg or *regdata? > I am not a frequent user of this interface, but mostly as an observer, Alex' "regdata" seems a reasonable choice to me. Does anybody happen to have a better idea? Regards, Aleksandar > > > >> Regards, > >> Aleksandar > >> > Signed-off-by: Philippe Mathieu-Daud=C3=A9 >> > > >> > --- > >> > Based-on: <20200414111846.27495-1-philmd@redhat.com > >> > > >> > Signed-off-by: Philippe Mathieu-Daud=C3=A9 >> > > >> > --- > >> > include/exec/gdbstub.h | 34 +++++++------- > >> > include/hw/core/cpu.h | 2 +- > >> > target/alpha/cpu.h | 2 +- > >> > target/arm/cpu.h | 4 +- > >> > target/cris/cpu.h | 4 +- > >> > target/hppa/cpu.h | 2 +- > >> > target/i386/cpu.h | 2 +- > >> > target/lm32/cpu.h | 2 +- > >> > target/m68k/cpu.h | 2 +- > >> > target/microblaze/cpu.h | 2 +- > >> > target/mips/internal.h | 2 +- > >> > target/openrisc/cpu.h | 2 +- > >> > target/ppc/cpu.h | 4 +- > >> > target/riscv/cpu.h | 2 +- > >> > target/rx/cpu.h | 2 +- > >> > target/s390x/internal.h | 2 +- > >> > target/sh4/cpu.h | 2 +- > >> > target/sparc/cpu.h | 2 +- > >> > target/xtensa/cpu.h | 2 +- > >> > gdbstub.c | 6 +-- > >> > hw/core/cpu.c | 3 +- > >> > target/alpha/gdbstub.c | 4 +- > >> > target/arm/gdbstub.c | 10 ++-- > >> > target/arm/gdbstub64.c | 10 ++-- > >> > target/cris/gdbstub.c | 34 +++++++------- > >> > target/hppa/gdbstub.c | 6 +-- > >> > target/i386/gdbstub.c | 92 ++++++++++++++++++------------------- > >> > target/lm32/gdbstub.c | 18 ++++---- > >> > target/m68k/gdbstub.c | 10 ++-- > >> > target/m68k/helper.c | 24 +++++----- > >> > target/microblaze/gdbstub.c | 6 +-- > >> > target/mips/gdbstub.c | 30 ++++++------ > >> > target/nios2/cpu.c | 8 ++-- > >> > target/openrisc/gdbstub.c | 10 ++-- > >> > target/riscv/gdbstub.c | 6 +-- > >> > target/rx/gdbstub.c | 22 ++++----- > >> > target/s390x/gdbstub.c | 28 +++++------ > >> > target/sh4/gdbstub.c | 38 +++++++-------- > >> > target/sparc/gdbstub.c | 46 +++++++++---------- > >> > target/xtensa/gdbstub.c | 20 ++++---- > >> > 40 files changed, 254 insertions(+), 253 deletions(-) > >> > > >> > diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h > >> > index 52a4a936c6..29150d1344 100644 > >> > --- a/include/exec/gdbstub.h > >> > +++ b/include/exec/gdbstub.h > >> > @@ -80,47 +80,47 @@ void gdb_register_coprocessor(CPUState *cpu, > >> > * append to the array. > >> > */ > >> > > >> > -static inline int gdb_get_reg8(GByteArray *buf, uint8_t val) > >> > +static inline int gdb_get_reg8(GByteArray *array, uint8_t val) > >> > { > >> > - g_byte_array_append(buf, &val, 1); > >> > + g_byte_array_append(array, &val, 1); > >> > return 1; > >> > } > >> > > >> > -static inline int gdb_get_reg16(GByteArray *buf, uint16_t val) > >> > +static inline int gdb_get_reg16(GByteArray *array, uint16_t val) > >> > { > >> > uint16_t to_word =3D tswap16(val); > >> > - g_byte_array_append(buf, (uint8_t *) &to_word, 2); > >> > + g_byte_array_append(array, (uint8_t *) &to_word, 2); > >> > return 2; > >> > } > >> > > >> > -static inline int gdb_get_reg32(GByteArray *buf, uint32_t val) > >> > +static inline int gdb_get_reg32(GByteArray *array, uint32_t val) > >> > { > >> > uint32_t to_long =3D tswap32(val); > >> > - g_byte_array_append(buf, (uint8_t *) &to_long, 4); > >> > + g_byte_array_append(array, (uint8_t *) &to_long, 4); > >> > return 4; > >> > } > >> > > >> > -static inline int gdb_get_reg64(GByteArray *buf, uint64_t val) > >> > +static inline int gdb_get_reg64(GByteArray *array, uint64_t val) > >> > { > >> > uint64_t to_quad =3D tswap64(val); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > return 8; > >> > } > >> > > >> > -static inline int gdb_get_reg128(GByteArray *buf, uint64_t val_hi, > >> > +static inline int gdb_get_reg128(GByteArray *array, uint64_t val_hi, > >> > uint64_t val_lo) > >> > { > >> > uint64_t to_quad; > >> > #ifdef TARGET_WORDS_BIGENDIAN > >> > to_quad =3D tswap64(val_hi); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > to_quad =3D tswap64(val_lo); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > #else > >> > to_quad =3D tswap64(val_lo); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > to_quad =3D tswap64(val_hi); > >> > - g_byte_array_append(buf, (uint8_t *) &to_quad, 8); > >> > + g_byte_array_append(array, (uint8_t *) &to_quad, 8); > >> > #endif > >> > return 16; > >> > } > >> > @@ -154,16 +154,16 @@ static inline int gdb_get_zeroes(GByteArray > >> *array, size_t len) > >> > * element for additional processing. Some front-ends do additiona= l > >> > * dynamic swapping of the elements based on CPU state. > >> > */ > >> > -static inline uint8_t * gdb_get_reg_ptr(GByteArray *buf, int len) > >> > +static inline uint8_t *gdb_get_reg_ptr(GByteArray *array, int len) > >> > { > >> > - return buf->data + buf->len - len; > >> > + return array->data + array->len - len; > >> > } > >> > > >> > #if TARGET_LONG_BITS =3D=3D 64 > >> > -#define gdb_get_regl(buf, val) gdb_get_reg64(buf, val) > >> > +#define gdb_get_regl(array, val) gdb_get_reg64(array, val) > >> > #define ldtul_p(addr) ldq_p(addr) > >> > #else > >> > -#define gdb_get_regl(buf, val) gdb_get_reg32(buf, val) > >> > +#define gdb_get_regl(array, val) gdb_get_reg32(array, val) > >> > #define ldtul_p(addr) ldl_p(addr) > >> > #endif > >> > > >> > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h > >> > index 5bf94d28cf..31434d3b1f 100644 > >> > --- a/include/hw/core/cpu.h > >> > +++ b/include/hw/core/cpu.h > >> > @@ -193,7 +193,7 @@ typedef struct CPUClass { > >> > hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, > >> > MemTxAttrs *attrs); > >> > int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs); > >> > - int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); > >> > + int (*gdb_read_register)(CPUState *cpu, GByteArray *array, int reg); > >> > int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); > >> > bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp); > >> > void (*debug_excp_handler)(CPUState *cpu); > >> > diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h > >> > index be29bdd530..94853d0bee 100644 > >> > --- a/target/alpha/cpu.h > >> > +++ b/target/alpha/cpu.h > >> > @@ -280,7 +280,7 @@ void alpha_cpu_do_interrupt(CPUState *cpu); > >> > bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags); > >> > hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, > >> > MMUAccessType access_type, > >> > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > >> > index 8b9f2961ba..cbd3a262f3 100644 > >> > --- a/target/arm/cpu.h > >> > +++ b/target/arm/cpu.h > >> > @@ -975,7 +975,7 @@ bool arm_cpu_exec_interrupt(CPUState *cpu, > >> int int_req); > >> > hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr= , > >> > MemTxAttrs *attrs); > >> > > >> > -int arm_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int arm_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > /* > >> > @@ -997,7 +997,7 @@ int > >> arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, > >> > int cpuid, void *opaque); > >> > > >> > #ifdef TARGET_AARCH64 > >> > -int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *buf, int reg); > >> > +int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, > >> int reg); > >> > void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); > >> > void aarch64_sve_change_el(CPUARMState *env, int old_el, > >> > diff --git a/target/cris/cpu.h b/target/cris/cpu.h > >> > index 8f08d7628b..474a06f929 100644 > >> > --- a/target/cris/cpu.h > >> > +++ b/target/cris/cpu.h > >> > @@ -195,8 +195,8 @@ void cris_cpu_dump_state(CPUState *cs, FILE > >> *f, int flags); > >> > > >> > hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > > >> > -int crisv10_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *buf, int reg); > >> > -int cris_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int crisv10_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > +int cris_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > /* you can call this signal handler from your SIGBUS and SIGSEGV > >> > diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h > >> > index 801a4fb1ba..d584ad49b4 100644 > >> > --- a/target/hppa/cpu.h > >> > +++ b/target/hppa/cpu.h > >> > @@ -321,7 +321,7 @@ void cpu_hppa_change_prot_id(CPUHPPAState *env)= ; > >> > > >> > int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc); > >> > hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr); > >> > -int hppa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int hppa_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void hppa_cpu_do_interrupt(CPUState *cpu); > >> > bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > >> > index e818fc712a..9ad798c87e 100644 > >> > --- a/target/i386/cpu.h > >> > +++ b/target/i386/cpu.h > >> > @@ -1770,7 +1770,7 @@ void x86_cpu_dump_state(CPUState *cs, FILE > >> *f, int flags); > >> > hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr= , > >> > MemTxAttrs *attrs); > >> > > >> > -int x86_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int x86_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > void x86_cpu_exec_enter(CPUState *cpu); > >> > diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h > >> > index 01d408eb55..b64e7fdc44 100644 > >> > --- a/target/lm32/cpu.h > >> > +++ b/target/lm32/cpu.h > >> > @@ -202,7 +202,7 @@ void lm32_cpu_do_interrupt(CPUState *cpu); > >> > bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req); > >> > void lm32_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int lm32_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int lm32_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > typedef enum { > >> > diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h > >> > index 521ac67cdd..705d26746d 100644 > >> > --- a/target/m68k/cpu.h > >> > +++ b/target/m68k/cpu.h > >> > @@ -168,7 +168,7 @@ void m68k_cpu_do_interrupt(CPUState *cpu); > >> > bool m68k_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void m68k_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int m68k_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int m68k_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > void m68k_tcg_init(void); > >> > diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h > >> > index 1a700a880c..77d6c859ae 100644 > >> > --- a/target/microblaze/cpu.h > >> > +++ b/target/microblaze/cpu.h > >> > @@ -313,7 +313,7 @@ void mb_cpu_do_interrupt(CPUState *cs); > >> > bool mb_cpu_exec_interrupt(CPUState *cs, int int_req); > >> > void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, int reg); > >> > int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > > >> > void mb_tcg_init(void); > >> > diff --git a/target/mips/internal.h b/target/mips/internal.h > >> > index 1bf274b3ef..27a9e811f7 100644 > >> > --- a/target/mips/internal.h > >> > +++ b/target/mips/internal.h > >> > @@ -82,7 +82,7 @@ void mips_cpu_do_interrupt(CPUState *cpu); > >> > bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void mips_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int mips_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int mips_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, > >> > MMUAccessType access_type, > >> > diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h > >> > index f37a52e153..1d2d5214c2 100644 > >> > --- a/target/openrisc/cpu.h > >> > +++ b/target/openrisc/cpu.h > >> > @@ -320,7 +320,7 @@ void openrisc_cpu_do_interrupt(CPUState *cpu); > >> > bool openrisc_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)= ; > >> > -int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *buf, int reg); > >> > +int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, > >> int reg); > >> > void openrisc_translate_init(void); > >> > bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > >> > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > >> > index 88d9449555..049400f8d7 100644 > >> > --- a/target/ppc/cpu.h > >> > +++ b/target/ppc/cpu.h > >> > @@ -1207,8 +1207,8 @@ bool ppc_cpu_exec_interrupt(CPUState *cpu, > >> int int_req); > >> > void ppc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > void ppc_cpu_dump_statistics(CPUState *cpu, int flags); > >> > hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int ppc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > -int ppc_cpu_gdb_read_register_apple(CPUState *cpu, GByteArray > >> *buf, int reg); > >> > +int ppc_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > +int ppc_cpu_gdb_read_register_apple(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t > >> *buf, int reg); > >> > #ifndef CONFIG_USER_ONLY > >> > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > >> > index 7d21addbab..806cb3b044 100644 > >> > --- a/target/riscv/cpu.h > >> > +++ b/target/riscv/cpu.h > >> > @@ -293,7 +293,7 @@ extern const char * const riscv_excp_names[]; > >> > extern const char * const riscv_intr_names[]; > >> > > >> > void riscv_cpu_do_interrupt(CPUState *cpu); > >> > -int riscv_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int riscv_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int riscv_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request)= ; > >> > bool riscv_cpu_fp_enabled(CPURISCVState *env); > >> > diff --git a/target/rx/cpu.h b/target/rx/cpu.h > >> > index d1fb1ef3ca..994ab0c6fd 100644 > >> > --- a/target/rx/cpu.h > >> > +++ b/target/rx/cpu.h > >> > @@ -128,7 +128,7 @@ const char *rx_crname(uint8_t cr); > >> > void rx_cpu_do_interrupt(CPUState *cpu); > >> > bool rx_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void rx_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > -int rx_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int rx_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, int reg); > >> > int rx_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > hwaddr rx_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > > >> > diff --git a/target/s390x/internal.h b/target/s390x/internal.h > >> > index 8c95c734db..04fcb7da74 100644 > >> > --- a/target/s390x/internal.h > >> > +++ b/target/s390x/internal.h > >> > @@ -292,7 +292,7 @@ uint16_t float128_dcmask(CPUS390XState *env, > >> float128 f1); > >> > > >> > > >> > /* gdbstub.c */ > >> > -int s390_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > >> > +int s390_cpu_gdb_read_register(CPUState *cpu, GByteArray *array, > >> int reg); > >> > int s390_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void s390_cpu_gdb_init(CPUState *cs); > >> > > >> > diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h > >> > index dbe58c7888..6901c88d7e 100644 > >> > --- a/target/sh4/cpu.h > >> > +++ b/target/sh4/cpu.h > >> > @@ -208,7 +208,7 @@ void superh_cpu_do_interrupt(CPUState *cpu); > >> > bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req); > >> > void superh_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, > >> > MMUAccessType access_type, > >> > diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h > >> > index b9369398f2..bb9126b546 100644 > >> > --- a/target/sparc/cpu.h > >> > +++ b/target/sparc/cpu.h > >> > @@ -571,7 +571,7 @@ extern const VMStateDescription vmstate_sparc_cpu; > >> > void sparc_cpu_do_interrupt(CPUState *cpu); > >> > void sparc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); > >> > hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > -int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu, > >> vaddr addr, > >> > MMUAccessType > >> access_type, > >> > diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h > >> > index 7a46dccbe1..8a851e0b00 100644 > >> > --- a/target/xtensa/cpu.h > >> > +++ b/target/xtensa/cpu.h > >> > @@ -572,7 +572,7 @@ void xtensa_cpu_dump_state(CPUState *cpu, > >> FILE *f, int flags); > >> > hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); > >> > void xtensa_count_regs(const XtensaConfig *config, > >> > unsigned *n_regs, unsigned *n_core_regs); > >> > -int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, > >> int reg); > >> > +int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray > >> *array, int reg); > >> > int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > >> > void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, > >> > MMUAccessType access_type, > >> > diff --git a/gdbstub.c b/gdbstub.c > >> > index 171e150950..bc24b613b2 100644 > >> > --- a/gdbstub.c > >> > +++ b/gdbstub.c > >> > @@ -906,19 +906,19 @@ static const char *get_feature_xml(const > >> char *p, const char **newp, > >> > return name ? xml_builtin[i][1] : NULL; > >> > } > >> > > >> > -static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) > >> > +static int gdb_read_register(CPUState *cpu, GByteArray *array, int reg) > >> > { > >> > CPUClass *cc =3D CPU_GET_CLASS(cpu); > >> > CPUArchState *env =3D cpu->env_ptr; > >> > GDBRegisterState *r; > >> > > >> > if (reg < cc->gdb_num_core_regs) { > >> > - return cc->gdb_read_register(cpu, buf, reg); > >> > + return cc->gdb_read_register(cpu, array, reg); > >> > } > >> > > >> > for (r =3D cpu->gdb_regs; r; r =3D r->next) { > >> > if (r->base_reg <=3D reg && reg < r->base_reg + r->num_reg= s) { > >> > - return r->get_reg(env, buf, reg - r->base_reg); > >> > + return r->get_reg(env, array, reg - r->base_reg); > >> > } > >> > } > >> > return 0; > >> > diff --git a/hw/core/cpu.c b/hw/core/cpu.c > >> > index 786a1bec8a..0f2bd00176 100644 > >> > --- a/hw/core/cpu.c > >> > +++ b/hw/core/cpu.c > >> > @@ -177,7 +177,8 @@ static int > >> cpu_common_write_elf64_note(WriteCoreDumpFunction f, > >> > } > >> > > >> > > >> > -static int cpu_common_gdb_read_register(CPUState *cpu, > >> GByteArray *buf, int reg) > >> > +static int cpu_common_gdb_read_register(CPUState *cpu, > >> GByteArray *array, > >> > + int reg) > >> > { > >> > return 0; > >> > } > >> > diff --git a/target/alpha/gdbstub.c b/target/alpha/gdbstub.c > >> > index 0cd76ddaa9..415f422b03 100644 > >> > --- a/target/alpha/gdbstub.c > >> > +++ b/target/alpha/gdbstub.c > >> > @@ -21,7 +21,7 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int alpha_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int alpha_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > AlphaCPU *cpu =3D ALPHA_CPU(cs); > >> > CPUAlphaState *env =3D &cpu->env; > >> > @@ -54,7 +54,7 @@ int alpha_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > default: > >> > return 0; > >> > } > >> > - return gdb_get_regl(mem_buf, val); > >> > + return gdb_get_regl(array, val); > >> > } > >> > > >> > int alpha_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) > >> > diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c > >> > index 063551df23..66a8af8a19 100644 > >> > --- a/target/arm/gdbstub.c > >> > +++ b/target/arm/gdbstub.c > >> > @@ -33,21 +33,21 @@ typedef struct RegisterSysregXmlParam { > >> > We hack round this by giving the FPA regs zero size when talking to a > >> > newer gdb. */ > >> > > >> > -int arm_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int arm_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > ARMCPU *cpu =3D ARM_CPU(cs); > >> > CPUARMState *env =3D &cpu->env; > >> > > >> > if (n < 16) { > >> > /* Core integer register. */ > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } > >> > if (n < 24) { > >> > /* FPA registers. */ > >> > if (gdb_has_xml) { > >> > return 0; > >> > } > >> > - return gdb_get_zeroes(mem_buf, 12); > >> > + return gdb_get_zeroes(array, 12); > >> > } > >> > switch (n) { > >> > case 24: > >> > @@ -55,10 +55,10 @@ int arm_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > if (gdb_has_xml) { > >> > return 0; > >> > } > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > case 25: > >> > /* CPSR */ > >> > - return gdb_get_reg32(mem_buf, cpsr_read(env)); > >> > + return gdb_get_reg32(array, cpsr_read(env)); > >> > } > >> > /* Unknown register. */ > >> > return 0; > >> > diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c > >> > index 35d0b80c2d..16860a0522 100644 > >> > --- a/target/arm/gdbstub64.c > >> > +++ b/target/arm/gdbstub64.c > >> > @@ -20,22 +20,22 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *array, int n) > >> > { > >> > ARMCPU *cpu =3D ARM_CPU(cs); > >> > CPUARMState *env =3D &cpu->env; > >> > > >> > if (n < 31) { > >> > /* Core integer register. */ > >> > - return gdb_get_reg64(mem_buf, env->xregs[n]); > >> > + return gdb_get_reg64(array, env->xregs[n]); > >> > } > >> > switch (n) { > >> > case 31: > >> > - return gdb_get_reg64(mem_buf, env->xregs[31]); > >> > + return gdb_get_reg64(array, env->xregs[31]); > >> > case 32: > >> > - return gdb_get_reg64(mem_buf, env->pc); > >> > + return gdb_get_reg64(array, env->pc); > >> > case 33: > >> > - return gdb_get_reg32(mem_buf, pstate_read(env)); > >> > + return gdb_get_reg32(array, pstate_read(env)); > >> > } > >> > /* Unknown register. */ > >> > return 0; > >> > diff --git a/target/cris/gdbstub.c b/target/cris/gdbstub.c > >> > index b01b2aa081..dd7f754935 100644 > >> > --- a/target/cris/gdbstub.c > >> > +++ b/target/cris/gdbstub.c > >> > @@ -21,31 +21,31 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int crisv10_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int crisv10_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *array, int n) > >> > { > >> > CRISCPU *cpu =3D CRIS_CPU(cs); > >> > CPUCRISState *env =3D &cpu->env; > >> > > >> > if (n < 15) { > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } > >> > > >> > if (n =3D=3D 15) { > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > } > >> > > >> > if (n < 32) { > >> > switch (n) { > >> > case 16: > >> > - return gdb_get_reg8(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg8(array, env->pregs[n - 16]); > >> > case 17: > >> > - return gdb_get_reg8(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg8(array, env->pregs[n - 16]); > >> > case 20: > >> > case 21: > >> > - return gdb_get_reg16(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg16(array, env->pregs[n - 16]); > >> > default: > >> > if (n >=3D 23) { > >> > - return gdb_get_reg32(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg32(array, env->pregs[n - 16]); > >> > } > >> > break; > >> > } > >> > @@ -53,7 +53,7 @@ int crisv10_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > return 0; > >> > } > >> > > >> > -int cris_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int cris_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > CRISCPU *cpu =3D CRIS_CPU(cs); > >> > CPUCRISState *env =3D &cpu->env; > >> > @@ -61,28 +61,28 @@ int cris_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > > >> > srs =3D env->pregs[PR_SRS]; > >> > if (n < 16) { > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } > >> > > >> > if (n >=3D 21 && n < 32) { > >> > - return gdb_get_reg32(mem_buf, env->pregs[n - 16]); > >> > + return gdb_get_reg32(array, env->pregs[n - 16]); > >> > } > >> > if (n >=3D 33 && n < 49) { > >> > - return gdb_get_reg32(mem_buf, env->sregs[srs][n - 33]); > >> > + return gdb_get_reg32(array, env->sregs[srs][n - 33]); > >> > } > >> > switch (n) { > >> > case 16: > >> > - return gdb_get_reg8(mem_buf, env->pregs[0]); > >> > + return gdb_get_reg8(array, env->pregs[0]); > >> > case 17: > >> > - return gdb_get_reg8(mem_buf, env->pregs[1]); > >> > + return gdb_get_reg8(array, env->pregs[1]); > >> > case 18: > >> > - return gdb_get_reg32(mem_buf, env->pregs[2]); > >> > + return gdb_get_reg32(array, env->pregs[2]); > >> > case 19: > >> > - return gdb_get_reg8(mem_buf, srs); > >> > + return gdb_get_reg8(array, srs); > >> > case 20: > >> > - return gdb_get_reg16(mem_buf, env->pregs[4]); > >> > + return gdb_get_reg16(array, env->pregs[4]); > >> > case 32: > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > } > >> > > >> > return 0; > >> > diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c > >> > index a6428a2893..d0618f5175 100644 > >> > --- a/target/hppa/gdbstub.c > >> > +++ b/target/hppa/gdbstub.c > >> > @@ -21,7 +21,7 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int hppa_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int hppa_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > HPPACPU *cpu =3D HPPA_CPU(cs); > >> > CPUHPPAState *env =3D &cpu->env; > >> > @@ -140,9 +140,9 @@ int hppa_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > } > >> > > >> > if (TARGET_REGISTER_BITS =3D=3D 64) { > >> > - return gdb_get_reg64(mem_buf, val); > >> > + return gdb_get_reg64(array, val); > >> > } else { > >> > - return gdb_get_reg32(mem_buf, val); > >> > + return gdb_get_reg32(array, val); > >> > } > >> > } > >> > > >> > diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c > >> > index f3d23b614e..40f1b03a36 100644 > >> > --- a/target/i386/gdbstub.c > >> > +++ b/target/i386/gdbstub.c > >> > @@ -79,7 +79,7 @@ static const int gpr_map32[8] =3D { 0, 1, 2, 3, > >> 4, 5, 6, 7 }; > >> > #endif > >> > > >> > > >> > -int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > X86CPU *cpu =3D X86_CPU(cs); > >> > CPUX86State *env =3D &cpu->env; > >> > @@ -93,25 +93,25 @@ int x86_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > if (n < CPU_NB_REGS) { > >> > if (TARGET_LONG_BITS =3D=3D 64) { > >> > if (env->hflags & HF_CS64_MASK) { > >> > - return gdb_get_reg64(mem_buf, env->regs[gpr_map[n]]); > >> > + return gdb_get_reg64(array, env->regs[gpr_map[n]])= ; > >> > } else if (n < CPU_NB_REGS32) { > >> > - return gdb_get_reg64(mem_buf, > >> > + return gdb_get_reg64(array, > >> > env->regs[gpr_map[n]] & > >> 0xffffffffUL); > >> > } else { > >> > - return gdb_get_regl(mem_buf, 0); > >> > + return gdb_get_regl(array, 0); > >> > } > >> > } else { > >> > - return gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]])= ; > >> > + return gdb_get_reg32(array, env->regs[gpr_map32[n]]); > >> > } > >> > } else if (n >=3D IDX_FP_REGS && n < IDX_FP_REGS + 8) { > >> > floatx80 *fp =3D (floatx80 *) &env->fpregs[n - IDX_FP_REGS= ]; > >> > - int len =3D gdb_get_reg64(mem_buf, cpu_to_le64(fp->low)); > >> > - len +=3D gdb_get_reg16(mem_buf + len, cpu_to_le16(fp->high= )); > >> > + int len =3D gdb_get_reg64(array, cpu_to_le64(fp->low)); > >> > + len +=3D gdb_get_reg16(array + len, cpu_to_le16(fp->high))= ; > >> > return len; > >> > } else if (n >=3D IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { > >> > n -=3D IDX_XMM_REGS; > >> > if (n < CPU_NB_REGS32 || TARGET_LONG_BITS =3D=3D 64) { > >> > - return gdb_get_reg128(mem_buf, > >> > + return gdb_get_reg128(array, > >> > env->xmm_regs[n].ZMM_Q(0), > >> > env->xmm_regs[n].ZMM_Q(1)); > >> > } > >> > @@ -120,95 +120,95 @@ int x86_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > case IDX_IP_REG: > >> > if (TARGET_LONG_BITS =3D=3D 64) { > >> > if (env->hflags & HF_CS64_MASK) { > >> > - return gdb_get_reg64(mem_buf, env->eip); > >> > + return gdb_get_reg64(array, env->eip); > >> > } else { > >> > - return gdb_get_reg64(mem_buf, env->eip & > >> 0xffffffffUL); > >> > + return gdb_get_reg64(array, env->eip & > >> 0xffffffffUL); > >> > } > >> > } else { > >> > - return gdb_get_reg32(mem_buf, env->eip); > >> > + return gdb_get_reg32(array, env->eip); > >> > } > >> > case IDX_FLAGS_REG: > >> > - return gdb_get_reg32(mem_buf, env->eflags); > >> > + return gdb_get_reg32(array, env->eflags); > >> > > >> > case IDX_SEG_REGS: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_CS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_CS].selector); > >> > case IDX_SEG_REGS + 1: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_SS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_SS].selector); > >> > case IDX_SEG_REGS + 2: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_DS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_DS].selector); > >> > case IDX_SEG_REGS + 3: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_ES].selector); > >> > + return gdb_get_reg32(array, env->segs[R_ES].selector); > >> > case IDX_SEG_REGS + 4: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_FS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_FS].selector); > >> > case IDX_SEG_REGS + 5: > >> > - return gdb_get_reg32(mem_buf, env->segs[R_GS].selector); > >> > + return gdb_get_reg32(array, env->segs[R_GS].selector); > >> > > >> > case IDX_SEG_REGS + 6: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->segs[R_FS].base); > >> > + return gdb_get_reg64(array, env->segs[R_FS].base); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->segs[R_FS].base); > >> > + return gdb_get_reg32(array, env->segs[R_FS].base); > >> > > >> > case IDX_SEG_REGS + 7: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->segs[R_GS].base); > >> > + return gdb_get_reg64(array, env->segs[R_GS].base); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->segs[R_GS].base); > >> > + return gdb_get_reg32(array, env->segs[R_GS].base); > >> > > >> > case IDX_SEG_REGS + 8: > >> > #ifdef TARGET_X86_64 > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->kernelgsbase); > >> > + return gdb_get_reg64(array, env->kernelgsbase); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->kernelgsbase); > >> > + return gdb_get_reg32(array, env->kernelgsbase); > >> > #else > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > #endif > >> > > >> > case IDX_FP_REGS + 8: > >> > - return gdb_get_reg32(mem_buf, env->fpuc); > >> > + return gdb_get_reg32(array, env->fpuc); > >> > case IDX_FP_REGS + 9: > >> > - return gdb_get_reg32(mem_buf, (env->fpus & ~0x3800) | > >> > + return gdb_get_reg32(array, (env->fpus & ~0x3800) | > >> > (env->fpstt & 0x7) << 11); > >> > case IDX_FP_REGS + 10: > >> > - return gdb_get_reg32(mem_buf, 0); /* ftag */ > >> > + return gdb_get_reg32(array, 0); /* ftag */ > >> > case IDX_FP_REGS + 11: > >> > - return gdb_get_reg32(mem_buf, 0); /* fiseg */ > >> > + return gdb_get_reg32(array, 0); /* fiseg */ > >> > case IDX_FP_REGS + 12: > >> > - return gdb_get_reg32(mem_buf, 0); /* fioff */ > >> > + return gdb_get_reg32(array, 0); /* fioff */ > >> > case IDX_FP_REGS + 13: > >> > - return gdb_get_reg32(mem_buf, 0); /* foseg */ > >> > + return gdb_get_reg32(array, 0); /* foseg */ > >> > case IDX_FP_REGS + 14: > >> > - return gdb_get_reg32(mem_buf, 0); /* fooff */ > >> > + return gdb_get_reg32(array, 0); /* fooff */ > >> > case IDX_FP_REGS + 15: > >> > - return gdb_get_reg32(mem_buf, 0); /* fop */ > >> > + return gdb_get_reg32(array, 0); /* fop */ > >> > > >> > case IDX_MXCSR_REG: > >> > - return gdb_get_reg32(mem_buf, env->mxcsr); > >> > + return gdb_get_reg32(array, env->mxcsr); > >> > > >> > case IDX_CTL_CR0_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->cr[0]); > >> > + return gdb_get_reg64(array, env->cr[0]); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->cr[0]); > >> > + return gdb_get_reg32(array, env->cr[0]); > >> > > >> > case IDX_CTL_CR2_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->cr[2]); > >> > + return gdb_get_reg64(array, env->cr[2]); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->cr[2]); > >> > + return gdb_get_reg32(array, env->cr[2]); > >> > > >> > case IDX_CTL_CR3_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->cr[3]); > >> > + return gdb_get_reg64(array, env->cr[3]); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->cr[3]); > >> > + return gdb_get_reg32(array, env->cr[3]); > >> > > >> > case IDX_CTL_CR4_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->cr[4]); > >> > + return gdb_get_reg64(array, env->cr[4]); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->cr[4]); > >> > + return gdb_get_reg32(array, env->cr[4]); > >> > > >> > case IDX_CTL_CR8_REG: > >> > #ifdef CONFIG_SOFTMMU > >> > @@ -217,15 +217,15 @@ int x86_cpu_gdb_read_register(CPUState *cs, > >> GByteArray *mem_buf, int n) > >> > tpr =3D 0; > >> > #endif > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, tpr); > >> > + return gdb_get_reg64(array, tpr); > >> > } > >> > - return gdb_get_reg32(mem_buf, tpr); > >> > + return gdb_get_reg32(array, tpr); > >> > > >> > case IDX_CTL_EFER_REG: > >> > if ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) { > >> > - return gdb_get_reg64(mem_buf, env->efer); > >> > + return gdb_get_reg64(array, env->efer); > >> > } > >> > - return gdb_get_reg32(mem_buf, env->efer); > >> > + return gdb_get_reg32(array, env->efer); > >> > } > >> > } > >> > return 0; > >> > diff --git a/target/lm32/gdbstub.c b/target/lm32/gdbstub.c > >> > index b6fe12e1d6..6198719944 100644 > >> > --- a/target/lm32/gdbstub.c > >> > +++ b/target/lm32/gdbstub.c > >> > @@ -22,30 +22,30 @@ > >> > #include "exec/gdbstub.h" > >> > #include "hw/lm32/lm32_pic.h" > >> > > >> > -int lm32_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int lm32_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > LM32CPU *cpu =3D LM32_CPU(cs); > >> > CPULM32State *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } else { > >> > switch (n) { > >> > case 32: > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > /* FIXME: put in right exception ID */ > >> > case 33: > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > case 34: > >> > - return gdb_get_reg32(mem_buf, env->eba); > >> > + return gdb_get_reg32(array, env->eba); > >> > case 35: > >> > - return gdb_get_reg32(mem_buf, env->deba); > >> > + return gdb_get_reg32(array, env->deba); > >> > case 36: > >> > - return gdb_get_reg32(mem_buf, env->ie); > >> > + return gdb_get_reg32(array, env->ie); > >> > case 37: > >> > - return gdb_get_reg32(mem_buf, > >> lm32_pic_get_im(env->pic_state)); > >> > + return gdb_get_reg32(array, > >> lm32_pic_get_im(env->pic_state)); > >> > case 38: > >> > - return gdb_get_reg32(mem_buf, > >> lm32_pic_get_ip(env->pic_state)); > >> > + return gdb_get_reg32(array, > >> lm32_pic_get_ip(env->pic_state)); > >> > } > >> > } > >> > return 0; > >> > diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c > >> > index eb2d030e14..9405dc4b4e 100644 > >> > --- a/target/m68k/gdbstub.c > >> > +++ b/target/m68k/gdbstub.c > >> > @@ -21,24 +21,24 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int m68k_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int m68k_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > M68kCPU *cpu =3D M68K_CPU(cs); > >> > CPUM68KState *env =3D &cpu->env; > >> > > >> > if (n < 8) { > >> > /* D0-D7 */ > >> > - return gdb_get_reg32(mem_buf, env->dregs[n]); > >> > + return gdb_get_reg32(array, env->dregs[n]); > >> > } else if (n < 16) { > >> > /* A0-A7 */ > >> > - return gdb_get_reg32(mem_buf, env->aregs[n - 8]); > >> > + return gdb_get_reg32(array, env->aregs[n - 8]); > >> > } else { > >> > switch (n) { > >> > case 16: > >> > /* SR is made of SR+CCR, CCR is many 1bit flags so > >> uses helper */ > >> > - return gdb_get_reg32(mem_buf, env->sr | > >> cpu_m68k_get_ccr(env)); > >> > + return gdb_get_reg32(array, env->sr | > >> cpu_m68k_get_ccr(env)); > >> > case 17: > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > } > >> > } > >> > /* > >> > diff --git a/target/m68k/helper.c b/target/m68k/helper.c > >> > index 014657c637..968371476a 100644 > >> > --- a/target/m68k/helper.c > >> > +++ b/target/m68k/helper.c > >> > @@ -68,19 +68,19 @@ void m68k_cpu_list(void) > >> > g_slist_free(list); > >> > } > >> > > >> > -static int cf_fpu_gdb_get_reg(CPUM68KState *env, GByteArray > >> *mem_buf, int n) > >> > +static int cf_fpu_gdb_get_reg(CPUM68KState *env, GByteArray > >> *array, int n) > >> > { > >> > if (n < 8) { > >> > float_status s; > >> > - return gdb_get_reg64(mem_buf, > >> floatx80_to_float64(env->fregs[n].d, &s)); > >> > + return gdb_get_reg64(array, > >> floatx80_to_float64(env->fregs[n].d, &s)); > >> > } > >> > switch (n) { > >> > case 8: /* fpcontrol */ > >> > - return gdb_get_reg32(mem_buf, env->fpcr); > >> > + return gdb_get_reg32(array, env->fpcr); > >> > case 9: /* fpstatus */ > >> > - return gdb_get_reg32(mem_buf, env->fpsr); > >> > + return gdb_get_reg32(array, env->fpsr); > >> > case 10: /* fpiar, not implemented */ > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > } > >> > return 0; > >> > } > >> > @@ -105,21 +105,21 @@ static int cf_fpu_gdb_set_reg(CPUM68KState > >> *env, uint8_t *mem_buf, int n) > >> > return 0; > >> > } > >> > > >> > -static int m68k_fpu_gdb_get_reg(CPUM68KState *env, GByteArray > >> *mem_buf, int n) > >> > +static int m68k_fpu_gdb_get_reg(CPUM68KState *env, GByteArray > >> *array, int n) > >> > { > >> > if (n < 8) { > >> > - int len =3D gdb_get_reg16(mem_buf, env->fregs[n].l.upper); > >> > - len +=3D gdb_get_reg16(mem_buf + len, 0); > >> > - len +=3D gdb_get_reg64(mem_buf + len, env->fregs[n].l.lowe= r); > >> > + int len =3D gdb_get_reg16(array, env->fregs[n].l.upper); > >> > + len +=3D gdb_get_reg16(array + len, 0); > >> > + len +=3D gdb_get_reg64(array + len, env->fregs[n].l.lower)= ; > >> > return len; > >> > } > >> > switch (n) { > >> > case 8: /* fpcontrol */ > >> > - return gdb_get_reg32(mem_buf, env->fpcr); > >> > + return gdb_get_reg32(array, env->fpcr); > >> > case 9: /* fpstatus */ > >> > - return gdb_get_reg32(mem_buf, env->fpsr); > >> > + return gdb_get_reg32(array, env->fpsr); > >> > case 10: /* fpiar, not implemented */ > >> > - return gdb_get_reg32(mem_buf, 0); > >> > + return gdb_get_reg32(array, 0); > >> > } > >> > return 0; > >> > } > >> > diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c > >> > index f41ebf1f33..40d41e12ce 100644 > >> > --- a/target/microblaze/gdbstub.c > >> > +++ b/target/microblaze/gdbstub.c > >> > @@ -21,15 +21,15 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > MicroBlazeCPU *cpu =3D MICROBLAZE_CPU(cs); > >> > CPUMBState *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } else { > >> > - return gdb_get_reg32(mem_buf, env->sregs[n - 32]); > >> > + return gdb_get_reg32(array, env->sregs[n - 32]); > >> > } > >> > return 0; > >> > } > >> > diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c > >> > index 98f56e660d..0fc957d5cd 100644 > >> > --- a/target/mips/gdbstub.c > >> > +++ b/target/mips/gdbstub.c > >> > @@ -22,54 +22,54 @@ > >> > #include "internal.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int mips_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int mips_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > MIPSCPU *cpu =3D MIPS_CPU(cs); > >> > CPUMIPSState *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_regl(mem_buf, env->active_tc.gpr[n]); > >> > + return gdb_get_regl(array, env->active_tc.gpr[n]); > >> > } > >> > if (env->CP0_Config1 & (1 << CP0C1_FP) && n >=3D 38 && n < 72)= { > >> > switch (n) { > >> > case 70: > >> > - return gdb_get_regl(mem_buf, > >> (int32_t)env->active_fpu.fcr31); > >> > + return gdb_get_regl(array, (int32_t)env->active_fpu.fcr31); > >> > case 71: > >> > - return gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr0); > >> > + return gdb_get_regl(array, (int32_t)env->active_fpu.fcr0); > >> > default: > >> > if (env->CP0_Status & (1 << CP0St_FR)) { > >> > - return gdb_get_regl(mem_buf, > >> > + return gdb_get_regl(array, > >> > env->active_fpu.fpr[n - 38].d); > >> > } else { > >> > - return gdb_get_regl(mem_buf, > >> > + return gdb_get_regl(array, > >> > env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]); > >> > } > >> > } > >> > } > >> > switch (n) { > >> > case 32: > >> > - return gdb_get_regl(mem_buf, (int32_t)env->CP0_Status); > >> > + return gdb_get_regl(array, (int32_t)env->CP0_Status); > >> > case 33: > >> > - return gdb_get_regl(mem_buf, env->active_tc.LO[0]); > >> > + return gdb_get_regl(array, env->active_tc.LO[0]); > >> > case 34: > >> > - return gdb_get_regl(mem_buf, env->active_tc.HI[0]); > >> > + return gdb_get_regl(array, env->active_tc.HI[0]); > >> > case 35: > >> > - return gdb_get_regl(mem_buf, env->CP0_BadVAddr); > >> > + return gdb_get_regl(array, env->CP0_BadVAddr); > >> > case 36: > >> > - return gdb_get_regl(mem_buf, (int32_t)env->CP0_Cause); > >> > + return gdb_get_regl(array, (int32_t)env->CP0_Cause); > >> > case 37: > >> > - return gdb_get_regl(mem_buf, env->active_tc.PC | > >> > + return gdb_get_regl(array, env->active_tc.PC | > >> > !!(env->hflags & MIPS_HFLAG_M16)); > >> > case 72: > >> > - return gdb_get_regl(mem_buf, 0); /* fp */ > >> > + return gdb_get_regl(array, 0); /* fp */ > >> > case 89: > >> > - return gdb_get_regl(mem_buf, (int32_t)env->CP0_PRid); > >> > + return gdb_get_regl(array, (int32_t)env->CP0_PRid); > >> > default: > >> > if (n > 89) { > >> > return 0; > >> > } > >> > /* 16 embedded regs. */ > >> > - return gdb_get_regl(mem_buf, 0); > >> > + return gdb_get_regl(array, 0); > >> > } > >> > > >> > return 0; > >> > diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c > >> > index 8f7011fcb9..3cf696402f 100644 > >> > --- a/target/nios2/cpu.c > >> > +++ b/target/nios2/cpu.c > >> > @@ -124,7 +124,7 @@ static void nios2_cpu_disas_set_info(CPUState > >> *cpu, disassemble_info *info) > >> > #endif > >> > } > >> > > >> > -static int nios2_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +static int nios2_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *array, int n) > >> > { > >> > Nios2CPU *cpu =3D NIOS2_CPU(cs); > >> > CPUClass *cc =3D CPU_GET_CLASS(cs); > >> > @@ -135,11 +135,11 @@ static int > >> nios2_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int > >> n) > >> > } > >> > > >> > if (n < 32) { /* GP regs */ > >> > - return gdb_get_reg32(mem_buf, env->regs[n]); > >> > + return gdb_get_reg32(array, env->regs[n]); > >> > } else if (n =3D=3D 32) { /* PC */ > >> > - return gdb_get_reg32(mem_buf, env->regs[R_PC]); > >> > + return gdb_get_reg32(array, env->regs[R_PC]); > >> > } else if (n < 49) { /* Status regs */ > >> > - return gdb_get_reg32(mem_buf, env->regs[n - 1]); > >> > + return gdb_get_reg32(array, env->regs[n - 1]); > >> > } > >> > > >> > /* Invalid regs */ > >> > diff --git a/target/openrisc/gdbstub.c b/target/openrisc/gdbstub.c > >> > index 095bf76c12..c34d3696ec 100644 > >> > --- a/target/openrisc/gdbstub.c > >> > +++ b/target/openrisc/gdbstub.c > >> > @@ -21,23 +21,23 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int openrisc_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int openrisc_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *array, int n) > >> > { > >> > OpenRISCCPU *cpu =3D OPENRISC_CPU(cs); > >> > CPUOpenRISCState *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_reg32(mem_buf, cpu_get_gpr(env, n)); > >> > + return gdb_get_reg32(array, cpu_get_gpr(env, n)); > >> > } else { > >> > switch (n) { > >> > case 32: /* PPC */ > >> > - return gdb_get_reg32(mem_buf, env->ppc); > >> > + return gdb_get_reg32(array, env->ppc); > >> > > >> > case 33: /* NPC (equals PC) */ > >> > - return gdb_get_reg32(mem_buf, env->pc); > >> > + return gdb_get_reg32(array, env->pc); > >> > > >> > case 34: /* SR */ > >> > - return gdb_get_reg32(mem_buf, cpu_get_sr(env)); > >> > + return gdb_get_reg32(array, cpu_get_sr(env)); > >> > > >> > default: > >> > break; > >> > diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c > >> > index eba12a86f2..8e1d64c1cf 100644 > >> > --- a/target/riscv/gdbstub.c > >> > +++ b/target/riscv/gdbstub.c > >> > @@ -270,15 +270,15 @@ static int csr_register_map[] =3D { > >> > CSR_MHCOUNTEREN, > >> > }; > >> > > >> > -int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray > >> *mem_buf, int n) > >> > +int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > RISCVCPU *cpu =3D RISCV_CPU(cs); > >> > CPURISCVState *env =3D &cpu->env; > >> > > >> > if (n < 32) { > >> > - return gdb_get_regl(mem_buf, env->gpr[n]); > >> > + return gdb_get_regl(array, env->gpr[n]); > >> > } else if (n =3D=3D 32) { > >> > - return gdb_get_regl(mem_buf, env->pc); > >> > + return gdb_get_regl(array, env->pc); > >> > } > >> > return 0; > >> > } > >> > diff --git a/target/rx/gdbstub.c b/target/rx/gdbstub.c > >> > index 9391e8151e..91dee774f6 100644 > >> > --- a/target/rx/gdbstub.c > >> > +++ b/target/rx/gdbstub.c > >> > @@ -20,32 +20,32 @@ > >> > #include "cpu.h" > >> > #include "exec/gdbstub.h" > >> > > >> > -int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > RXCPU *cpu =3D RXCPU(cs); > >> > CPURXState *env =3D &cpu->env; > >> > > >> > switch (n) { > >> > case 0 ... 15: > >> > - return gdb_get_regl(mem_buf, env->regs[n]); > >> > + return gdb_get_regl(array, env->regs[n]); > >> > case 16: > >> > - return gdb_get_regl(mem_buf, (env->psw_u) ? env->regs[0] > >> : env->usp); > >> > + return gdb_get_regl(array, (env->psw_u) ? env->regs[0] : > >> env->usp); > >> > case 17: > >> > - return gdb_get_regl(mem_buf, (!env->psw_u) ? > >> env->regs[0] : env->isp); > >> > + return gdb_get_regl(array, (!env->psw_u) ? env->regs[0] > >> : env->isp); > >> > case 18: > >> > - return gdb_get_regl(mem_buf, rx_cpu_pack_psw(env)); > >> > + return gdb_get_regl(array, rx_cpu_pack_psw(env)); > >> > case 19: > >> > - return gdb_get_regl(mem_buf, env->pc); > >> > + return gdb_get_regl(array, env->pc); > >> > case 20: > >> > - return gdb_get_regl(mem_buf, env->intb); > >> > + return gdb_get_regl(array, env->intb); > >> > case 21: > >> > - return gdb_get_regl(mem_buf, env->bpsw); > >> > + return gdb_get_regl(array, env->bpsw); > >> > case 22: > >> > - return gdb_get_regl(mem_buf, env->bpc); > >> > + return gdb_get_regl(array, env->bpc); > >> > case 23: > >> > - return gdb_get_regl(mem_buf, env->fintv); > >> > + return gdb_get_regl(array, env->fintv); > >> > case 24: > >> > - return gdb_get_regl(mem_buf, env->fpsw); > >> > + return gdb_get_regl(array, env->fpsw); > >> > case 25: > >> > return 0; > >> > } > >> > diff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c > >> > index d6fce5ff1e..adbe7b5d39 100644 > >> > --- a/target/s390x/gdbstub.c > >> > +++ b/target/s390x/gdbstub.c > >> > @@ -27,7 +27,7 @@ > >> > #include "sysemu/hw_accel.h" > >> > #include "sysemu/tcg.h" > >> > > >> > -int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > >> > +int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *array, int n) > >> > { > >> > S390CPU *cpu =3D S390_CPU(cs); > >> --0000000000004018db05a34199ba Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

4:26 PM Uto, 14.04.2020. Alex Benn=C3=A9e <alex.bennee@linaro.org> =D1=98=D0=B5 =D0= =BD=D0=B0=D0=BF=D0=B8=D1=81=D0=B0=D0=BE/=D0=BB=D0=B0:
>
>
> Philippe Mathieu-Daud=C3=A9 <p= hilmd@redhat.com> writes:
>
> > On 4/14/20 3:35 PM, Aleksandar Markovic wrote:
> >> 1:28 PM Uto, 14.04.2020. Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com
> >> <mailto:philmd@redhat= .com>> =D1=98=D0=B5 =D0=BD=D0=B0=D0=BF=D0=B8=D1=81=D0=B0=D0=BE/= =D0=BB=D0=B0:
> >>=C2=A0 >
> >>=C2=A0 > GByteArray type has should not be treated as a u8[= ] buffer.
> >>=C2=A0 > The GLib Byte Arrays API should be used instead. > >>=C2=A0 > Rename the 'mem_buf' variable as 'arra= y' to make it more
> >>=C2=A0 > obvious in the code.
> >>=C2=A0 >
> >> Hi, Philippe.
> >> "array" is a horrible choice for a name. It must be= more specific.
> >
> > This is how the prototype is documented:
> >
> > https://developer.gnome.org/glib/stable/glib-B= yte-Arrays.html#g-byte-array-append
> >
> > GByteArray *
> > g_byte_array_append (GByteArray *array,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 const guint8 *data,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 guint len);
> >
> > What do you suggest?
>
> *buf was also pretty generic. That said I think the "array"-= like
> properties of this structure are fairly incidental to it's purpose= which
> is a opaque place to store the register data for gdbstub. As we alread= y
> communicate the type in the function prototype maybe *reg or *regdata?=
>

I am not a frequent user of this interface, but mostly as an= observer, Alex' "regdata" seems a reasonable choice to me.

Does anybody happen to have a better idea?

Regards,
Aleksandar

> >
> >> Regards,
> >> Aleksandar
> >>=C2=A0 > Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com
> >> <mailto:philmd@redhat= .com>>
> >>=C2=A0 > ---
> >>=C2=A0 > Based-on: <20200414111846.27495-1-philmd@redhat.com
> >> <mailto:20200414111846.27495-1-philmd@redhat.com>>
> >>=C2=A0 > Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com
> >> <mailto:philmd@redhat= .com>>
> >>=C2=A0 > ---
> >>=C2=A0 >=C2=A0 include/exec/gdbstub.h=C2=A0 =C2=A0 =C2=A0 |= 34 +++++++-------
> >>=C2=A0 >=C2=A0 include/hw/core/cpu.h=C2=A0 =C2=A0 =C2=A0 = =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/alpha/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 |=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/arm/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 |=C2=A0 4 +-
> >>=C2=A0 >=C2=A0 target/cris/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 4 +-
> >>=C2=A0 >=C2=A0 target/hppa/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/i386/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/lm32/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/m68k/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/microblaze/cpu.h=C2=A0 =C2=A0 =C2=A0|= =C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/mips/internal.h=C2=A0 =C2=A0 =C2=A0 |= =C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/openrisc/cpu.h=C2=A0 =C2=A0 =C2=A0 = =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/ppc/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 |=C2=A0 4 +-
> >>=C2=A0 >=C2=A0 target/riscv/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 |=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/rx/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/s390x/internal.h=C2=A0 =C2=A0 =C2=A0|= =C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/sh4/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 |=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/sparc/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 |=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 target/xtensa/cpu.h=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0|=C2=A0 2 +-
> >>=C2=A0 >=C2=A0 gdbstub.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 6 +--
> >>=C2=A0 >=C2=A0 hw/core/cpu.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 3 +-
> >>=C2=A0 >=C2=A0 target/alpha/gdbstub.c=C2=A0 =C2=A0 =C2=A0 |= =C2=A0 4 +-
> >>=C2=A0 >=C2=A0 target/arm/gdbstub.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 | 10 ++--
> >>=C2=A0 >=C2=A0 target/arm/gdbstub64.c=C2=A0 =C2=A0 =C2=A0 |= 10 ++--
> >>=C2=A0 >=C2=A0 target/cris/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 34 +++++++-------
> >>=C2=A0 >=C2=A0 target/hppa/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0|=C2=A0 6 +--
> >>=C2=A0 >=C2=A0 target/i386/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 92 ++++++++++++++++++-------------------
> >>=C2=A0 >=C2=A0 target/lm32/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 18 ++++----
> >>=C2=A0 >=C2=A0 target/m68k/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 10 ++--
> >>=C2=A0 >=C2=A0 target/m68k/helper.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 | 24 +++++-----
> >>=C2=A0 >=C2=A0 target/microblaze/gdbstub.c |=C2=A0 6 +-- > >>=C2=A0 >=C2=A0 target/mips/gdbstub.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0| 30 ++++++------
> >>=C2=A0 >=C2=A0 target/nios2/cpu.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 |=C2=A0 8 ++--
> >>=C2=A0 >=C2=A0 target/openrisc/gdbstub.c=C2=A0 =C2=A0| 10 += +--
> >>=C2=A0 >=C2=A0 target/riscv/gdbstub.c=C2=A0 =C2=A0 =C2=A0 |= =C2=A0 6 +--
> >>=C2=A0 >=C2=A0 target/rx/gdbstub.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0| 22 ++++-----
> >>=C2=A0 >=C2=A0 target/s390x/gdbstub.c=C2=A0 =C2=A0 =C2=A0 |= 28 +++++------
> >>=C2=A0 >=C2=A0 target/sh4/gdbstub.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 | 38 +++++++--------
> >>=C2=A0 >=C2=A0 target/sparc/gdbstub.c=C2=A0 =C2=A0 =C2=A0 |= 46 +++++++++----------
> >>=C2=A0 >=C2=A0 target/xtensa/gdbstub.c=C2=A0 =C2=A0 =C2=A0|= 20 ++++----
> >>=C2=A0 >=C2=A0 40 files changed, 254 insertions(+), 253 del= etions(-)
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/include/exec/gdbstub.h b/include/exec= /gdbstub.h
> >>=C2=A0 > index 52a4a936c6..29150d1344 100644
> >>=C2=A0 > --- a/include/exec/gdbstub.h
> >>=C2=A0 > +++ b/include/exec/gdbstub.h
> >>=C2=A0 > @@ -80,47 +80,47 @@ void gdb_register_coprocessor(= CPUState *cpu,
> >>=C2=A0 >=C2=A0 =C2=A0* append to the array.
> >>=C2=A0 >=C2=A0 =C2=A0*/
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg8(GByteArray *buf, u= int8_t val)
> >>=C2=A0 > +static inline int gdb_get_reg8(GByteArray *array,= uint8_t val)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, &val, = 1);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, &val= , 1);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 1;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg16(GByteArray *buf, = uint16_t val)
> >>=C2=A0 > +static inline int gdb_get_reg16(GByteArray *array= , uint16_t val)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 uint16_t to_word =3D tswap16(v= al);
> >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_word, 2);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_word, 2);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 2;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg32(GByteArray *buf, = uint32_t val)
> >>=C2=A0 > +static inline int gdb_get_reg32(GByteArray *array= , uint32_t val)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 uint32_t to_long =3D tswap32(v= al);
> >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_long, 4);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_long, 4);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 4;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg64(GByteArray *buf, = uint64_t val)
> >>=C2=A0 > +static inline int gdb_get_reg64(GByteArray *array= , uint64_t val)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 uint64_t to_quad =3D tswap64(v= al);
> >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 8;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static inline int gdb_get_reg128(GByteArray *buf,= uint64_t val_hi,
> >>=C2=A0 > +static inline int gdb_get_reg128(GByteArray *arra= y, uint64_t val_hi,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0uint64_t val_lo)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 uint64_t to_quad;
> >>=C2=A0 >=C2=A0 #ifdef TARGET_WORDS_BIGENDIAN
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 to_quad =3D tswap64(val_hi); > >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 to_quad =3D tswap64(val_lo); > >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 #else
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 to_quad =3D tswap64(val_lo); > >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 to_quad =3D tswap64(val_hi); > >>=C2=A0 > -=C2=A0 =C2=A0 g_byte_array_append(buf, (uint8_t *= ) &to_quad, 8);
> >>=C2=A0 > +=C2=A0 =C2=A0 g_byte_array_append(array, (uint8_t= *) &to_quad, 8);
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 16;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > @@ -154,16 +154,16 @@ static inline int gdb_get_ze= roes(GByteArray
> >> *array, size_t len)
> >>=C2=A0 >=C2=A0 =C2=A0* element for additional processing. S= ome front-ends do additional
> >>=C2=A0 >=C2=A0 =C2=A0* dynamic swapping of the elements bas= ed on CPU state.
> >>=C2=A0 >=C2=A0 =C2=A0*/
> >>=C2=A0 > -static inline uint8_t * gdb_get_reg_ptr(GByteArra= y *buf, int len)
> >>=C2=A0 > +static inline uint8_t *gdb_get_reg_ptr(GByteArray= *array, int len)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 > -=C2=A0 =C2=A0 return buf->data + buf->len -= len;
> >>=C2=A0 > +=C2=A0 =C2=A0 return array->data + array->l= en - len;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 #if TARGET_LONG_BITS =3D=3D 64
> >>=C2=A0 > -#define gdb_get_regl(buf, val) gdb_get_reg64(buf,= val)
> >>=C2=A0 > +#define gdb_get_regl(array, val) gdb_get_reg64(ar= ray, val)
> >>=C2=A0 >=C2=A0 #define ldtul_p(addr) ldq_p(addr)
> >>=C2=A0 >=C2=A0 #else
> >>=C2=A0 > -#define gdb_get_regl(buf, val) gdb_get_reg32(buf,= val)
> >>=C2=A0 > +#define gdb_get_regl(array, val) gdb_get_reg32(ar= ray, val)
> >>=C2=A0 >=C2=A0 #define ldtul_p(addr) ldl_p(addr)
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/include/hw/core/cpu.h b/include/hw/co= re/cpu.h
> >>=C2=A0 > index 5bf94d28cf..31434d3b1f 100644
> >>=C2=A0 > --- a/include/hw/core/cpu.h
> >>=C2=A0 > +++ b/include/hw/core/cpu.h
> >>=C2=A0 > @@ -193,7 +193,7 @@ typedef struct CPUClass {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 hwaddr (*get_phys_page_attrs_d= ebug)(CPUState *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 MemTxAttrs *attrs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 int (*asidx_from_attrs)(CPUSta= te *cpu, MemTxAttrs attrs);
> >>=C2=A0 > -=C2=A0 =C2=A0 int (*gdb_read_register)(CPUState *= cpu, GByteArray *buf, int reg);
> >>=C2=A0 > +=C2=A0 =C2=A0 int (*gdb_read_register)(CPUState *= cpu, GByteArray *array, int reg);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 int (*gdb_write_register)(CPUS= tate *cpu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 bool (*debug_check_watchpoint)= (CPUState *cpu, CPUWatchpoint *wp);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 void (*debug_excp_handler)(CPU= State *cpu);
> >>=C2=A0 > diff --git a/target/alpha/cpu.h b/target/alpha/cpu= .h
> >>=C2=A0 > index be29bdd530..94853d0bee 100644
> >>=C2=A0 > --- a/target/alpha/cpu.h
> >>=C2=A0 > +++ b/target/alpha/cpu.h
> >>=C2=A0 > @@ -280,7 +280,7 @@ void alpha_cpu_do_interrupt(CP= UState *cpu);
> >>=C2=A0 >=C2=A0 bool alpha_cpu_exec_interrupt(CPUState *cpu,= int int_req);
> >>=C2=A0 >=C2=A0 void alpha_cpu_dump_state(CPUState *cs, FILE= *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr alpha_cpu_get_phys_page_debug(CPUStat= e *cpu, vaddr addr);
> >>=C2=A0 > -int alpha_cpu_gdb_read_register(CPUState *cpu, GB= yteArray *buf,
> >> int reg);
> >>=C2=A0 > +int alpha_cpu_gdb_read_register(CPUState *cpu, GB= yteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int alpha_cpu_gdb_write_register(CPUState *c= pu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void alpha_cpu_do_unaligned_access(CPUState = *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0MMUAccessType access_type,
> >>=C2=A0 > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > >>=C2=A0 > index 8b9f2961ba..cbd3a262f3 100644
> >>=C2=A0 > --- a/target/arm/cpu.h
> >>=C2=A0 > +++ b/target/arm/cpu.h
> >>=C2=A0 > @@ -975,7 +975,7 @@ bool arm_cpu_exec_interrupt(CP= UState *cpu,
> >> int int_req);
> >>=C2=A0 >=C2=A0 hwaddr arm_cpu_get_phys_page_attrs_debug(CPU= State *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MemTxAttrs *attrs);
> >>=C2=A0 >
> >>=C2=A0 > -int arm_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *buf, int reg);
> >>=C2=A0 > +int arm_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int arm_cpu_gdb_write_register(CPUState *cpu= , uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 /*
> >>=C2=A0 > @@ -997,7 +997,7 @@ int
> >> arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *c= s,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0int cpuid, vo= id *opaque);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 #ifdef TARGET_AARCH64
> >>=C2=A0 > -int aarch64_cpu_gdb_read_register(CPUState *cpu, = GByteArray
> >> *buf, int reg);
> >>=C2=A0 > +int aarch64_cpu_gdb_read_register(CPUState *cpu, = GByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int aarch64_cpu_gdb_write_register(CPUState = *cpu, uint8_t *buf,
> >> int reg);
> >>=C2=A0 >=C2=A0 void aarch64_sve_narrow_vq(CPUARMState *env,= unsigned vq);
> >>=C2=A0 >=C2=A0 void aarch64_sve_change_el(CPUARMState *env,= int old_el,
> >>=C2=A0 > diff --git a/target/cris/cpu.h b/target/cris/cpu.h=
> >>=C2=A0 > index 8f08d7628b..474a06f929 100644
> >>=C2=A0 > --- a/target/cris/cpu.h
> >>=C2=A0 > +++ b/target/cris/cpu.h
> >>=C2=A0 > @@ -195,8 +195,8 @@ void cris_cpu_dump_state(CPUSt= ate *cs, FILE
> >> *f, int flags);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 hwaddr cris_cpu_get_phys_page_debug(CPUState= *cpu, vaddr addr);
> >>=C2=A0 >
> >>=C2=A0 > -int crisv10_cpu_gdb_read_register(CPUState *cpu, = GByteArray
> >> *buf, int reg);
> >>=C2=A0 > -int cris_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int crisv10_cpu_gdb_read_register(CPUState *cpu, = GByteArray
> >> *array, int reg);
> >>=C2=A0 > +int cris_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int cris_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 /* you can call this signal handler from you= r SIGBUS and SIGSEGV
> >>=C2=A0 > diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h=
> >>=C2=A0 > index 801a4fb1ba..d584ad49b4 100644
> >>=C2=A0 > --- a/target/hppa/cpu.h
> >>=C2=A0 > +++ b/target/hppa/cpu.h
> >>=C2=A0 > @@ -321,7 +321,7 @@ void cpu_hppa_change_prot_id(C= PUHPPAState *env);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 int cpu_hppa_signal_handler(int host_signum,= void *pinfo, void *puc);
> >>=C2=A0 >=C2=A0 hwaddr hppa_cpu_get_phys_page_debug(CPUState= *cs, vaddr addr);
> >>=C2=A0 > -int hppa_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int hppa_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int hppa_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void hppa_cpu_do_interrupt(CPUState *cpu); > >>=C2=A0 >=C2=A0 bool hppa_cpu_exec_interrupt(CPUState *cpu, = int int_req);
> >>=C2=A0 > diff --git a/target/i386/cpu.h b/target/i386/cpu.h=
> >>=C2=A0 > index e818fc712a..9ad798c87e 100644
> >>=C2=A0 > --- a/target/i386/cpu.h
> >>=C2=A0 > +++ b/target/i386/cpu.h
> >>=C2=A0 > @@ -1770,7 +1770,7 @@ void x86_cpu_dump_state(CPUS= tate *cs, FILE
> >> *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr x86_cpu_get_phys_page_attrs_debug(CPU= State *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MemTxAttrs *attrs);
> >>=C2=A0 >
> >>=C2=A0 > -int x86_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *buf, int reg);
> >>=C2=A0 > +int x86_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int x86_cpu_gdb_write_register(CPUState *cpu= , uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 void x86_cpu_exec_enter(CPUState *cpu);
> >>=C2=A0 > diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h=
> >>=C2=A0 > index 01d408eb55..b64e7fdc44 100644
> >>=C2=A0 > --- a/target/lm32/cpu.h
> >>=C2=A0 > +++ b/target/lm32/cpu.h
> >>=C2=A0 > @@ -202,7 +202,7 @@ void lm32_cpu_do_interrupt(CPU= State *cpu);
> >>=C2=A0 >=C2=A0 bool lm32_cpu_exec_interrupt(CPUState *cs, i= nt int_req);
> >>=C2=A0 >=C2=A0 void lm32_cpu_dump_state(CPUState *cpu, FILE= *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr lm32_cpu_get_phys_page_debug(CPUState= *cpu, vaddr addr);
> >>=C2=A0 > -int lm32_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int lm32_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int lm32_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 typedef enum {
> >>=C2=A0 > diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h=
> >>=C2=A0 > index 521ac67cdd..705d26746d 100644
> >>=C2=A0 > --- a/target/m68k/cpu.h
> >>=C2=A0 > +++ b/target/m68k/cpu.h
> >>=C2=A0 > @@ -168,7 +168,7 @@ void m68k_cpu_do_interrupt(CPU= State *cpu);
> >>=C2=A0 >=C2=A0 bool m68k_cpu_exec_interrupt(CPUState *cpu, = int int_req);
> >>=C2=A0 >=C2=A0 void m68k_cpu_dump_state(CPUState *cpu, FILE= *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr m68k_cpu_get_phys_page_debug(CPUState= *cpu, vaddr addr);
> >>=C2=A0 > -int m68k_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int m68k_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int m68k_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 void m68k_tcg_init(void);
> >>=C2=A0 > diff --git a/target/microblaze/cpu.h b/target/micr= oblaze/cpu.h
> >>=C2=A0 > index 1a700a880c..77d6c859ae 100644
> >>=C2=A0 > --- a/target/microblaze/cpu.h
> >>=C2=A0 > +++ b/target/microblaze/cpu.h
> >>=C2=A0 > @@ -313,7 +313,7 @@ void mb_cpu_do_interrupt(CPUSt= ate *cs);
> >>=C2=A0 >=C2=A0 bool mb_cpu_exec_interrupt(CPUState *cs, int= int_req);
> >>=C2=A0 >=C2=A0 void mb_cpu_dump_state(CPUState *cpu, FILE *= f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr mb_cpu_get_phys_page_debug(CPUState *= cpu, vaddr addr);
> >>=C2=A0 > -int mb_cpu_gdb_read_register(CPUState *cpu, GByte= Array *buf, int reg);
> >>=C2=A0 > +int mb_cpu_gdb_read_register(CPUState *cpu, GByte= Array *array, int reg);
> >>=C2=A0 >=C2=A0 int mb_cpu_gdb_write_register(CPUState *cpu,= uint8_t *buf, int reg);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 void mb_tcg_init(void);
> >>=C2=A0 > diff --git a/target/mips/internal.h b/target/mips/= internal.h
> >>=C2=A0 > index 1bf274b3ef..27a9e811f7 100644
> >>=C2=A0 > --- a/target/mips/internal.h
> >>=C2=A0 > +++ b/target/mips/internal.h
> >>=C2=A0 > @@ -82,7 +82,7 @@ void mips_cpu_do_interrupt(CPUSt= ate *cpu);
> >>=C2=A0 >=C2=A0 bool mips_cpu_exec_interrupt(CPUState *cpu, = int int_req);
> >>=C2=A0 >=C2=A0 void mips_cpu_dump_state(CPUState *cpu, FILE= *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr mips_cpu_get_phys_page_debug(CPUState= *cpu, vaddr addr);
> >>=C2=A0 > -int mips_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int mips_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int mips_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void mips_cpu_do_unaligned_access(CPUState *= cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 MMUAccessType access_type,
> >>=C2=A0 > diff --git a/target/openrisc/cpu.h b/target/openri= sc/cpu.h
> >>=C2=A0 > index f37a52e153..1d2d5214c2 100644
> >>=C2=A0 > --- a/target/openrisc/cpu.h
> >>=C2=A0 > +++ b/target/openrisc/cpu.h
> >>=C2=A0 > @@ -320,7 +320,7 @@ void openrisc_cpu_do_interrupt= (CPUState *cpu);
> >>=C2=A0 >=C2=A0 bool openrisc_cpu_exec_interrupt(CPUState *c= pu, int int_req);
> >>=C2=A0 >=C2=A0 void openrisc_cpu_dump_state(CPUState *cpu, = FILE *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr openrisc_cpu_get_phys_page_debug(CPUS= tate *cpu, vaddr addr);
> >>=C2=A0 > -int openrisc_cpu_gdb_read_register(CPUState *cpu,= GByteArray
> >> *buf, int reg);
> >>=C2=A0 > +int openrisc_cpu_gdb_read_register(CPUState *cpu,= GByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int openrisc_cpu_gdb_write_register(CPUState= *cpu, uint8_t *buf,
> >> int reg);
> >>=C2=A0 >=C2=A0 void openrisc_translate_init(void);
> >>=C2=A0 >=C2=A0 bool openrisc_cpu_tlb_fill(CPUState *cs, vad= dr address, int size,
> >>=C2=A0 > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > >>=C2=A0 > index 88d9449555..049400f8d7 100644
> >>=C2=A0 > --- a/target/ppc/cpu.h
> >>=C2=A0 > +++ b/target/ppc/cpu.h
> >>=C2=A0 > @@ -1207,8 +1207,8 @@ bool ppc_cpu_exec_interrupt(= CPUState *cpu,
> >> int int_req);
> >>=C2=A0 >=C2=A0 void ppc_cpu_dump_state(CPUState *cpu, FILE = *f, int flags);
> >>=C2=A0 >=C2=A0 void ppc_cpu_dump_statistics(CPUState *cpu, = int flags);
> >>=C2=A0 >=C2=A0 hwaddr ppc_cpu_get_phys_page_debug(CPUState = *cpu, vaddr addr);
> >>=C2=A0 > -int ppc_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *buf, int reg);
> >>=C2=A0 > -int ppc_cpu_gdb_read_register_apple(CPUState *cpu= , GByteArray
> >> *buf, int reg);
> >>=C2=A0 > +int ppc_cpu_gdb_read_register(CPUState *cpu, GByt= eArray *array,
> >> int reg);
> >>=C2=A0 > +int ppc_cpu_gdb_read_register_apple(CPUState *cpu= , GByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int ppc_cpu_gdb_write_register(CPUState *cpu= , uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 int ppc_cpu_gdb_write_register_apple(CPUStat= e *cpu, uint8_t
> >> *buf, int reg);
> >>=C2=A0 >=C2=A0 #ifndef CONFIG_USER_ONLY
> >>=C2=A0 > diff --git a/target/riscv/cpu.h b/target/riscv/cpu= .h
> >>=C2=A0 > index 7d21addbab..806cb3b044 100644
> >>=C2=A0 > --- a/target/riscv/cpu.h
> >>=C2=A0 > +++ b/target/riscv/cpu.h
> >>=C2=A0 > @@ -293,7 +293,7 @@ extern const char * const risc= v_excp_names[];
> >>=C2=A0 >=C2=A0 extern const char * const riscv_intr_names[]= ;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 void riscv_cpu_do_interrupt(CPUState *cpu);<= br> > >>=C2=A0 > -int riscv_cpu_gdb_read_register(CPUState *cpu, GB= yteArray *buf,
> >> int reg);
> >>=C2=A0 > +int riscv_cpu_gdb_read_register(CPUState *cpu, GB= yteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int riscv_cpu_gdb_write_register(CPUState *c= pu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 bool riscv_cpu_exec_interrupt(CPUState *cs, = int interrupt_request);
> >>=C2=A0 >=C2=A0 bool riscv_cpu_fp_enabled(CPURISCVState *env= );
> >>=C2=A0 > diff --git a/target/rx/cpu.h b/target/rx/cpu.h
> >>=C2=A0 > index d1fb1ef3ca..994ab0c6fd 100644
> >>=C2=A0 > --- a/target/rx/cpu.h
> >>=C2=A0 > +++ b/target/rx/cpu.h
> >>=C2=A0 > @@ -128,7 +128,7 @@ const char *rx_crname(uint8_t = cr);
> >>=C2=A0 >=C2=A0 void rx_cpu_do_interrupt(CPUState *cpu);
> >>=C2=A0 >=C2=A0 bool rx_cpu_exec_interrupt(CPUState *cpu, in= t int_req);
> >>=C2=A0 >=C2=A0 void rx_cpu_dump_state(CPUState *cpu, FILE *= f, int flags);
> >>=C2=A0 > -int rx_cpu_gdb_read_register(CPUState *cpu, GByte= Array *buf, int reg);
> >>=C2=A0 > +int rx_cpu_gdb_read_register(CPUState *cpu, GByte= Array *array, int reg);
> >>=C2=A0 >=C2=A0 int rx_cpu_gdb_write_register(CPUState *cpu,= uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 hwaddr rx_cpu_get_phys_page_debug(CPUState *= cpu, vaddr addr);
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/target/s390x/internal.h b/target/s390= x/internal.h
> >>=C2=A0 > index 8c95c734db..04fcb7da74 100644
> >>=C2=A0 > --- a/target/s390x/internal.h
> >>=C2=A0 > +++ b/target/s390x/internal.h
> >>=C2=A0 > @@ -292,7 +292,7 @@ uint16_t float128_dcmask(CPUS3= 90XState *env,
> >> float128 f1);
> >>=C2=A0 >
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 /* gdbstub.c */
> >>=C2=A0 > -int s390_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *buf, int reg);
> >>=C2=A0 > +int s390_cpu_gdb_read_register(CPUState *cpu, GBy= teArray *array,
> >> int reg);
> >>=C2=A0 >=C2=A0 int s390_cpu_gdb_write_register(CPUState *cp= u, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void s390_cpu_gdb_init(CPUState *cs);
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h > >>=C2=A0 > index dbe58c7888..6901c88d7e 100644
> >>=C2=A0 > --- a/target/sh4/cpu.h
> >>=C2=A0 > +++ b/target/sh4/cpu.h
> >>=C2=A0 > @@ -208,7 +208,7 @@ void superh_cpu_do_interrupt(C= PUState *cpu);
> >>=C2=A0 >=C2=A0 bool superh_cpu_exec_interrupt(CPUState *cpu= , int int_req);
> >>=C2=A0 >=C2=A0 void superh_cpu_dump_state(CPUState *cpu, FI= LE *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr superh_cpu_get_phys_page_debug(CPUSta= te *cpu, vaddr addr);
> >>=C2=A0 > -int superh_cpu_gdb_read_register(CPUState *cpu, G= ByteArray *buf,
> >> int reg);
> >>=C2=A0 > +int superh_cpu_gdb_read_register(CPUState *cpu, G= ByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int superh_cpu_gdb_write_register(CPUState *= cpu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void superh_cpu_do_unaligned_access(CPUState= *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 MMUAccessType access_type,
> >>=C2=A0 > diff --git a/target/sparc/cpu.h b/target/sparc/cpu= .h
> >>=C2=A0 > index b9369398f2..bb9126b546 100644
> >>=C2=A0 > --- a/target/sparc/cpu.h
> >>=C2=A0 > +++ b/target/sparc/cpu.h
> >>=C2=A0 > @@ -571,7 +571,7 @@ extern const VMStateDescriptio= n vmstate_sparc_cpu;
> >>=C2=A0 >=C2=A0 void sparc_cpu_do_interrupt(CPUState *cpu);<= br> > >>=C2=A0 >=C2=A0 void sparc_cpu_dump_state(CPUState *cpu, FIL= E *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr sparc_cpu_get_phys_page_debug(CPUStat= e *cpu, vaddr addr);
> >>=C2=A0 > -int sparc_cpu_gdb_read_register(CPUState *cpu, GB= yteArray *buf,
> >> int reg);
> >>=C2=A0 > +int sparc_cpu_gdb_read_register(CPUState *cpu, GB= yteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int sparc_cpu_gdb_write_register(CPUState *c= pu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void QEMU_NORETURN sparc_cpu_do_unaligned_ac= cess(CPUState *cpu,
> >> vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MMUAccessType > >> access_type,
> >>=C2=A0 > diff --git a/target/xtensa/cpu.h b/target/xtensa/c= pu.h
> >>=C2=A0 > index 7a46dccbe1..8a851e0b00 100644
> >>=C2=A0 > --- a/target/xtensa/cpu.h
> >>=C2=A0 > +++ b/target/xtensa/cpu.h
> >>=C2=A0 > @@ -572,7 +572,7 @@ void xtensa_cpu_dump_state(CPU= State *cpu,
> >> FILE *f, int flags);
> >>=C2=A0 >=C2=A0 hwaddr xtensa_cpu_get_phys_page_debug(CPUSta= te *cpu, vaddr addr);
> >>=C2=A0 >=C2=A0 void xtensa_count_regs(const XtensaConfig *c= onfig,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned *n_regs, unsigned *n_core= _regs);
> >>=C2=A0 > -int xtensa_cpu_gdb_read_register(CPUState *cpu, G= ByteArray *buf,
> >> int reg);
> >>=C2=A0 > +int xtensa_cpu_gdb_read_register(CPUState *cpu, G= ByteArray
> >> *array, int reg);
> >>=C2=A0 >=C2=A0 int xtensa_cpu_gdb_write_register(CPUState *= cpu, uint8_t *buf, int reg);
> >>=C2=A0 >=C2=A0 void xtensa_cpu_do_unaligned_access(CPUState= *cpu, vaddr addr,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 MMUAccessType access_type,
> >>=C2=A0 > diff --git a/gdbstub.c b/gdbstub.c
> >>=C2=A0 > index 171e150950..bc24b613b2 100644
> >>=C2=A0 > --- a/gdbstub.c
> >>=C2=A0 > +++ b/gdbstub.c
> >>=C2=A0 > @@ -906,19 +906,19 @@ static const char *get_featu= re_xml(const
> >> char *p, const char **newp,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return name ? xml_builtin[i][1= ] : NULL;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static int gdb_read_register(CPUState *cpu, GByte= Array *buf, int reg)
> >>=C2=A0 > +static int gdb_read_register(CPUState *cpu, GByte= Array *array, int reg)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUClass *cc =3D CPU_GET_CLASS= (cpu);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUArchState *env =3D cpu->= env_ptr;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 GDBRegisterState *r;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (reg < cc->gdb_num_co= re_regs) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return cc->gdb_rea= d_register(cpu, buf, reg);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return cc->gdb_rea= d_register(cpu, array, reg);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 for (r =3D cpu->gdb_regs; r= ; r =3D r->next) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (r->base_r= eg <=3D reg && reg < r->base_reg + r->num_regs) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = r->get_reg(env, buf, reg - r->base_reg);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = r->get_reg(env, array, reg - r->base_reg);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/hw/core/cpu.c b/hw/core/cpu.c
> >>=C2=A0 > index 786a1bec8a..0f2bd00176 100644
> >>=C2=A0 > --- a/hw/core/cpu.c
> >>=C2=A0 > +++ b/hw/core/cpu.c
> >>=C2=A0 > @@ -177,7 +177,8 @@ static int
> >> cpu_common_write_elf64_note(WriteCoreDumpFunction f,
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >
> >>=C2=A0 > -static int cpu_common_gdb_read_register(CPUState = *cpu,
> >> GByteArray *buf, int reg)
> >>=C2=A0 > +static int cpu_common_gdb_read_register(CPUState = *cpu,
> >> GByteArray *array,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 int reg)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > diff --git a/target/alpha/gdbstub.c b/target/alpha= /gdbstub.c
> >>=C2=A0 > index 0cd76ddaa9..415f422b03 100644
> >>=C2=A0 > --- a/target/alpha/gdbstub.c
> >>=C2=A0 > +++ b/target/alpha/gdbstub.c
> >>=C2=A0 > @@ -21,7 +21,7 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int alpha_cpu_gdb_read_register(CPUState *cs, GBy= teArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int alpha_cpu_gdb_read_register(CPUState *cs, GBy= teArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 AlphaCPU *cpu =3D ALPHA_CPU(cs= );
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUAlphaState *env =3D &cp= u->env;
> >>=C2=A0 > @@ -54,7 +54,7 @@ int alpha_cpu_gdb_read_register(= CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > -=C2=A0 =C2=A0 return gdb_get_regl(mem_buf, val);<= br> > >>=C2=A0 > +=C2=A0 =C2=A0 return gdb_get_regl(array, val); > >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 int alpha_cpu_gdb_write_register(CPUState *c= s, uint8_t *mem_buf, int n)
> >>=C2=A0 > diff --git a/target/arm/gdbstub.c b/target/arm/gdb= stub.c
> >>=C2=A0 > index 063551df23..66a8af8a19 100644
> >>=C2=A0 > --- a/target/arm/gdbstub.c
> >>=C2=A0 > +++ b/target/arm/gdbstub.c
> >>=C2=A0 > @@ -33,21 +33,21 @@ typedef struct RegisterSysregX= mlParam {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0We hack round this by giving th= e FPA regs zero size when talking to a
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0newer gdb.=C2=A0 */
> >>=C2=A0 >
> >>=C2=A0 > -int arm_cpu_gdb_read_register(CPUState *cs, GByte= Array *mem_buf, int n)
> >>=C2=A0 > +int arm_cpu_gdb_read_register(CPUState *cs, GByte= Array *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 ARMCPU *cpu =3D ARM_CPU(cs); > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUARMState *env =3D &cpu-= >env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 16) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Core integer = register.=C2=A0 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 24) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* FPA registers= .=C2=A0 */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (gdb_has_xml)= {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 re= turn 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_zeroes= (mem_buf, 12);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_zeroes= (array, 12);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 24:
> >>=C2=A0 > @@ -55,10 +55,10 @@ int arm_cpu_gdb_read_register(= CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (gdb_has_xml)= {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 re= turn 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 25:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* CPSR */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, cpsr_read(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, cpsr_read(env));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 /* Unknown register.=C2=A0 */<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/arm/gdbstub64.c b/target/arm/g= dbstub64.c
> >>=C2=A0 > index 35d0b80c2d..16860a0522 100644
> >>=C2=A0 > --- a/target/arm/gdbstub64.c
> >>=C2=A0 > +++ b/target/arm/gdbstub64.c
> >>=C2=A0 > @@ -20,22 +20,22 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int aarch64_cpu_gdb_read_register(CPUState *cs, G= ByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int aarch64_cpu_gdb_read_register(CPUState *cs, G= ByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 ARMCPU *cpu =3D ARM_CPU(cs); > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUARMState *env =3D &cpu-= >env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 31) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Core integer = register.=C2=A0 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf, env->xregs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array, env->xregs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 31:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf, env->xregs[31]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array, env->xregs[31]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 32:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 33:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, pstate_read(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, pstate_read(env));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 /* Unknown register.=C2=A0 */<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/cris/gdbstub.c b/target/cris/g= dbstub.c
> >>=C2=A0 > index b01b2aa081..dd7f754935 100644
> >>=C2=A0 > --- a/target/cris/gdbstub.c
> >>=C2=A0 > +++ b/target/cris/gdbstub.c
> >>=C2=A0 > @@ -21,31 +21,31 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int crisv10_cpu_gdb_read_register(CPUState *cs, G= ByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int crisv10_cpu_gdb_read_register(CPUState *cs, G= ByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CRISCPU *cpu =3D CRIS_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUCRISState *env =3D &cpu= ->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 15) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n =3D=3D 15) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 16:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg8(mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg8(array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 17:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg8(mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg8(array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 20:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 21:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg16(mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg16(array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= (n >=3D 23) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg32(mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg32(array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 br= eak;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > @@ -53,7 +53,7 @@ int crisv10_cpu_gdb_read_registe= r(CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -int cris_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int cris_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CRISCPU *cpu =3D CRIS_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUCRISState *env =3D &cpu= ->env;
> >>=C2=A0 > @@ -61,28 +61,28 @@ int cris_cpu_gdb_read_register= (CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 srs =3D env->pregs[PR_SRS];=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 16) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n >=3D 21 && n = < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->pregs[n - 16]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->pregs[n - 16]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n >=3D 33 && n = < 49) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->sregs[srs][n - 33]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->sregs[srs][n - 33]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 16:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(m= em_buf, env->pregs[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(a= rray, env->pregs[0]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 17:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(m= em_buf, env->pregs[1]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(a= rray, env->pregs[1]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 18:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->pregs[2]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->pregs[2]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 19:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(m= em_buf, srs);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg8(a= rray, srs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 20:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg16(= mem_buf, env->pregs[4]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg16(= array, env->pregs[4]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 32:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/hppa/gdbstub.c b/target/hppa/g= dbstub.c
> >>=C2=A0 > index a6428a2893..d0618f5175 100644
> >>=C2=A0 > --- a/target/hppa/gdbstub.c
> >>=C2=A0 > +++ b/target/hppa/gdbstub.c
> >>=C2=A0 > @@ -21,7 +21,7 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int hppa_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int hppa_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 HPPACPU *cpu =3D HPPA_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUHPPAState *env =3D &cpu= ->env;
> >>=C2=A0 > @@ -140,9 +140,9 @@ int hppa_cpu_gdb_read_register= (CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (TARGET_REGISTER_BITS =3D= =3D 64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf, val);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array, val);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, val);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, val);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > diff --git a/target/i386/gdbstub.c b/target/i386/g= dbstub.c
> >>=C2=A0 > index f3d23b614e..40f1b03a36 100644
> >>=C2=A0 > --- a/target/i386/gdbstub.c
> >>=C2=A0 > +++ b/target/i386/gdbstub.c
> >>=C2=A0 > @@ -79,7 +79,7 @@ static const int gpr_map32[8] = =3D { 0, 1, 2, 3,
> >> 4, 5, 6, 7 };
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >
> >>=C2=A0 >
> >>=C2=A0 > -int x86_cpu_gdb_read_register(CPUState *cs, GByte= Array *mem_buf, int n)
> >>=C2=A0 > +int x86_cpu_gdb_read_register(CPUState *cs, GByte= Array *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 X86CPU *cpu =3D X86_CPU(cs); > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUX86State *env =3D &cpu-= >env;
> >>=C2=A0 > @@ -93,25 +93,25 @@ int x86_cpu_gdb_read_register(= CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < CPU_NB_REGS) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (TARGET_LONG_= BITS =3D=3D 64) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= (env->hflags & HF_CS64_MASK) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->regs[gpr_map[n]]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->regs[gpr_map[n]]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } = else if (n < CPU_NB_REGS32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0env->regs[gpr_map[n]] &
> >> 0xffffffffUL);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } = else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->regs[gpr_map32[n]]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n >=3D IDX_FP_RE= GS && n < IDX_FP_REGS + 8) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 floatx80 *fp =3D= (floatx80 *) &env->fpregs[n - IDX_FP_REGS];
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 int len =3D gdb_get_r= eg64(mem_buf, cpu_to_le64(fp->low));
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg1= 6(mem_buf + len, cpu_to_le16(fp->high));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 int len =3D gdb_get_r= eg64(array, cpu_to_le64(fp->low));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg1= 6(array + len, cpu_to_le16(fp->high));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return len;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n >=3D IDX_XMM_R= EGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 n -=3D IDX_XMM_R= EGS;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (n < CPU_N= B_REGS32 || TARGET_LONG_BITS =3D=3D 64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg128(mem_buf,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg128(array,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 env->xmm_regs[n].ZMM_Q(0),
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 env->xmm_regs[n].ZMM_Q(1));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > @@ -120,95 +120,95 @@ int x86_cpu_gdb_read_registe= r(CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_IP_REG:=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= (TARGET_LONG_BITS =3D=3D 64) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 if (env->hflags & HF_CS64_MASK) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(mem_buf, env->eip);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(array, env->eip);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 } else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(mem_buf, env->eip &
> >> 0xffffffffUL);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(array, env->eip &
> >> 0xffffffffUL);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } = else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg32(mem_buf, env->eip);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg32(array, env->eip);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FLAGS_R= EG:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->eflags);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->eflags);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_CS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_CS].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 1:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_SS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_SS].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 2:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_DS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_DS].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 3:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_ES].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_ES].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 4:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_FS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_FS].selector);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 5:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_GS].selector);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_GS].selector);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 6:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->segs[R_FS].base);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->segs[R_FS].base);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_FS].base);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_FS].base);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 7:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->segs[R_GS].base);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->segs[R_GS].base);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->segs[R_GS].base);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->segs[R_GS].base);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_SEG_REG= S + 8:
> >>=C2=A0 >=C2=A0 #ifdef TARGET_X86_64
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->kernelgsbase);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->kernelgsbase);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->kernelgsbase);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->kernelgsbase);
> >>=C2=A0 >=C2=A0 #else
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0);
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 8:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->fpuc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->fpuc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 9:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, (env->fpus & ~0x3800) |
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, (env->fpus & ~0x3800) |
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 (env->fpstt & 0x7) << 11);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 10:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* ftag */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* ftag */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 11:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* fiseg */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* fiseg */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 12:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* fioff */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* fioff */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 13:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* foseg */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* foseg */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 14:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* fooff */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* fooff */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_FP_REGS= + 15:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0); /* fop */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0); /* fop */
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_MXCSR_R= EG:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->mxcsr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->mxcsr);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR0= _REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->cr[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->cr[0]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->cr[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->cr[0]);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR2= _REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->cr[2]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->cr[2]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->cr[2]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->cr[2]);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR3= _REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->cr[3]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->cr[3]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->cr[3]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->cr[3]);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR4= _REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->cr[4]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->cr[4]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->cr[4]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->cr[4]);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_CR8= _REG:
> >>=C2=A0 >=C2=A0 #ifdef CONFIG_SOFTMMU
> >>=C2=A0 > @@ -217,15 +217,15 @@ int x86_cpu_gdb_read_registe= r(CPUState *cs,
> >> GByteArray *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 tp= r =3D 0;
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, tpr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, tpr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, tpr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, tpr);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case IDX_CTL_EFE= R_REG:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= ((env->hflags & HF_CS64_MASK) || GDB_FORCE_64) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(mem_buf, env->efer);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_reg64(array, env->efer);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->efer);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->efer);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/lm32/gdbstub.c b/target/lm32/g= dbstub.c
> >>=C2=A0 > index b6fe12e1d6..6198719944 100644
> >>=C2=A0 > --- a/target/lm32/gdbstub.c
> >>=C2=A0 > +++ b/target/lm32/gdbstub.c
> >>=C2=A0 > @@ -22,30 +22,30 @@
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >=C2=A0 #include "hw/lm32/lm32_pic.h"
> >>=C2=A0 >
> >>=C2=A0 > -int lm32_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int lm32_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 LM32CPU *cpu =3D LM32_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPULM32State *env =3D &cpu= ->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 32:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* FIXME: put in= right exception ID */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 33:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 34:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->eba);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->eba);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 35:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->deba);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->deba);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 36:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->ie);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->ie);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 37:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf,
> >> lm32_pic_get_im(env->pic_state));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array,
> >> lm32_pic_get_im(env->pic_state));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 38:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf,
> >> lm32_pic_get_ip(env->pic_state));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array,
> >> lm32_pic_get_ip(env->pic_state));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/m68k/gdbstub.c b/target/m68k/g= dbstub.c
> >>=C2=A0 > index eb2d030e14..9405dc4b4e 100644
> >>=C2=A0 > --- a/target/m68k/gdbstub.c
> >>=C2=A0 > +++ b/target/m68k/gdbstub.c
> >>=C2=A0 > @@ -21,24 +21,24 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int m68k_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int m68k_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 M68kCPU *cpu =3D M68K_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUM68KState *env =3D &cpu= ->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 8) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* D0-D7 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->dregs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->dregs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n < 16) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* A0-A7 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->aregs[n - 8]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->aregs[n - 8]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 16:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /*= SR is made of SR+CCR, CCR is many 1bit flags so
> >> uses helper */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->sr |
> >> cpu_m68k_get_ccr(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->sr |
> >> cpu_m68k_get_ccr(env));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 17:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 /*
> >>=C2=A0 > diff --git a/target/m68k/helper.c b/target/m68k/he= lper.c
> >>=C2=A0 > index 014657c637..968371476a 100644
> >>=C2=A0 > --- a/target/m68k/helper.c
> >>=C2=A0 > +++ b/target/m68k/helper.c
> >>=C2=A0 > @@ -68,19 +68,19 @@ void m68k_cpu_list(void)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 g_slist_free(list);
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static int cf_fpu_gdb_get_reg(CPUM68KState *env, = GByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +static int cf_fpu_gdb_get_reg(CPUM68KState *env, = GByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 8) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 float_status s;<= br> > >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= mem_buf,
> >> floatx80_to_float64(env->fregs[n].d, &s));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg64(= array,
> >> floatx80_to_float64(env->fregs[n].d, &s));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 8: /* fpcontrol */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->fpcr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->fpcr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 9: /* fpstatus */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->fpsr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->fpsr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 10: /* fpiar, not impleme= nted */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > @@ -105,21 +105,21 @@ static int cf_fpu_gdb_set_re= g(CPUM68KState
> >> *env, uint8_t *mem_buf, int n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static int m68k_fpu_gdb_get_reg(CPUM68KState *env= , GByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +static int m68k_fpu_gdb_get_reg(CPUM68KState *env= , GByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 8) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 int len =3D gdb_get_r= eg16(mem_buf, env->fregs[n].l.upper);
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg1= 6(mem_buf + len, 0);
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg6= 4(mem_buf + len, env->fregs[n].l.lower);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 int len =3D gdb_get_r= eg16(array, env->fregs[n].l.upper);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg1= 6(array + len, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 len +=3D gdb_get_reg6= 4(array + len, env->fregs[n].l.lower);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return len;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 8: /* fpcontrol */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->fpcr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->fpcr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 9: /* fpstatus */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->fpsr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->fpsr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 10: /* fpiar, not impleme= nted */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > diff --git a/target/microblaze/gdbstub.c b/target/= microblaze/gdbstub.c
> >>=C2=A0 > index f41ebf1f33..40d41e12ce 100644
> >>=C2=A0 > --- a/target/microblaze/gdbstub.c
> >>=C2=A0 > +++ b/target/microblaze/gdbstub.c
> >>=C2=A0 > @@ -21,15 +21,15 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int mb_cpu_gdb_read_register(CPUState *cs, GByteA= rray *mem_buf, int n)
> >>=C2=A0 > +int mb_cpu_gdb_read_register(CPUState *cs, GByteA= rray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 MicroBlazeCPU *cpu =3D MICROBL= AZE_CPU(cs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUMBState *env =3D &cpu-&= gt;env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->sregs[n - 32]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->sregs[n - 32]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > diff --git a/target/mips/gdbstub.c b/target/mips/g= dbstub.c
> >>=C2=A0 > index 98f56e660d..0fc957d5cd 100644
> >>=C2=A0 > --- a/target/mips/gdbstub.c
> >>=C2=A0 > +++ b/target/mips/gdbstub.c
> >>=C2=A0 > @@ -22,54 +22,54 @@
> >>=C2=A0 >=C2=A0 #include "internal.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int mips_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int mips_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 MIPSCPU *cpu =3D MIPS_CPU(cs);=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUMIPSState *env =3D &cpu= ->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->active_tc.gpr[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->active_tc.gpr[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (env->CP0_Config1 & = (1 << CP0C1_FP) && n >=3D 38 && n < 72) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 70:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_regl(mem_buf,
> >> (int32_t)env->active_fpu.fcr31);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_regl(array, (int32_t)env->active_fpu.fcr31);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 71:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_regl(array, (int32_t)env->active_fpu.fcr0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if= (env->CP0_Status & (1 << CP0St_FR)) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(mem_buf,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(array,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 env->active_fpu.fpr[n - 38].d);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } = else {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(mem_buf,
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 return gdb_get_regl(array,
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]= );
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }<= br> > >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 32:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (int32_t)env->CP0_Status);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (int32_t)env->CP0_Status);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 33:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->active_tc.LO[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->active_tc.LO[0]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 34:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->active_tc.HI[0]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->active_tc.HI[0]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 35:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->CP0_BadVAddr);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->CP0_BadVAddr);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 36:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (int32_t)env->CP0_Cause);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (int32_t)env->CP0_Cause);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 37:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->active_tc.PC |
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->active_tc.PC |
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0!!(env->hflags & MIPS_HFLAG_M16));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 72:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, 0); /* fp */
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, 0); /* fp */
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 89:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (int32_t)env->CP0_PRid);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (int32_t)env->CP0_PRid);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (n > 89) {=
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 re= turn 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* 16 embedded r= egs.=C2=A0 */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, 0);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, 0);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 > diff --git a/target/nios2/cpu.c b/target/nios2/cpu= .c
> >>=C2=A0 > index 8f7011fcb9..3cf696402f 100644
> >>=C2=A0 > --- a/target/nios2/cpu.c
> >>=C2=A0 > +++ b/target/nios2/cpu.c
> >>=C2=A0 > @@ -124,7 +124,7 @@ static void nios2_cpu_disas_se= t_info(CPUState
> >> *cpu, disassemble_info *info)
> >>=C2=A0 >=C2=A0 #endif
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 > -static int nios2_cpu_gdb_read_register(CPUState *= cs, GByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +static int nios2_cpu_gdb_read_register(CPUState *= cs, GByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 Nios2CPU *cpu =3D NIOS2_CPU(cs= );
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUClass *cc =3D CPU_GET_CLASS= (cs);
> >>=C2=A0 > @@ -135,11 +135,11 @@ static int
> >> nios2_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf= , int
> >> n)
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 /* GP regs */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n =3D=3D 32) {=C2= =A0 =C2=A0 /* PC */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[R_PC]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[R_PC]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n < 49) {=C2=A0 = =C2=A0 =C2=A0/* Status regs */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, env->regs[n - 1]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, env->regs[n - 1]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 /* Invalid regs */
> >>=C2=A0 > diff --git a/target/openrisc/gdbstub.c b/target/op= enrisc/gdbstub.c
> >>=C2=A0 > index 095bf76c12..c34d3696ec 100644
> >>=C2=A0 > --- a/target/openrisc/gdbstub.c
> >>=C2=A0 > +++ b/target/openrisc/gdbstub.c
> >>=C2=A0 > @@ -21,23 +21,23 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int openrisc_cpu_gdb_read_register(CPUState *cs, = GByteArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int openrisc_cpu_gdb_read_register(CPUState *cs, = GByteArray
> >> *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 OpenRISCCPU *cpu =3D OPENRISC_= CPU(cs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPUOpenRISCState *env =3D &= ;cpu->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= mem_buf, cpu_get_gpr(env, n));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_reg32(= array, cpu_get_gpr(env, n));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 32:=C2=A0 = =C2=A0 /* PPC */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->ppc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->ppc);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 33:=C2=A0 = =C2=A0 /* NPC (equals PC) */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, env->pc);
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 case 34:=C2=A0 = =C2=A0 /* SR */
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(mem_buf, cpu_get_sr(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return = gdb_get_reg32(array, cpu_get_sr(env));
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 default:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 br= eak;
> >>=C2=A0 > diff --git a/target/riscv/gdbstub.c b/target/riscv= /gdbstub.c
> >>=C2=A0 > index eba12a86f2..8e1d64c1cf 100644
> >>=C2=A0 > --- a/target/riscv/gdbstub.c
> >>=C2=A0 > +++ b/target/riscv/gdbstub.c
> >>=C2=A0 > @@ -270,15 +270,15 @@ static int csr_register_map[= ] =3D {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CSR_MHCOUNTEREN,
> >>=C2=A0 >=C2=A0 };
> >>=C2=A0 >
> >>=C2=A0 > -int riscv_cpu_gdb_read_register(CPUState *cs, GBy= teArray
> >> *mem_buf, int n)
> >>=C2=A0 > +int riscv_cpu_gdb_read_register(CPUState *cs, GBy= teArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 RISCVCPU *cpu =3D RISCV_CPU(cs= );
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPURISCVState *env =3D &cp= u->env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 if (n < 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->gpr[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->gpr[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 } else if (n =3D=3D 32) {
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 }
> >>=C2=A0 > diff --git a/target/rx/gdbstub.c b/target/rx/gdbst= ub.c
> >>=C2=A0 > index 9391e8151e..91dee774f6 100644
> >>=C2=A0 > --- a/target/rx/gdbstub.c
> >>=C2=A0 > +++ b/target/rx/gdbstub.c
> >>=C2=A0 > @@ -20,32 +20,32 @@
> >>=C2=A0 >=C2=A0 #include "cpu.h"
> >>=C2=A0 >=C2=A0 #include "exec/gdbstub.h"
> >>=C2=A0 >
> >>=C2=A0 > -int rx_cpu_gdb_read_register(CPUState *cs, GByteA= rray *mem_buf, int n)
> >>=C2=A0 > +int rx_cpu_gdb_read_register(CPUState *cs, GByteA= rray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 RXCPU *cpu =3D RXCPU(cs);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 CPURXState *env =3D &cpu-&= gt;env;
> >>=C2=A0 >
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 switch (n) {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 0 ... 15:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->regs[n]);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->regs[n]);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 16:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (env->psw_u) ? env->regs[0]
> >> : env->usp);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (env->psw_u) ? env->regs[0] :
> >> env->usp);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 17:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, (!env->psw_u) ?
> >> env->regs[0] : env->isp);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, (!env->psw_u) ? env->regs[0]
> >> : env->isp);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 18:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, rx_cpu_pack_psw(env));
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, rx_cpu_pack_psw(env));
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 19:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->pc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->pc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 20:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->intb);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->intb);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 21:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->bpsw);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->bpsw);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 22:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->bpc);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->bpc);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 23:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->fintv);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->fintv);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 24:
> >>=C2=A0 > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(m= em_buf, env->fpsw);
> >>=C2=A0 > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return gdb_get_regl(a= rray, env->fpsw);
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 case 25:
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 }
> >>=C2=A0 > diff --git a/target/s390x/gdbstub.c b/target/s390x= /gdbstub.c
> >>=C2=A0 > index d6fce5ff1e..adbe7b5d39 100644
> >>=C2=A0 > --- a/target/s390x/gdbstub.c
> >>=C2=A0 > +++ b/target/s390x/gdbstub.c
> >>=C2=A0 > @@ -27,7 +27,7 @@
> >>=C2=A0 >=C2=A0 #include "sysemu/hw_accel.h"
> >>=C2=A0 >=C2=A0 #include "sysemu/tcg.h"
> >>=C2=A0 >
> >>=C2=A0 > -int s390_cpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n)
> >>=C2=A0 > +int s390_cpu_gdb_read_register(CPUState *cs, GByt= eArray *array, int n)
> >>=C2=A0 >=C2=A0 {
> >>=C2=A0 >=C2=A0 =C2=A0 =C2=A0 S390CPU *cpu =3D S390_CPU(cs);=
> >>

--0000000000004018db05a34199ba--