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[209.85.161.41]) by smtp.gmail.com with ESMTPSA id l7-20020a056808020700b00354b0850fb6sm626699oie.33.2022.10.20.19.11.14 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Oct 2022 19:11:14 -0700 (PDT) Received: by mail-oo1-f41.google.com with SMTP id j6-20020a4ab1c6000000b004809a59818cso250563ooo.0 for ; Thu, 20 Oct 2022 19:11:14 -0700 (PDT) X-Received: by 2002:a05:6902:1352:b0:6bb:3f4b:9666 with SMTP id g18-20020a056902135200b006bb3f4b9666mr13522092ybu.101.1666318263133; Thu, 20 Oct 2022 19:11:03 -0700 (PDT) MIME-Version: 1.0 References: <20220815071332.627393-1-yuzhao@google.com> <20220815071332.627393-9-yuzhao@google.com> In-Reply-To: From: Linus Torvalds Date: Thu, 20 Oct 2022 19:10:46 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v14 08/14] mm: multi-gen LRU: support page table walks To: Peter Zijlstra , "the arch/x86 maintainers" Cc: Yu Zhao , Andrew Morton , Andi Kleen , Aneesh Kumar , Catalin Marinas , Dave Hansen , Hillf Danton , Jens Axboe , Johannes Weiner , Jonathan Corbet , Matthew Wilcox , Mel Gorman , Michael Larabel , Michal Hocko , Mike Rapoport , Tejun Heo , Vlastimil Babka , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, page-reclaim@google.com, Brian Geffon , Jan Alexander Steffens , Oleksandr Natalenko , Steven Barrett , Suleiman Souhlal , Daniel Byrne , Donald Carr , =?UTF-8?Q?Holger_Hoffst=C3=A4tte?= , Konstantin Kharlamov , Shuang Zhai , Sofia Trinh , Vaibhav Jain Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 20, 2022 at 11:55 AM Peter Zijlstra wrote: > > On Thu, Oct 20, 2022 at 10:35:28AM -0700, Linus Torvalds wrote: > > That said, I reacted to that cmpxchg loop: > > > > } while (cmpxchg64(&pmdp->pmd, old.pmd, 0ULL) != old.pmd); > > > > is this series just so old (but rebased) that it doesn't use "try_cmpxchg64()"? > > Yep -- it's *that* old :-/ You're not in fact the first to point that > out. > > I'll make time tomorrow to fix it up and respin and send out. This is as > good a time as any to get rid of carrying these patches myself. Hmm. Thinking some more about it, even if you do it as a try_cmpxchg64() loop, it ends up being duplicated twice. Maybe we should just bite the bullet, and say that we only support x86-32 with 'cmpxchg8b' (ie Pentium and later). Get rid of all the "emulate 64-bit atomics with cli/sti, knowing that nobody has SMP on those CPU's anyway", and implement a generic x86-32 xchg() setup using that try_cmpxchg64 loop. I think most (all?) distros already enable X86_PAE anyway, which makes that X86_CMPXCHG64 be part of the base requirement. Not that I'm convinced most distros even do 32-bit development anyway these days. (Of course, if we require X86_CMPXCHG64, we'll also hit some of the odd clone CPU's that actually *do* support the instruction, but do not report it in cpuid due to an odd old Windows NT bug. IOW, things like the Cyrix and Transmeta CPU's did support the instruction, but had the CX8 bit clear because otherwise NT wouldn't boot. We may or may not get those cases right, but I doubt anybody really has any of those old CPUs). We got rid of i386 support back in 2012. Maybe it's time to get rid of i486 support in 2022? That way we could finally get rid of CONFIG_MATH_EMULATION too. Linus From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9CA29C433FE for ; Fri, 21 Oct 2022 02:12:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MRT2ALNkx2GXPzNbbUKp3DdakX3n3LOmmjG3va2YfP4=; b=YYdD6xN4AaDoOM VDw3i3xuXHlsc03VzQOvfWEXtGHubnAjx55bP83tX0Rxp8FH3izN1gWePva/Hb710PNwC/JqLtvvJ eEkHGAAq1LsmAG/Atq+60pOeaONS225aBGfDEy3tf7S3tDPMvsdZtZXati3DT6XCTkaJjJa0lzUkp fO8GOk7+BxbOJA3N72UW4xSM+UEvi62J5+vYS780mP6cXVvRIQ3afM9djvn3QdgkMQDhSegZJ4qaa UDY438YCAyAVcFMbA9xFjn1C9imqHvYglPyBO5oosqSF6NDQmiL24lRbKT1Jwb1hAH9yXWmihS810 mQ6X8+h20alLM5gaIWxA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1olhVG-004MVY-Pb; Fri, 21 Oct 2022 02:11:18 +0000 Received: from mail-oa1-x2b.google.com ([2001:4860:4864:20::2b]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1olhVD-004MUc-Qy for linux-arm-kernel@lists.infradead.org; Fri, 21 Oct 2022 02:11:17 +0000 Received: by mail-oa1-x2b.google.com with SMTP id 586e51a60fabf-12c8312131fso1881296fac.4 for ; Thu, 20 Oct 2022 19:11:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux-foundation.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=ASIrxtSBDsxk4HGQqbLDireIOxv7TbGHiig0CHntdSI=; b=d0RcTWc1MKBOhhT5dKEG1Usy/aOhsV4HKs+lZmjbd5YXaVGizlNl0Eie/W1sistU3G 5sKn7isal7vO0hl/3+xRKCOlZ1eBybkH73NcCluO/7XBbtsmJ6Fw5Wjx2PKGV4IR35QH +YloN2juFf0i7OOlQFZH+/wfTO9SBo0yFEw6E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ASIrxtSBDsxk4HGQqbLDireIOxv7TbGHiig0CHntdSI=; b=G9Vyv6bsD4WOZCWDMZR5Jzh9CTFhJueFCnegTZTYf4B2/LPkPDqmZXTOeFf4uvXr2j ZZueGCvhqqro9b/qE3pD6Ob1zwGosJ1cfzCeE04UN6RTFdkd6n1QM/3xtXTFd/FZpzPS QnaE0XmqZRidL9k/i8onRTRs4lc1o7M0cjovVEzuuVF9hq+3dBu8oyVKQubaqaCPtN+L wNHRAt6+oUD2uzMnq85hlm4KgpfuhSrEvf9RIbgtDkEUJSZFqztOxPYz41PVBmm7SFGI jbV8+/QO7TQH4z3yn80C4iyv/X/7YDc/UMoLpvkYaUJHTwTLfZU5z7RHQt5ArVnDqL8n Qiqg== X-Gm-Message-State: ACrzQf0aE0Zdma84GAvgZex/OvqfVvdc1CGMGa3ug7vSzBc5Q1BK87ot QCSRjMf4H0X8MVuOaWwQv+sMAEBuMTeelg== X-Google-Smtp-Source: AMsMyM4JufcmyYH0iSIc6/FMGx0Yf0w3Dy2HOO9Q/6Bmgiu5K+939+SWKju0B+EKVAkLYbm2watTeQ== X-Received: by 2002:a05:6870:524b:b0:132:fe86:4be9 with SMTP id o11-20020a056870524b00b00132fe864be9mr11406218oai.102.1666318274371; Thu, 20 Oct 2022 19:11:14 -0700 (PDT) Received: from mail-ot1-f46.google.com (mail-ot1-f46.google.com. [209.85.210.46]) by smtp.gmail.com with ESMTPSA id z6-20020a056808064600b00354b1edb60fsm598784oih.32.2022.10.20.19.11.13 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Oct 2022 19:11:14 -0700 (PDT) Received: by mail-ot1-f46.google.com with SMTP id br15-20020a056830390f00b0061c9d73b8bdso996726otb.6 for ; Thu, 20 Oct 2022 19:11:13 -0700 (PDT) X-Received: by 2002:a05:6902:1352:b0:6bb:3f4b:9666 with SMTP id g18-20020a056902135200b006bb3f4b9666mr13522092ybu.101.1666318263133; Thu, 20 Oct 2022 19:11:03 -0700 (PDT) MIME-Version: 1.0 References: <20220815071332.627393-1-yuzhao@google.com> <20220815071332.627393-9-yuzhao@google.com> In-Reply-To: From: Linus Torvalds Date: Thu, 20 Oct 2022 19:10:46 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v14 08/14] mm: multi-gen LRU: support page table walks To: Peter Zijlstra , "the arch/x86 maintainers" Cc: Yu Zhao , Andrew Morton , Andi Kleen , Aneesh Kumar , Catalin Marinas , Dave Hansen , Hillf Danton , Jens Axboe , Johannes Weiner , Jonathan Corbet , Matthew Wilcox , Mel Gorman , Michael Larabel , Michal Hocko , Mike Rapoport , Tejun Heo , Vlastimil Babka , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, page-reclaim@google.com, Brian Geffon , Jan Alexander Steffens , Oleksandr Natalenko , Steven Barrett , Suleiman Souhlal , Daniel Byrne , Donald Carr , =?UTF-8?Q?Holger_Hoffst=C3=A4tte?= , Konstantin Kharlamov , Shuang Zhai , Sofia Trinh , Vaibhav Jain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221020_191115_881681_B31D8691 X-CRM114-Status: GOOD ( 18.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Oct 20, 2022 at 11:55 AM Peter Zijlstra wrote: > > On Thu, Oct 20, 2022 at 10:35:28AM -0700, Linus Torvalds wrote: > > That said, I reacted to that cmpxchg loop: > > > > } while (cmpxchg64(&pmdp->pmd, old.pmd, 0ULL) != old.pmd); > > > > is this series just so old (but rebased) that it doesn't use "try_cmpxchg64()"? > > Yep -- it's *that* old :-/ You're not in fact the first to point that > out. > > I'll make time tomorrow to fix it up and respin and send out. This is as > good a time as any to get rid of carrying these patches myself. Hmm. Thinking some more about it, even if you do it as a try_cmpxchg64() loop, it ends up being duplicated twice. Maybe we should just bite the bullet, and say that we only support x86-32 with 'cmpxchg8b' (ie Pentium and later). Get rid of all the "emulate 64-bit atomics with cli/sti, knowing that nobody has SMP on those CPU's anyway", and implement a generic x86-32 xchg() setup using that try_cmpxchg64 loop. I think most (all?) distros already enable X86_PAE anyway, which makes that X86_CMPXCHG64 be part of the base requirement. Not that I'm convinced most distros even do 32-bit development anyway these days. (Of course, if we require X86_CMPXCHG64, we'll also hit some of the odd clone CPU's that actually *do* support the instruction, but do not report it in cpuid due to an odd old Windows NT bug. IOW, things like the Cyrix and Transmeta CPU's did support the instruction, but had the CX8 bit clear because otherwise NT wouldn't boot. We may or may not get those cases right, but I doubt anybody really has any of those old CPUs). We got rid of i386 support back in 2012. Maybe it's time to get rid of i486 support in 2022? That way we could finally get rid of CONFIG_MATH_EMULATION too. Linus _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel