From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E7DCC55178 for ; Tue, 27 Oct 2020 16:09:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AD75A20829 for ; Tue, 27 Oct 2020 16:09:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NumASSN5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754966AbgJ0QJN (ORCPT ); Tue, 27 Oct 2020 12:09:13 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:44329 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1806860AbgJ0QJD (ORCPT ); Tue, 27 Oct 2020 12:09:03 -0400 Received: by mail-pl1-f193.google.com with SMTP id t6so473402plq.11 for ; Tue, 27 Oct 2020 09:09:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=y8z713XlayESH339Gp0VA0pxVEZrHHHC1564eAGVGao=; b=NumASSN5jUGYa6e5z22XehydqEuDytI4MnptHFy12+L7djPz4ENXxNeSTt8AUpwpbB e0o2xgt4N2sAtEC3XKrqQ1QMWH6Xeh0zbkKofMJkByOwtn6kFUEgdeYAdPEUy5mbmxeL iQApgLUgSL3DsxMER2bJ2GVtl1wxyhPppNCCw2B95tepbbefUytZHVC/RdMMBWb6m0/S +GOF9lGzFzvAZ6Tte7HivoAELh4vRVCjhZRLHX6nlPwmlM2gHLv+UhR8c5ONoeBOXoe+ CKnDnmURtNcns/625CYiXS+Tp11k71VLmQizLT4J3uZ692I3y3dXiTHzWntBzkxt3kEq ji2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=y8z713XlayESH339Gp0VA0pxVEZrHHHC1564eAGVGao=; b=b3QFtSz8CP7k8ZCban+4uJ9Ucr3wi1OhDcFjCjwjbKqwio7JJB3TTRYQXskD1ATZjr ZuwuFM2ZadixIGmgcSZUcFNLObsZ6ssSxJK9JXXaVPIqe+1xW7O7Zhioa4dLqtOXs2ub VRJEoylYkK6o3OE8ABKY3Ylj9rBwRYh/2eVnPzapyFn6cgREHmVlb2ydhm5uRQagrFqc Aor6Py8qjTRzC+4G+N+py7QN7BX7t9bIr8tIi0Kr6aaNFoTpA6RvWbBaeSavemXvevgg Am2C41Fxslrwm4GI4+JtMK5fz6iq1STm3opDvJrEbAY5l2TXzo2u4xkRdnMBAQNLJ/oP SuRA== X-Gm-Message-State: AOAM530S4YtoWykI67e7UtdKV2g5S8qyQARGs1CpFYOsGH5wiMY9LaYi hqdqj9OFvANv+FJz/KH3VUeaHbiFXa92cok0Fz0= X-Google-Smtp-Source: ABdhPJwnRuw6kfpLU6usrKj8k9y5UpG9W4uTmoM226PnUmWKyb6+ZHmI86szqWRZzz77ikQ9UMC5mgmvMFEAAnXWNfk= X-Received: by 2002:a17:902:7442:b029:d6:4773:7cdc with SMTP id e2-20020a1709027442b02900d647737cdcmr3310063plt.21.1603814941169; Tue, 27 Oct 2020 09:09:01 -0700 (PDT) MIME-Version: 1.0 References: <20201003230340.42mtl35n4ka4d5qw@Rk> <20201004051644.f3fg2oavbobrwhf6@Rk> <20201006044941.fdjsp346kc5thyzy@Rk> <20201006083157.3pg6zvju5buxspns@Rk> <69853d2b-239c-79d5-bf6f-7dc0eec65602@redhat.com> <4f02cbdf-e1dd-b138-4975-118dd4f86089@redhat.com> <20201014042420.fkkyabmrkiekpmfw@Rk> <20201026225400.37almqey2wxyazkn@Rk> <86963e59-3661-c43c-4e08-a0f9b9e7ed07@redhat.com> In-Reply-To: <86963e59-3661-c43c-4e08-a0f9b9e7ed07@redhat.com> From: Andy Shevchenko Date: Tue, 27 Oct 2020 18:09:49 +0200 Message-ID: Subject: Re: Any other ways to debug GPIO interrupt controller (pinctrl-amd) for broken touchpads of a new laptop model? To: Hans de Goede Cc: Mika Westerberg , Coiby Xu , Linus Walleij , "open list:GPIO SUBSYSTEM" , wang jun , Nehal Shah , Shyam Sundar S K , linux-kernel-mentees@lists.linuxfoundation.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Tue, Oct 27, 2020 at 6:01 PM Hans de Goede wrote: > On 10/27/20 4:13 PM, Andy Shevchenko wrote: > > On Tue, Oct 27, 2020 at 4:31 PM Hans de Goede wrote: > >> On 10/26/20 11:54 PM, Coiby Xu wrote: > >>> Hi Hans and Linus, > >>> > >>> Will you interpret the 0x0000 value for debounce timeout in GPIO > >>> Interrupt Connection Resource Descriptor as disabling debouncing > >>> filter? > >>> > >>> GpioInt (EdgeLevel, ActiveLevel, Shared, PinConfig, DebounceTimeout, ResourceSource, > >>> ResourceSourceIndex, ResourceUsage, DescriptorName, VendorData) {PinList} > >>> > >>> I'm not sure if Windows' implementation is the de facto standard like > >>> i2c-hid. But if we are going to conform to the ACPI specs and we would > >>> regard 0x0000 debounce timeout as disabling debouncing filter, then we > >>> can fix this touchpad issue and potentially some related issues by > >>> implementing the feature of supporting configuring debounce timeout in > >>> drivers/gpio/gpiolib-acpi.c and removing all debounce filter > >>> configuration in amd_gpio_irq_set_type of drivers/pinctrl/pinctrl-amd.c. > >>> What do you think? > >>> > >>> A favorable evidence is I've collected five DSDT tables when > >>> investigating this issue. All 5 DSDT tables have an GpioInt specifying > >>> an non-zero debounce timeout value for the edge type irq and for all > >>> the level type irq, the debounce timeout is set to 0x0000. > >> > >> That is a very interesting observation and this matches with my > >> instincts which say that we should just disable the debounce filter > >> for level triggered interrupts in pinctrl-amd.c > >> > >> Yes that is a bit of a shortcut vs reading the valie from the ACPI > >> table, but I'm not sure that 0 always means disabled. > >> > >> Specifically the ACPI 6.2 spec also has a notion of pinconf settings > >> and the docs on "PinConfig()" say: > >> > >> Note: There is some overlap between the properties set by GpioIo/GpioInt/ PinFunction and > >> PinConfig descriptors. For example, both are setting properties such as pull-ups. If the same > >> property is specified by multiple descriptors for the same pins, the order in which these properties > >> are applied is undetermined. To avoid any conflicts, GpioInt/GpioIo/PinFunction should provide a > >> default value for these properties when PinConfig is used. If PinConfig is used to set pin bias, > >> PullDefault should be used for GpioIo/GpioInt/ PinFunction. *If PinConfig is used to set debounce > >> timeout, 0 should be used for GpioIo/GpioInt.* > >> > >> So that suggests that a value of 0 does not necessarily mean "disabled" but > >> it means use a default, or possibly get the value from somewhere else such > >> as from a ACPI PinConfig description (if present). > > > > Nope, it was added to get rid of disambiguation when both Gpio*() and > > PinConfig() are given. > > So, 0 means default *if and only if* PinConfig() is present. > > > > I.o.w. the OS layers should do this: > > > > - if Gpio*() provides Debounce != 0, we use it, otherwise > > - if PinConfig() is present for this pin with a debounce set, use it, otherwise > > - debounce is disabled. > > > > Now we missed a midentry implementation in the Linux kernel, hence go > > to last, i.e. disable debounce. > > But it should be rather done in gpiolib-acpi.c. > > > > Hope this helps. > > > > I Cc'ed this to Mika as co-author of that part of specification, he > > may correct me if I'm wrong. > > I see, so then the right thing to do for the bug which we are seeing > on some AMD platforms would be to honor the debounce setting I guess ? > > Can you and/or Mika write a patch(set) for this ? I will look at it, but meanwhile I would postpone until having a Mika's Ack on the action that my understanding and course of actions is correct. > > P.S. Does RedHat have a representative in ASWG? > > I think so yes, but mainly focussed on server related things I guess... -- With Best Regards, Andy Shevchenko From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC917C55178 for ; Tue, 27 Oct 2020 16:09:06 +0000 (UTC) Received: from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 28017207C4 for ; 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s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=y8z713XlayESH339Gp0VA0pxVEZrHHHC1564eAGVGao=; b=NumASSN5jUGYa6e5z22XehydqEuDytI4MnptHFy12+L7djPz4ENXxNeSTt8AUpwpbB e0o2xgt4N2sAtEC3XKrqQ1QMWH6Xeh0zbkKofMJkByOwtn6kFUEgdeYAdPEUy5mbmxeL iQApgLUgSL3DsxMER2bJ2GVtl1wxyhPppNCCw2B95tepbbefUytZHVC/RdMMBWb6m0/S +GOF9lGzFzvAZ6Tte7HivoAELh4vRVCjhZRLHX6nlPwmlM2gHLv+UhR8c5ONoeBOXoe+ CKnDnmURtNcns/625CYiXS+Tp11k71VLmQizLT4J3uZ692I3y3dXiTHzWntBzkxt3kEq ji2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=y8z713XlayESH339Gp0VA0pxVEZrHHHC1564eAGVGao=; b=IWgrpQweQCtSWO1Ixb0xbGCrm3p+6gMMn3ZPSs3wBpLpGB+2Ijofun7b1KB8Fdq2Li ZcGyVH07VWfcqVONpHFJ7KyBwv+EePBNbQseKu+OAQ3YQq/ZTG6g6oX6z65aUOaVVaG5 vU6XTe2bhSfZaz7+WKXDPeRqJDKIgSKjubzr0P87QG9QRMGODQncc/OncapiYN8+b7r5 OwNGThmPdZuL+oqe41rj1EoSufUqwl87CuxeuKGGV5leLGOeObUiSN3my3T40Y/grvpN wpulnqdCeOXDo5I5m95H7k4Uh7OCnDZq0cjaTAP4UiroZ4jaj8de3HR9e/Nc7o9ryfJz /w8Q== X-Gm-Message-State: AOAM530VHekShRK6k7cd7/l1FQfmpzoKPuQrATYHozu/IuwvBZCIMl1u Uk6YZ4uZMtcK8WpId9u2lmmV8zF/eg/xuSv3gFA= X-Google-Smtp-Source: ABdhPJwnRuw6kfpLU6usrKj8k9y5UpG9W4uTmoM226PnUmWKyb6+ZHmI86szqWRZzz77ikQ9UMC5mgmvMFEAAnXWNfk= X-Received: by 2002:a17:902:7442:b029:d6:4773:7cdc with SMTP id e2-20020a1709027442b02900d647737cdcmr3310063plt.21.1603814941169; Tue, 27 Oct 2020 09:09:01 -0700 (PDT) MIME-Version: 1.0 References: <20201003230340.42mtl35n4ka4d5qw@Rk> <20201004051644.f3fg2oavbobrwhf6@Rk> <20201006044941.fdjsp346kc5thyzy@Rk> <20201006083157.3pg6zvju5buxspns@Rk> <69853d2b-239c-79d5-bf6f-7dc0eec65602@redhat.com> <4f02cbdf-e1dd-b138-4975-118dd4f86089@redhat.com> <20201014042420.fkkyabmrkiekpmfw@Rk> <20201026225400.37almqey2wxyazkn@Rk> <86963e59-3661-c43c-4e08-a0f9b9e7ed07@redhat.com> In-Reply-To: <86963e59-3661-c43c-4e08-a0f9b9e7ed07@redhat.com> From: Andy Shevchenko Date: Tue, 27 Oct 2020 18:09:49 +0200 Message-ID: To: Hans de Goede Cc: Shyam Sundar S K , linux-kernel-mentees@lists.linuxfoundation.org, Linus Walleij , Coiby Xu , wang jun , "open list:GPIO SUBSYSTEM" , Mika Westerberg , Nehal Shah Subject: Re: [Linux-kernel-mentees] Any other ways to debug GPIO interrupt controller (pinctrl-amd) for broken touchpads of a new laptop model? X-BeenThere: linux-kernel-mentees@lists.linuxfoundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: linux-kernel-mentees-bounces@lists.linuxfoundation.org Sender: "Linux-kernel-mentees" On Tue, Oct 27, 2020 at 6:01 PM Hans de Goede wrote: > On 10/27/20 4:13 PM, Andy Shevchenko wrote: > > On Tue, Oct 27, 2020 at 4:31 PM Hans de Goede wrote: > >> On 10/26/20 11:54 PM, Coiby Xu wrote: > >>> Hi Hans and Linus, > >>> > >>> Will you interpret the 0x0000 value for debounce timeout in GPIO > >>> Interrupt Connection Resource Descriptor as disabling debouncing > >>> filter? > >>> > >>> GpioInt (EdgeLevel, ActiveLevel, Shared, PinConfig, DebounceTimeout, ResourceSource, > >>> ResourceSourceIndex, ResourceUsage, DescriptorName, VendorData) {PinList} > >>> > >>> I'm not sure if Windows' implementation is the de facto standard like > >>> i2c-hid. But if we are going to conform to the ACPI specs and we would > >>> regard 0x0000 debounce timeout as disabling debouncing filter, then we > >>> can fix this touchpad issue and potentially some related issues by > >>> implementing the feature of supporting configuring debounce timeout in > >>> drivers/gpio/gpiolib-acpi.c and removing all debounce filter > >>> configuration in amd_gpio_irq_set_type of drivers/pinctrl/pinctrl-amd.c. > >>> What do you think? > >>> > >>> A favorable evidence is I've collected five DSDT tables when > >>> investigating this issue. All 5 DSDT tables have an GpioInt specifying > >>> an non-zero debounce timeout value for the edge type irq and for all > >>> the level type irq, the debounce timeout is set to 0x0000. > >> > >> That is a very interesting observation and this matches with my > >> instincts which say that we should just disable the debounce filter > >> for level triggered interrupts in pinctrl-amd.c > >> > >> Yes that is a bit of a shortcut vs reading the valie from the ACPI > >> table, but I'm not sure that 0 always means disabled. > >> > >> Specifically the ACPI 6.2 spec also has a notion of pinconf settings > >> and the docs on "PinConfig()" say: > >> > >> Note: There is some overlap between the properties set by GpioIo/GpioInt/ PinFunction and > >> PinConfig descriptors. For example, both are setting properties such as pull-ups. If the same > >> property is specified by multiple descriptors for the same pins, the order in which these properties > >> are applied is undetermined. To avoid any conflicts, GpioInt/GpioIo/PinFunction should provide a > >> default value for these properties when PinConfig is used. If PinConfig is used to set pin bias, > >> PullDefault should be used for GpioIo/GpioInt/ PinFunction. *If PinConfig is used to set debounce > >> timeout, 0 should be used for GpioIo/GpioInt.* > >> > >> So that suggests that a value of 0 does not necessarily mean "disabled" but > >> it means use a default, or possibly get the value from somewhere else such > >> as from a ACPI PinConfig description (if present). > > > > Nope, it was added to get rid of disambiguation when both Gpio*() and > > PinConfig() are given. > > So, 0 means default *if and only if* PinConfig() is present. > > > > I.o.w. the OS layers should do this: > > > > - if Gpio*() provides Debounce != 0, we use it, otherwise > > - if PinConfig() is present for this pin with a debounce set, use it, otherwise > > - debounce is disabled. > > > > Now we missed a midentry implementation in the Linux kernel, hence go > > to last, i.e. disable debounce. > > But it should be rather done in gpiolib-acpi.c. > > > > Hope this helps. > > > > I Cc'ed this to Mika as co-author of that part of specification, he > > may correct me if I'm wrong. > > I see, so then the right thing to do for the bug which we are seeing > on some AMD platforms would be to honor the debounce setting I guess ? > > Can you and/or Mika write a patch(set) for this ? I will look at it, but meanwhile I would postpone until having a Mika's Ack on the action that my understanding and course of actions is correct. > > P.S. Does RedHat have a representative in ASWG? > > I think so yes, but mainly focussed on server related things I guess... -- With Best Regards, Andy Shevchenko _______________________________________________ Linux-kernel-mentees mailing list Linux-kernel-mentees@lists.linuxfoundation.org https://lists.linuxfoundation.org/mailman/listinfo/linux-kernel-mentees