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References: <20210413161238.2816187-1-wltu@google.com>
In-Reply-To: <20210413161238.2816187-1-wltu@google.com>
From: Willy Tu <wltu@google.com>
Date: Wed, 26 May 2021 08:51:31 -0700
Message-ID: <CAHwn2X=yDYN7V=ScrnREzAtCNZnAmRn8CzxOp033OR7POkTA5Q@mail.gmail.com>
Subject: Re: [PATCH] board: ast-g4: Enable SGPIO in SCU
To: OpenBMC Maillist <openbmc@lists.ozlabs.org>
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Cc: Benjamin Fair <benjaminfair@google.com>
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ping.

I also missed the branch for this patch, but this should be in
the v2016.07-aspeed-openbmc u-boot branch.

On Tue, Apr 13, 2021 at 9:12 AM Willy Tu <wltu@google.com> wrote:

> Add option to enable register for SGPIO in SCU
> for ast-g4.
>
> Signed-off-by: Willy Tu <wltu@google.com>
> ---
>  board/aspeed/ast-g4/Kconfig  |  4 ++++
>  board/aspeed/ast-g4/ast-g4.c | 13 +++++++++++++
>  2 files changed, 17 insertions(+)
>
> diff --git a/board/aspeed/ast-g4/Kconfig b/board/aspeed/ast-g4/Kconfig
> index 2bec9a733a..e78030ae34 100644
> --- a/board/aspeed/ast-g4/Kconfig
> +++ b/board/aspeed/ast-g4/Kconfig
> @@ -19,4 +19,8 @@ config SYS_CONFIG_NAME
>         default "ast-g4-phy" if ASPEED_NET_PHY
>         default "ast-g4-ncsi" if ASPEED_NET_NCSI
>
> +config ENABLE_SGPIO
> +    tristate "Enable SGPIO in SCU"
> +       default n
> +
>  endif
> diff --git a/board/aspeed/ast-g4/ast-g4.c b/board/aspeed/ast-g4/ast-g4.c
> index 656495307b..e2463d4524 100644
> --- a/board/aspeed/ast-g4/ast-g4.c
> +++ b/board/aspeed/ast-g4/ast-g4.c
> @@ -22,6 +22,19 @@ int board_init(void)
>         /* address of boot parameters */
>         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>         gd->flags = 0;
> +
> +#ifdef CONFIG_ENABLE_SGPIO
> +       /* Unlock SCU */
> +       writel(SCU_PROTECT_UNLOCK, AST_SCU_BASE);
> +
> +       /* Enable SGPIO Master */
> +       u32 reg = readl(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL2);
> +       reg |= (SCU_FUN_PIN_SGPMI |
> +                       SCU_FUN_PIN_SGPMO |
> +                       SCU_FUN_PIN_SGPMLD |
> +                       SCU_FUN_PIN_SGPMCK);
> +       writel(reg, AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL2);
> +#endif
>         return 0;
>  }
>
> --
> 2.31.1.295.g9ea45b61b8-goog
>
>

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Content-Type: text/html; charset="UTF-8"
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<div dir=3D"ltr">ping.<div><br></div><div>I also missed the branch for this=
 patch, but this should be in the=C2=A0v2016.07-aspeed-openbmc u-boot branc=
h.</div></div><br><div class=3D"gmail_quote"><div dir=3D"ltr" class=3D"gmai=
l_attr">On Tue, Apr 13, 2021 at 9:12 AM Willy Tu &lt;<a href=3D"mailto:wltu=
@google.com">wltu@google.com</a>&gt; wrote:<br></div><blockquote class=3D"g=
mail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204=
,204,204);padding-left:1ex">Add option to enable register for SGPIO in SCU<=
br>
for ast-g4.<br>
<br>
Signed-off-by: Willy Tu &lt;<a href=3D"mailto:wltu@google.com" target=3D"_b=
lank">wltu@google.com</a>&gt;<br>
---<br>
=C2=A0board/aspeed/ast-g4/Kconfig=C2=A0 |=C2=A0 4 ++++<br>
=C2=A0board/aspeed/ast-g4/ast-g4.c | 13 +++++++++++++<br>
=C2=A02 files changed, 17 insertions(+)<br>
<br>
diff --git a/board/aspeed/ast-g4/Kconfig b/board/aspeed/ast-g4/Kconfig<br>
index 2bec9a733a..e78030ae34 100644<br>
--- a/board/aspeed/ast-g4/Kconfig<br>
+++ b/board/aspeed/ast-g4/Kconfig<br>
@@ -19,4 +19,8 @@ config SYS_CONFIG_NAME<br>
=C2=A0 =C2=A0 =C2=A0 =C2=A0 default &quot;ast-g4-phy&quot; if ASPEED_NET_PH=
Y<br>
=C2=A0 =C2=A0 =C2=A0 =C2=A0 default &quot;ast-g4-ncsi&quot; if ASPEED_NET_N=
CSI<br>
<br>
+config ENABLE_SGPIO<br>
+=C2=A0 =C2=A0 tristate &quot;Enable SGPIO in SCU&quot;<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0default n<br>
+<br>
=C2=A0endif<br>
diff --git a/board/aspeed/ast-g4/ast-g4.c b/board/aspeed/ast-g4/ast-g4.c<br=
>
index 656495307b..e2463d4524 100644<br>
--- a/board/aspeed/ast-g4/ast-g4.c<br>
+++ b/board/aspeed/ast-g4/ast-g4.c<br>
@@ -22,6 +22,19 @@ int board_init(void)<br>
=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* address of boot parameters */<br>
=C2=A0 =C2=A0 =C2=A0 =C2=A0 gd-&gt;bd-&gt;bi_boot_params =3D CONFIG_SYS_SDR=
AM_BASE + 0x100;<br>
=C2=A0 =C2=A0 =C2=A0 =C2=A0 gd-&gt;flags =3D 0;<br>
+<br>
+#ifdef CONFIG_ENABLE_SGPIO<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0/* Unlock SCU */<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0writel(SCU_PROTECT_UNLOCK, AST_SCU_BASE);<br>
+<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0/* Enable SGPIO Master */<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0u32 reg =3D readl(AST_SCU_BASE + AST_SCU_FUN_PI=
N_CTRL2);<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0reg |=3D (SCU_FUN_PIN_SGPMI |<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0SCU_FUN_PIN_SGPMO |<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0SCU_FUN_PIN_SGPMLD |<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0SCU_FUN_PIN_SGPMCK);<br>
+=C2=A0 =C2=A0 =C2=A0 =C2=A0writel(reg, AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL=
2);<br>
+#endif<br>
=C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;<br>
=C2=A0}<br>
<br>
--<br>
2.31.1.295.g9ea45b61b8-goog<br>
<br>
</blockquote></div>

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