From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56F5CC433EF for ; Sat, 23 Jul 2022 02:23:48 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A02CE83E03; Sat, 23 Jul 2022 04:23:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gateworks-com.20210112.gappssmtp.com header.i=@gateworks-com.20210112.gappssmtp.com header.b="FIQxg8iU"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id CD8DB8032B; Sat, 23 Jul 2022 04:23:43 +0200 (CEST) Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B23B583E03 for ; Sat, 23 Jul 2022 04:23:39 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tharvey@gateworks.com Received: by mail-pl1-x632.google.com with SMTP id k16so5938871pls.8 for ; Fri, 22 Jul 2022 19:23:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gateworks-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=8GRt8Gz84Yln/QyGzshocb/Q0R3RFyXWR3MzanIkiYc=; b=FIQxg8iUAiDYrrjXOtS0VU2D1jUlNH1bhZ66GShCxUHsgos6qC4vSHePa50xXtwmAN ltzWuOsR0nlzVWy8znThdi4oTktcjBIpiVziU2w2xicL7MnSxL5I2TixuSV4sllhMhvP MmUm98p4epDWfW9WQbC/E9qR+O6CsTPh5DAauSwpS92WYv+ep9IhWvTgYHztRW281qF1 ZSexxieUfHkjnGSG6+UQ180brYtPoNtJ6e2UwSE1/xV/0/1LX7i7tLNBQNLAIzacKeIe EEmyrGSQQKfRcEuITPlDEyZKu55M2g2csgFdX4XdhgjjvlmADoDwF4TG8365Tt0Clvuv uwag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=8GRt8Gz84Yln/QyGzshocb/Q0R3RFyXWR3MzanIkiYc=; b=oVt/NvbpVVEqdwMTEPaB1k7Sgdg3E9FcHpGNsZoe3ovcDXFtkuJPHdGcOnyEjgN8tx L84pcIm1S5zAH3ReteRif+w0RCCNrDTdG/0eqNJ7C3V73Ah/+MSaMgkY4JzgmpmlXf+9 2l/tozgs/5iy9VvnGwZ6taogaMBHDUqA1wu/PooTM04l8TdE/XbMjOtQuQSeYiE5A3oA 2XhxomxS/gHaoQcZS3A59kh9fJ6vN/nvZNh4+KAD8FOOYSsgSnPHY9WlTa8K+1qVJHtj dIxXPOHDU50DI8pSa3vtm6mG8moUZ3hnQlRMWh1eocBRJrnwoSyZQ+YLtArVB9Cj0Zv1 bekQ== X-Gm-Message-State: AJIora+4Zz6vujXwWB81etZY98oRHxxSZIbw9wbFpQ5bXhRsOTdG32Fo q2/mpTf1LPXRomlFRSohVfa3/bo4xD51yIqQpdxjlg== X-Google-Smtp-Source: AGRyM1t+jlzVsBfe3WrRtIHIN0NXcGKynH4n9FJ0Z67Jcxt0xmrqJB3wFEJdb+dDTQf01LiG1n5YIDr6SRqKMc+V07Q= X-Received: by 2002:a17:903:248:b0:168:ce2f:cbd2 with SMTP id j8-20020a170903024800b00168ce2fcbd2mr2299215plh.63.1658543017639; Fri, 22 Jul 2022 19:23:37 -0700 (PDT) MIME-Version: 1.0 References: <1644578217-8947-1-git-send-email-haibo.chen@nxp.com> <1644578217-8947-3-git-send-email-haibo.chen@nxp.com> In-Reply-To: <1644578217-8947-3-git-send-email-haibo.chen@nxp.com> From: Tim Harvey Date: Fri, 22 Jul 2022 19:23:25 -0700 Message-ID: Subject: Re: [PATCH 3/3] mmc: fsl_esdhc_imx: correct the actual card clock To: Bough Chen Cc: Peng Fan , Jaehoon Chung , Fabio Estevam , Sean Anderson , u-boot , Marek Vasut , Adam Ford , Andrey Zhizhikin , dl-uboot-imx Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Fri, Feb 11, 2022 at 3:48 AM wrote: > > From: Haibo Chen > > The original code logic can not show the correct card clock, and also > has one risk when the div is 0. Because there is div -=1 before. > > So move the operation before div -=1, and also involve ddr_pre_div > to get the correct value. > > Signed-off-by: Haibo Chen > --- > drivers/mmc/fsl_esdhc_imx.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c > index 0be7cae1e5..0ea7b0b50c 100644 > --- a/drivers/mmc/fsl_esdhc_imx.c > +++ b/drivers/mmc/fsl_esdhc_imx.c > @@ -609,6 +609,8 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) > while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock && div < 16) > div++; > > + mmc->clock = sdhc_clk / pre_div / div / ddr_pre_div; > + > pre_div >>= 1; > div -= 1; > > @@ -630,7 +632,6 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) > else > esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); > > - mmc->clock = sdhc_clk / pre_div / div; > priv->clock = clock; > } > > -- > 2.17.1 > Haibo, I found that this particular patch keeps an imx8mm-venice-gw7901 board that has a viking vwsdinbdg4 eMMC from booting to Linux. While u-boot appears to work ok, as soon as I load a kernel (from emmc or even network) and boot to it I hang at 'starting kernel' even with early debug turned on. u-boot=> mmc list FSL_SDHC: 0 FSL_SDHC: 1 FSL_SDHC: 2 (eMMC) u-boot=> mmc dev 2 switch to partitions #0, OK mmc2(part 0) is current device u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 45 OEM: 0 Name: DG4008 Bus Speed: 200000000 Mode: HS400ES (200MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 7.3 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 7.3 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH Boot area 0 is not write protected Boot area 1 is not write protected I have other boards with a Micron MTFC8GAKAJCN non HS400ES that don't have any issue so it appears to be something to do with HS400ES support and I find if I disable CONFIG_MMC_HS400_ES_SUPPORT or revert this patch the issue goes away. Any idea what might be going on here? Best Regards, Tim