From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5269AC433EF for ; Thu, 14 Apr 2022 16:11:17 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2666983DDA; Thu, 14 Apr 2022 18:11:10 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gateworks-com.20210112.gappssmtp.com header.i=@gateworks-com.20210112.gappssmtp.com header.b="TuH1J/xz"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id DD15D83B29; Thu, 14 Apr 2022 18:11:08 +0200 (CEST) Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 58BE783DDA for ; Thu, 14 Apr 2022 18:11:04 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tharvey@gateworks.com Received: by mail-pj1-x102e.google.com with SMTP id md20-20020a17090b23d400b001cb70ef790dso9692666pjb.5 for ; Thu, 14 Apr 2022 09:11:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gateworks-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=JUymGzA0lyNrAI3rHVTqiBTlli/8Pqzmo5uzMZjezf8=; b=TuH1J/xzmn9W7a6sSIn3EjMd0PBsIQnoimfikOxgbNjT4ojHVfopUZv0gmQ/SMZViq 3BC1nKIcIRafvUHFRiLQiHbetf76zga8Nf6E9++r72GvDjYX/HvfgqpMdhaUQfmvEHMM ECfpf73BZ7VYocvD1owt+DXuI+2AYoZCDycl8XqifPv64FOljLT+ipNQUl1FbSZBEeMT n5t7DjwQyv1guI//y6bwDi1t4whgjmv4MhvWzKo7rjd9M/GCcXql+DbVe0BjOYK1kT3P +F0NQk27jJNDEKlk+56KmNDjtgLCeOFz8GgINc5rM0JbXsowJuTOFRTkAfJQh+4yncJf HnIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=JUymGzA0lyNrAI3rHVTqiBTlli/8Pqzmo5uzMZjezf8=; b=5rZjFm/7APOmM5RkhFHHTUSmrl09SxNnh0G/WVBvggz6sxTU2KmiMXeq0K+ntxpxF1 sbkxT/DpZZNYkoK6x+5pR030Iqt3PjWrgpLzD85fvDsPXNRY6CvtjIVAQGk3E4yfCkHg C1pXr8yAOwrXgdJyDG0bdH+OdMnR56lAVSw/AGRcIHFkHSel6btJuQNDYNQsGZ55O7sG NL1DlXyS5iv6xz3teOFyJkkQ3KQwQWuq2+FuJSrgIhd+wx9wa/HHBOjL5zJU1tWTEpm9 BozRu+BpYh4OccNHOu7+3TsU6qL0jgJSeOjJrlPJc0IAdkym8Tpn6otemulGplcTF5gF 2tVA== X-Gm-Message-State: AOAM531yANQfQUxLGhHPUmHXZFgmpTfhCOCMiqOx0J7O/NAVvnugzDlo Y1N+D3pgxUReJ7W5enStEEQGD8TWIVWI1GO2UxJQRtFVxnCQ3A== X-Google-Smtp-Source: ABdhPJw/3VDNUiCLpyM9Bf+CxrCRAsZzt3/Oh1uwPlX4Yqp/uu9JIP+NFU6uWyduu3X160El4cxifJX6IH7iBnDhJog= X-Received: by 2002:a17:90a:1db:b0:1bf:711d:267a with SMTP id 27-20020a17090a01db00b001bf711d267amr4488277pjd.155.1649952662588; Thu, 14 Apr 2022 09:11:02 -0700 (PDT) MIME-Version: 1.0 References: <20220413154719.20433-1-tharvey@gateworks.com> In-Reply-To: From: Tim Harvey Date: Thu, 14 Apr 2022 09:10:50 -0700 Message-ID: Subject: Re: [PATCH v2] board: gateworks: venice: enable DM_SERIAL To: Michael Nazzareno Trimarchi Cc: Stefano Babic , Fabio Estevam , "NXP i . MX U-Boot Team" , u-boot Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Wed, Apr 13, 2022 at 10:21 AM Michael Nazzareno Trimarchi wrote: > > Hi > > On Wed, Apr 13, 2022 at 6:09 PM Tim Harvey wrote: > > > > On Wed, Apr 13, 2022 at 8:56 AM Michael Nazzareno Trimarchi > > wrote: > > > > > > Hi Tim > > > > > > On Wed, Apr 13, 2022 at 5:47 PM Tim Harvey wrote: > > > > > > > > Enable DM_SERIAL. > > > > > > > > Signed-off-by: Tim Harvey > > > > --- > > > > v2: rebase on imx/master > > > > --- > > > > configs/imx8mm_venice_defconfig | 2 ++ > > > > configs/imx8mn_venice_defconfig | 2 ++ > > > > 2 files changed, 4 insertions(+) > > > > > > > > diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig > > > > index dd61ec9b70fb..09f7d8a58ca7 100644 > > > > --- a/configs/imx8mm_venice_defconfig > > > > +++ b/configs/imx8mm_venice_defconfig > > > > @@ -110,6 +110,8 @@ CONFIG_SPL_DM_PMIC_MP5416=y > > > > CONFIG_DM_REGULATOR=y > > > > CONFIG_DM_REGULATOR_FIXED=y > > > > CONFIG_DM_REGULATOR_GPIO=y > > > > +CONFIG_DM_SERIAL=y > > > > +# CONFIG_SPL_DM_SERIAL is not set > > > > CONFIG_MXC_UART=y > > > > CONFIG_SYSRESET=y > > > > CONFIG_SPL_SYSRESET=y > > > > diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig > > > > index c3a96a378553..41898da4aecf 100644 > > > > --- a/configs/imx8mn_venice_defconfig > > > > +++ b/configs/imx8mn_venice_defconfig > > > > @@ -108,6 +108,8 @@ CONFIG_SPL_DM_PMIC_MP5416=y > > > > CONFIG_DM_REGULATOR=y > > > > CONFIG_DM_REGULATOR_FIXED=y > > > > CONFIG_DM_REGULATOR_GPIO=y > > > > +CONFIG_DM_SERIAL=y > > > > +# CONFIG_SPL_DM_SERIAL is not set > > > > CONFIG_MXC_UART=y > > > > CONFIG_SYSRESET=y > > > > CONFIG_SPL_SYSRESET=y > > > > -- > > > > 2.17.1 > > > > > > > > > > Should not select in your board kconfig? > > > > > > > Michael, > > > > I don't think it really matters. The other conversions to DM_SERIAL > > are going in defconfigs as well. > > Do we know why without # CONFIG_SPL_DM_SERIAL is not set > > board hang? > Michael, yes, if I also enable CONFIG_SPL_DM_SERIAL I get no serial output and the board hangs even if I add 'u-boot,dm-pre-proper' to uart2/pinctrl_uart2 nodes. The requirement is to use DM_SERIAL in U-Boot, not in the SPL. I'm doing the same as was done for imx8mn-evk in ff1c7961d813 ("ARM: imx: imx8mn-evk: enable DM_SERIAL"). Thus far, no ARCH_IMX8M boards have enabled CONFIG_SPL_DM_SERIAL so I suppose others have run into this as well but again the requirement is to enable CONFIG_DM_SERIAL not necessarily the SPL. Best Regards, Tim