From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 851E4C433EF for ; Mon, 4 Apr 2022 20:15:57 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E1DA980085; Mon, 4 Apr 2022 22:15:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gateworks-com.20210112.gappssmtp.com header.i=@gateworks-com.20210112.gappssmtp.com header.b="w6OTCjjo"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 125CA80085; Mon, 4 Apr 2022 22:15:52 +0200 (CEST) Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id CB2BA83928 for ; Mon, 4 Apr 2022 22:15:39 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tharvey@gateworks.com Received: by mail-pj1-x1031.google.com with SMTP id h23-20020a17090a051700b001c9c1dd3acbso413852pjh.3 for ; Mon, 04 Apr 2022 13:15:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gateworks-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=z43V/AlXyGZngw7gBXU1pdcPdeXnSG2JGUiGFcOGMvU=; b=w6OTCjjoq5HnfD5cuRmfBDJRcONnKNBhn4f5evoiAa2V6iS5b5SH+UkkzO3927XnEa wa2XmxrqlWxpCZmnAUfpohkp5t7rxN9oQSBA8NAJAu7gMmwu8OK4d72Dyq0abFsrluVm LPg2WoAFxtFTC2pqL4YMPnr19zLs5gxjsZWDrnF2cGUp3HB1V+hmhNXPSoSZRcflFhwR tjibG2qP0K7AVgUbLY8Zl7fzenG/06MgGRe+MAYrI1rZNZpaKbpkr/gUDmD8ducLFO4H ZsP43stlsMD/j7fU5Ik409reWM8HHE0iZZzElAKm/+mjUkPBe+KD6zaRWDC2s6lhytOU fWgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=z43V/AlXyGZngw7gBXU1pdcPdeXnSG2JGUiGFcOGMvU=; b=6PKamr3ZSp5vXH/6ZBZ8GJ3g53uaOUTzOEJNrrdKBKX/TSe+vkLpAkq1r6QlR6H9l7 ely+vUnjFk7463B9jLusbeprCWkLvB3YDgiLZ9zUkJnrMWVpV3YmF+tsoECbN2/QEwMb k57Ga77duZ5VwQWgd1lUatU7a/jDgJZX//x93wUN3YPAqDRxtdyLLIhv3N6d733Zh5XZ NJLtQQnc7CgFaf6G/Tw0oC8sFajnXNGhTadrpn9x+6XZ3z94wSyp6D5hwjeqKeycCVis SkiMmPudYHrSK7NY7+njylJVaFfD29Gog7BAtme8zewPg2uGJATfBKA8KlKtaVKSuXNJ gjOw== X-Gm-Message-State: AOAM532qgOrxyhDH2FFoj47FwBKXud/Gaztg+uiPw9fFuceKvc4V61ha fRsHGK+nrwFX5Ul1WaeLk6V6GDH5IQ/OML/eus+TAg== X-Google-Smtp-Source: ABdhPJwqUxPv0affRUjDJ7voVGY/cN9VLja6tjSQ6/PISY8QDDsyHfCMhMi8MmH8XI4JRLN7p4LZIsTgTjqsH9VZvO4= X-Received: by 2002:a17:902:c401:b0:154:152a:7fb7 with SMTP id k1-20020a170902c40100b00154152a7fb7mr1349399plk.63.1649103338162; Mon, 04 Apr 2022 13:15:38 -0700 (PDT) MIME-Version: 1.0 References: <20220401143139.221638-1-marex@denx.de> <20220401143139.221638-2-marex@denx.de> <26bb7423-2493-a450-a8fe-11e4e424373f@denx.de> In-Reply-To: <26bb7423-2493-a450-a8fe-11e4e424373f@denx.de> From: Tim Harvey Date: Mon, 4 Apr 2022 13:15:26 -0700 Message-ID: Subject: Re: [PATCH 2/2] usb: dwc3: Implement .glue_configure for i.MX8MP To: Marek Vasut Cc: u-boot , Angus Ainslie , Bin Meng , Fabio Estevam , Kunihiko Hayashi , Michal Simek , Peng Fan , Stefano Babic Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Mon, Apr 4, 2022 at 12:11 PM Marek Vasut wrote: > > On 4/4/22 20:51, Tim Harvey wrote: > > On Fri, Apr 1, 2022 at 5:48 PM Marek Vasut wrote: > >> > >> On 4/1/22 23:28, Tim Harvey wrote: > >>> On Fri, Apr 1, 2022 at 7:32 AM Marek Vasut wrote: > >>>> > >>>> The i.MX8MP glue needs to be configured based on a couple of DT > >>>> properties, implement .glue_configure callback to parse those DT > >>>> properties and configure the glue accordingly. > >>>> > >>>> Signed-off-by: Marek Vasut > >>>> Cc: Angus Ainslie > >>>> Cc: Bin Meng > >>>> Cc: Fabio Estevam > >>>> Cc: Kunihiko Hayashi > >>>> Cc: Michal Simek > >>>> Cc: Peng Fan > >>>> Cc: Stefano Babic > >>>> --- > >>>> drivers/usb/dwc3/dwc3-generic.c | 52 +++++++++++++++++++++++++++++++++ > >>>> 1 file changed, 52 insertions(+) > >>>> > >>>> diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c > >>>> index 7e3814207e4..6cf844cb483 100644 > >>>> --- a/drivers/usb/dwc3/dwc3-generic.c > >>>> +++ b/drivers/usb/dwc3/dwc3-generic.c > >>>> @@ -223,6 +223,57 @@ struct dwc3_glue_ops { > >>>> enum usb_dr_mode mode); > >>>> }; > >>>> > >>>> +void dwc3_imx8mp_glue_configure(struct udevice *dev, int index, > >>>> + enum usb_dr_mode mode) > >>>> +{ > >>>> +/* USB glue registers */ > >>>> +#define USB_CTRL0 0x00 > >>>> +#define USB_CTRL1 0x04 > >>>> + > >>>> +#define USB_CTRL0_PORTPWR_EN BIT(12) /* 1 - PPC enabled (default) */ > >>>> +#define USB_CTRL0_USB3_FIXED BIT(22) /* 1 - USB3 permanent attached */ > >>>> +#define USB_CTRL0_USB2_FIXED BIT(23) /* 1 - USB2 permanent attached */ > >>>> + > >>>> +#define USB_CTRL1_OC_POLARITY BIT(16) /* 0 - HIGH / 1 - LOW */ > >>>> +#define USB_CTRL1_PWR_POLARITY BIT(17) /* 0 - HIGH / 1 - LOW */ > >>>> + fdt_addr_t regs = dev_read_addr_index(dev, 1); > >>>> + void *base = map_physmem(regs, 0x8, MAP_NOCACHE); > >>>> + u32 value; > >>>> + > >>>> + value = readl(base + USB_CTRL0); > >>>> + > >>>> + if (dev_read_bool(dev, "fsl,permanently-attached")) > >>>> + value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED); > >>>> + else > >>>> + value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED); > >>>> + > >>>> + if (dev_read_bool(dev, "fsl,disable-port-power-control")) > >>>> + value &= ~(USB_CTRL0_PORTPWR_EN); > >>>> + else > >>>> + value |= USB_CTRL0_PORTPWR_EN; > >>>> + > >>>> + writel(value, base + USB_CTRL0); > >>>> + > >>>> + value = readl(base + USB_CTRL1); > >>>> + if (dev_read_bool(dev, "fsl,over-current-active-low")) > >>>> + value |= USB_CTRL1_OC_POLARITY; > >>>> + else > >>>> + value &= ~USB_CTRL1_OC_POLARITY; > >>>> + > >>>> + if (dev_read_bool(dev, "fsl,power-active-low")) > >>>> + value |= USB_CTRL1_PWR_POLARITY; > >>>> + else > >>>> + value &= ~USB_CTRL1_PWR_POLARITY; > >>>> + > >>>> + writel(value, base + USB_CTRL1); > >>>> + > >>>> + unmap_physmem(base, MAP_NOCACHE); > >>>> +} > >>>> + > >>>> +struct dwc3_glue_ops imx8mp_ops = { > >>>> + .glue_configure = dwc3_imx8mp_glue_configure, > >>>> +}; > >>>> + > >>>> void dwc3_ti_glue_configure(struct udevice *dev, int index, > >>>> enum usb_dr_mode mode) > >>>> { > >>>> @@ -464,6 +515,7 @@ static const struct udevice_id dwc3_glue_ids[] = { > >>>> { .compatible = "rockchip,rk3328-dwc3" }, > >>>> { .compatible = "rockchip,rk3399-dwc3" }, > >>>> { .compatible = "qcom,dwc3" }, > >>>> + { .compatible = "fsl,imx8mp-dwc3", .data = (ulong)&imx8mp_ops }, > >>>> { .compatible = "fsl,imx8mq-dwc3" }, > >>>> { .compatible = "intel,tangier-dwc3" }, > >>>> { } > >>>> -- > >>>> 2.35.1 > >>>> > >>> > >>> Marek, > >>> > >>> Looks like your working on IMX8MP USB support - thanks for that! > >>> > >>> I'm working on bring-up of an IMX8MP board and can test your > >>> power-domain and USB patches but I'm having trouble getting some of > >>> your patches to apply - do you have a repo I can pull from? > >> > >> https://source.denx.de/u-boot/custodians/u-boot-usb/-/commits/imx-8mp > > > > Marek, > > > > Thanks. I've thrown my board patches on top but don't get very far > > with regards to USB due to clk: > > U-Boot 2022.04-rc5-00085-gce6842669a59-dirty (Apr 04 2022 - 11:32:45 -0700) > > > > CPU: Freescale i.MX8MP[8] rev1.1 1600 MHz (running at 1200 MHz) > > CPU: Industrial temperature grade (-40C to 105C) at 38C > > Reset cause: POR > > Model: Gateworks Venice GW74xx i.MX8MP board > > DRAM: 1 GiB > > clk_register: failed to get osc_32k device (parent of usb_root_clk) > > Core: 210 devices, 23 uclasses, devicetree: separate > > WDT: Started watchdog@30280000 with servicing (60s timeout) > > MMC: FSL_SDHC: 0, FSL_SDHC: 2 > > Loading Environment from nowhere... OK > > In: serial@30890000 > > Out: serial@30890000 > > Err: serial@30890000 > > > > u-boot=> usb start > > starting USB... > > Bus usb@38100000: Port not available. > > Bus usb@38200000: Port not available. > > > > I see 'clk_register: failed to get osc_32k device (parent of > > usb_root_clk)' above yet clock-osc-32k seems to be there: > > [...] > > > I've got the following in my config: > > CONFIG_CLK_CCF=y > > CONFIG_CLK_COMPOSITE_CCF=y > > CONFIG_CLK_IMX8MP=y > > ... > > CONFIG_USB_XHCI_DWC3=y > > CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y > > CONFIG_USB_DWC3=y > > CONFIG_USB_DWC3_GENERIC=y > > ... > > CONFIG_POWER_DOMAIN=y > > CONFIG_IMX8M_POWER_DOMAIN=y > > > > Any ideas? > > "Port not available" means device_probe() returns -ENODEV in usb uclass, > maybe you're still missing some regulator driver or some such ? You'd > have to dig into that. Marek, Thanks - I was missing CONFIG_IMX8MP_HSIOMIX_BLKCTRL. IMX8MP USB is working now. I will respond to the individual patches you have. Best Regards, Tim