From mboxrd@z Thu Jan  1 00:00:00 1970
From: Tim Harvey <tharvey@gateworks.com>
Date: Thu, 17 Dec 2015 07:36:20 -0800
Subject: [U-Boot] [PATCH 1/2] arm: imx6: Add DDR3 calibration code for
	MX6 Q/D/DL
In-Reply-To: <1450276807-8960-1-git-send-email-marex@denx.de>
References: <1450276807-8960-1-git-send-email-marex@denx.de>
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On Wed, Dec 16, 2015 at 6:40 AM, Marek Vasut <marex@denx.de> wrote:
> Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code
> fine-tunes the behavior of the MMDC controller in order to improve
> the signal integrity and memory stability.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>

Marek,

This is great - this would be a great addition to U-Boot IMX6 SPL.

You must have forgotten to post a dependent patch that adds some of
the registers to mmdc_p_regs. If you can post that I can run this
through some testing. Also, in a follow-on post we should add some
more verbiage about how long this takes to perform (I believe you told
me ~10ms) and where to refer in the IMX6 RM's for the steps followed.

Regards,

Tim