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From: Tim Harvey <tharvey@gateworks.com>
To: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	NXP Linux Team <linux-imx@nxp.com>,
	Fabio Estevam <festevam@gmail.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Alexander Stein <alexander.stein@ew.tq-group.com>
Subject: Re: [PATCH] arm64: dts: imx8mp-venice-gw74xx: add PCIe support
Date: Wed, 14 Sep 2022 10:09:51 -0700	[thread overview]
Message-ID: <CAJ+vNU2fmsy2eT1tBOWx9D=cS1emgkCKxaOX+GCZF=v_JDc_1Q@mail.gmail.com> (raw)
In-Reply-To: <CAJ+vNU2sKkjv1q=oPD++1DE7uUiXJYi75-fpRRNboabUbUwCqA@mail.gmail.com>

On Fri, Sep 9, 2022 at 10:42 AM Tim Harvey <tharvey@gateworks.com> wrote:
>
> On Thu, Sep 8, 2022 at 10:59 PM Alexander Stein
> <alexander.stein@ew.tq-group.com> wrote:
> >
> > Hi Tim,
> >
> > Am Donnerstag, 8. September 2022, 17:49:03 CEST schrieb Tim Harvey:
> > > Add PCIe support on the Gateworks GW74xx board. While at it,
> > > fix the related gpio line names from the previous incorrect values.
> > >
> > > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> > > ---
> > >  .../dts/freescale/imx8mp-venice-gw74xx.dts    | 40 +++++++++++++++++--
> > >  1 file changed, 37 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > > b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts index
> > > e0fe356b662d..7644db61d631 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > > @@ -8,6 +8,7 @@
> > >  #include <dt-bindings/gpio/gpio.h>
> > >  #include <dt-bindings/input/linux-event-codes.h>
> > >  #include <dt-bindings/leds/common.h>
> > > +#include <dt-bindings/phy/phy-imx8-pcie.h>
> > >
> > >  #include "imx8mp.dtsi"
> > >
> > > @@ -100,6 +101,12 @@ led-1 {
> > >               };
> > >       };
> > >
> > > +     pcie0_refclk: pcie0-refclk {
> > > +             compatible = "fixed-clock";
> > > +             #clock-cells = <0>;
> > > +             clock-frequency = <100000000>;
> > > +     };
> > > +
> > >       pps {
> > >               compatible = "pps-gpio";
> > >               pinctrl-names = "default";
> > > @@ -215,8 +222,8 @@ &gpio1 {
> > >  &gpio2 {
> > >       gpio-line-names =
> > >               "", "", "", "", "", "", "", "",
> > > -             "", "", "", "", "", "", "", "",
> > > -             "pcie3_wdis#", "", "", "pcie1_wdis@", "pcie2_wdis#", "",
> > "", "",
> > > +             "", "", "", "", "", "", "pcie3_wdis#", "",
> > > +             "", "", "pcie2_wdis#", "", "", "", "", "",
> > >               "", "", "", "", "", "", "", "";
> > >  };
> > >
> > > @@ -562,6 +569,28 @@ &i2c4 {
> > >       status = "okay";
> > >  };
> > >
> > > +&pcie_phy {
> > > +     fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> > > +     fsl,clkreq-unsupported;
> > > +     clocks = <&pcie0_refclk>;
> > > +     clock-names = "ref";
> > > +     status = "okay";
> > > +};
> > > +
> > > +&pcie {
> > > +     pinctrl-names = "default";
> > > +     pinctrl-0 = <&pinctrl_pcie0>;
> > > +     reset-gpio = <&gpio2 17 GPIO_ACTIVE_LOW>;
> > > +     clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> > > +              <&clk IMX8MP_CLK_PCIE_ROOT>,
> > > +              <&clk IMX8MP_CLK_HSIO_AXI>;
> > > +     clock-names = "pcie", "pcie_aux", "pcie_bus";
> >
> > With the still pending dt-binding patch at [1] the clock order shall be
> > "pcie", "pcie_bus", "pcie_phy".
> >
> > Best regards,
> > Alexander
> >
> > [1] https://lore.kernel.org/lkml/20220822184701.25246-2-Sergey.Semin@baikalelectronics.ru/
> >
>
> Alexander,
>
> Interesting... the imx8pm-evk PCIe patch was accepted with the
> bindings I used which are current. So I suppose if/when the patch you
> pointed to gets accepted some existing bindings will need to change to
> be compliant.
>
> Best Regards,
>
> Tim

Shawn,

I'm unclear if this patch needs to change. I believe the patch adheres
to the current bindings and if the bindings change it would require
all the imx8m boards to have their bindings updated to agree with it.
I'm also unclear if the order of the clocks really makes any
difference here.

Best Regards,

Tim

WARNING: multiple messages have this Message-ID (diff)
From: Tim Harvey <tharvey@gateworks.com>
To: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,  devicetree@vger.kernel.org,
	NXP Linux Team <linux-imx@nxp.com>,
	 Fabio Estevam <festevam@gmail.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	 Sascha Hauer <s.hauer@pengutronix.de>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	 Alexander Stein <alexander.stein@ew.tq-group.com>
Subject: Re: [PATCH] arm64: dts: imx8mp-venice-gw74xx: add PCIe support
Date: Wed, 14 Sep 2022 10:09:51 -0700	[thread overview]
Message-ID: <CAJ+vNU2fmsy2eT1tBOWx9D=cS1emgkCKxaOX+GCZF=v_JDc_1Q@mail.gmail.com> (raw)
In-Reply-To: <CAJ+vNU2sKkjv1q=oPD++1DE7uUiXJYi75-fpRRNboabUbUwCqA@mail.gmail.com>

On Fri, Sep 9, 2022 at 10:42 AM Tim Harvey <tharvey@gateworks.com> wrote:
>
> On Thu, Sep 8, 2022 at 10:59 PM Alexander Stein
> <alexander.stein@ew.tq-group.com> wrote:
> >
> > Hi Tim,
> >
> > Am Donnerstag, 8. September 2022, 17:49:03 CEST schrieb Tim Harvey:
> > > Add PCIe support on the Gateworks GW74xx board. While at it,
> > > fix the related gpio line names from the previous incorrect values.
> > >
> > > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> > > ---
> > >  .../dts/freescale/imx8mp-venice-gw74xx.dts    | 40 +++++++++++++++++--
> > >  1 file changed, 37 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > > b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts index
> > > e0fe356b662d..7644db61d631 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > > @@ -8,6 +8,7 @@
> > >  #include <dt-bindings/gpio/gpio.h>
> > >  #include <dt-bindings/input/linux-event-codes.h>
> > >  #include <dt-bindings/leds/common.h>
> > > +#include <dt-bindings/phy/phy-imx8-pcie.h>
> > >
> > >  #include "imx8mp.dtsi"
> > >
> > > @@ -100,6 +101,12 @@ led-1 {
> > >               };
> > >       };
> > >
> > > +     pcie0_refclk: pcie0-refclk {
> > > +             compatible = "fixed-clock";
> > > +             #clock-cells = <0>;
> > > +             clock-frequency = <100000000>;
> > > +     };
> > > +
> > >       pps {
> > >               compatible = "pps-gpio";
> > >               pinctrl-names = "default";
> > > @@ -215,8 +222,8 @@ &gpio1 {
> > >  &gpio2 {
> > >       gpio-line-names =
> > >               "", "", "", "", "", "", "", "",
> > > -             "", "", "", "", "", "", "", "",
> > > -             "pcie3_wdis#", "", "", "pcie1_wdis@", "pcie2_wdis#", "",
> > "", "",
> > > +             "", "", "", "", "", "", "pcie3_wdis#", "",
> > > +             "", "", "pcie2_wdis#", "", "", "", "", "",
> > >               "", "", "", "", "", "", "", "";
> > >  };
> > >
> > > @@ -562,6 +569,28 @@ &i2c4 {
> > >       status = "okay";
> > >  };
> > >
> > > +&pcie_phy {
> > > +     fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> > > +     fsl,clkreq-unsupported;
> > > +     clocks = <&pcie0_refclk>;
> > > +     clock-names = "ref";
> > > +     status = "okay";
> > > +};
> > > +
> > > +&pcie {
> > > +     pinctrl-names = "default";
> > > +     pinctrl-0 = <&pinctrl_pcie0>;
> > > +     reset-gpio = <&gpio2 17 GPIO_ACTIVE_LOW>;
> > > +     clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> > > +              <&clk IMX8MP_CLK_PCIE_ROOT>,
> > > +              <&clk IMX8MP_CLK_HSIO_AXI>;
> > > +     clock-names = "pcie", "pcie_aux", "pcie_bus";
> >
> > With the still pending dt-binding patch at [1] the clock order shall be
> > "pcie", "pcie_bus", "pcie_phy".
> >
> > Best regards,
> > Alexander
> >
> > [1] https://lore.kernel.org/lkml/20220822184701.25246-2-Sergey.Semin@baikalelectronics.ru/
> >
>
> Alexander,
>
> Interesting... the imx8pm-evk PCIe patch was accepted with the
> bindings I used which are current. So I suppose if/when the patch you
> pointed to gets accepted some existing bindings will need to change to
> be compliant.
>
> Best Regards,
>
> Tim

Shawn,

I'm unclear if this patch needs to change. I believe the patch adheres
to the current bindings and if the bindings change it would require
all the imx8m boards to have their bindings updated to agree with it.
I'm also unclear if the order of the clocks really makes any
difference here.

Best Regards,

Tim

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-09-14 17:10 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-08 15:49 [PATCH] arm64: dts: imx8mp-venice-gw74xx: add PCIe support Tim Harvey
2022-09-08 15:49 ` Tim Harvey
2022-09-09  5:59 ` Alexander Stein
2022-09-09  5:59   ` Alexander Stein
2022-09-09 17:42   ` Tim Harvey
2022-09-09 17:42     ` Tim Harvey
2022-09-14 17:09     ` Tim Harvey [this message]
2022-09-14 17:09       ` Tim Harvey
2022-09-16 10:03 ` Shawn Guo
2022-09-16 10:03   ` Shawn Guo

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