From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 22020C433EF for ; Mon, 9 May 2022 17:32:58 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 70B4B83F78; Mon, 9 May 2022 19:32:55 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gateworks-com.20210112.gappssmtp.com header.i=@gateworks-com.20210112.gappssmtp.com header.b="Y1z4pDTN"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8F6E383F78; Mon, 9 May 2022 19:32:53 +0200 (CEST) Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5C02083EC8 for ; Mon, 9 May 2022 19:32:48 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gateworks.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tharvey@gateworks.com Received: by mail-pj1-x1036.google.com with SMTP id l11-20020a17090a49cb00b001d923a9ca99so13400613pjm.1 for ; Mon, 09 May 2022 10:32:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gateworks-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=oIV5zmsRxMsh3JR8a3ZArWcHVuIrneDLkilnFIT+KSU=; b=Y1z4pDTNyHzYxnSbWKmlT3bYajb0fZcSLAPp4hTOem+cjD49XwFGrgCmFwTgkOUEZG xEX1sAkqQKHkf3UCDAKYzJx9aUSGBGtba3IVSfJeLIhvuq2e8DfMk9Wb6E/muTxw2QSH oUsToA/njGO5ojeHhnBwPSLLm9XJWt5gyN//t1L0cAgb+gDUXWvLH3LL/ywaO4NGJiBA Ur0/pkod5aMREfCjs/KUtzgwrZqzQZgjSQ2KXLZ5XL+BJj+FyDghYpM6lnro0k52XS71 opzskDBOhYGo3oydoqxPxTkqGlmn46WlSmIUpLCGBDHy1rHVZdDysrrzNALYuGh2ZlB/ e6tg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=oIV5zmsRxMsh3JR8a3ZArWcHVuIrneDLkilnFIT+KSU=; b=vgvz+FXu0e/XKgumOeflbR5rz0tjm4/RazudSNSDUsgOlt9jwAR+Kf/YVhTWF1cGdr 2Y3LrxtaGAA8E9AHGdWvJCjHeibq7YRBMnbqrIU7E58R1LRsULahiiBMd+QF9BnW6ksg ZSINeq75Gfp/KAE/IjPtUndgdsMmZsDRftZqDUxjmL51c0NfvHzzgNPre5iwqofJQxre Waioe/hsKupfX/44AblU66xaYpQl5AwA76GnskGA6DDbj3nUmWue6lz1zP00RlWx1Bcu EarnVubMv9M1thMN+Ev1vzsGUHT7RN82bVpdKC0KOUolxbUpPl9zJGsiG4ZY+MPY9x8m PxqA== X-Gm-Message-State: AOAM532dCxGQ1G2iaOc3axZsZgPyzmmsKp71VjEVrk6zojkWANWwwMpq 11ErULFa7tGUv0qgOicjgTiKMc4yV8naVQOssyTQuA== X-Google-Smtp-Source: ABdhPJxEMOLJYM/RfDxZSbGuBf1n8CEXFHLTbBTDaQZCf5Bl2AFI99vkRWoszzRuHudNsjCfJoJUpiMWvUFtLNFE1/U= X-Received: by 2002:a17:902:f541:b0:15e:ba32:12b0 with SMTP id h1-20020a170902f54100b0015eba3212b0mr17167252plf.90.1652117566629; Mon, 09 May 2022 10:32:46 -0700 (PDT) MIME-Version: 1.0 References: <20220507110402.21355-1-peng.fan@oss.nxp.com> <20220507110402.21355-6-peng.fan@oss.nxp.com> In-Reply-To: <20220507110402.21355-6-peng.fan@oss.nxp.com> From: Tim Harvey Date: Mon, 9 May 2022 10:32:35 -0700 Message-ID: Subject: Re: [PATCH V2 5/7] ddr: imx8m: helper: load ddr firmware according to binman symbols To: "Peng Fan (OSS)" Cc: Stefano Babic , Fabio Estevam , "Ariel D'Alessandro" , Michael Nazzareno Trimarchi , Simon Glass , alpernebiyasak@gmail.com, Marek Behun , =?UTF-8?Q?Pali_Roh=C3=A1r?= , Stefan Roese , Ricardo Salveti , Patrick Delaunay , Tom Rini , u-boot , Peng Fan Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Sat, May 7, 2022 at 3:22 AM Peng Fan (OSS) wrote: > > From: Peng Fan > > By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after > we update the binman dtsi to drop 0x8000/0x4000 length for the firmware. > > And that could save binary size for many KBs. > > Signed-off-by: Peng Fan > --- > drivers/ddr/imx/imx8m/helper.c | 53 ++++++++++++++++++++++++++++------ > 1 file changed, 44 insertions(+), 9 deletions(-) > > diff --git a/drivers/ddr/imx/imx8m/helper.c b/drivers/ddr/imx/imx8m/helpe= r.c > index f23904bf712..b10ba602665 100644 > --- a/drivers/ddr/imx/imx8m/helper.c > +++ b/drivers/ddr/imx/imx8m/helper.c > @@ -4,6 +4,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -25,15 +26,30 @@ DECLARE_GLOBAL_DATA_PTR; > #define DMEM_OFFSET_ADDR 0x00054000 > #define DDR_TRAIN_CODE_BASE_ADDR IP2APB_DDRPHY_IPS_BASE_ADDR(0) > > +binman_sym_declare(ulong, blob_ext_1, image_pos); > +binman_sym_declare(ulong, blob_ext_1, size); > + > +binman_sym_declare(ulong, blob_ext_2, image_pos); > +binman_sym_declare(ulong, blob_ext_2, size); > + > +#if !IS_ENABLED(CONFIG_IMX8M_DDR3L) > +binman_sym_declare(ulong, blob_ext_3, image_pos); > +binman_sym_declare(ulong, blob_ext_3, size); > + > +binman_sym_declare(ulong, blob_ext_4, image_pos); > +binman_sym_declare(ulong, blob_ext_4, size); > +#endif > + > /* We need PHY iMEM PHY is 32KB padded */ > void ddr_load_train_firmware(enum fw_type type) > { > u32 tmp32, i; > u32 error =3D 0; > - unsigned long pr_to32, pr_from32; > - unsigned long fw_offset =3D type ? IMEM_2D_OFFSET : 0; > - unsigned long imem_start =3D (unsigned long)&_end + fw_offset; > - unsigned long dmem_start; > + uint32_t pr_to32, pr_from32; > + uint32_t fw_offset =3D type ? IMEM_2D_OFFSET : 0; > + uint32_t imem_start =3D (uint32_t)&_end + fw_offset; > + uint32_t dmem_start; > + uint32_t imem_len =3D IMEM_LEN, dmem_len =3D DMEM_LEN; > > #ifdef CONFIG_SPL_OF_CONTROL > if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) { > @@ -43,11 +59,30 @@ void ddr_load_train_firmware(enum fw_type type) > } > #endif > > - dmem_start =3D imem_start + IMEM_LEN; > + if (CONFIG_IS_ENABLED(BINMAN_SYMBOLS)) { > + switch (type) { > + case FW_1D_IMAGE: > + imem_start =3D binman_sym(ulong, blob_ext_1, imag= e_pos); > + imem_len =3D binman_sym(ulong, blob_ext_1, size); > + dmem_start =3D binman_sym(ulong, blob_ext_2, imag= e_pos); > + dmem_len =3D binman_sym(ulong, blob_ext_2, size); > + break; > + case FW_2D_IMAGE: > +#if !IS_ENABLED(CONFIG_IMX8M_DDR3L) > + imem_start =3D binman_sym(ulong, blob_ext_3, imag= e_pos); > + imem_len =3D binman_sym(ulong, blob_ext_3, size); > + dmem_start =3D binman_sym(ulong, blob_ext_4, imag= e_pos); > + dmem_len =3D binman_sym(ulong, blob_ext_4, size); > +#endif > + break; > + } > + } > + > + dmem_start =3D imem_start + imem_len; > > pr_from32 =3D imem_start; > pr_to32 =3D DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR; > - for (i =3D 0x0; i < IMEM_LEN; ) { > + for (i =3D 0x0; i < imem_len; ) { > tmp32 =3D readl(pr_from32); > writew(tmp32 & 0x0000ffff, pr_to32); > pr_to32 +=3D 4; > @@ -59,7 +94,7 @@ void ddr_load_train_firmware(enum fw_type type) > > pr_from32 =3D dmem_start; > pr_to32 =3D DDR_TRAIN_CODE_BASE_ADDR + 4 * DMEM_OFFSET_ADDR; > - for (i =3D 0x0; i < DMEM_LEN; ) { > + for (i =3D 0x0; i < dmem_len; ) { > tmp32 =3D readl(pr_from32); > writew(tmp32 & 0x0000ffff, pr_to32); > pr_to32 +=3D 4; > @@ -72,7 +107,7 @@ void ddr_load_train_firmware(enum fw_type type) > debug("check ddr_pmu_train_imem code\n"); > pr_from32 =3D imem_start; > pr_to32 =3D DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR; > - for (i =3D 0x0; i < IMEM_LEN; ) { > + for (i =3D 0x0; i < imem_len; ) { > tmp32 =3D (readw(pr_to32) & 0x0000ffff); > pr_to32 +=3D 4; > tmp32 +=3D ((readw(pr_to32) & 0x0000ffff) << 16); > @@ -93,7 +128,7 @@ void ddr_load_train_firmware(enum fw_type type) > debug("check ddr4_pmu_train_dmem code\n"); > pr_from32 =3D dmem_start; > pr_to32 =3D DDR_TRAIN_CODE_BASE_ADDR + 4 * DMEM_OFFSET_ADDR; > - for (i =3D 0x0; i < DMEM_LEN;) { > + for (i =3D 0x0; i < dmem_len;) { > tmp32 =3D (readw(pr_to32) & 0x0000ffff); > pr_to32 +=3D 4; > tmp32 +=3D ((readw(pr_to32) & 0x0000ffff) << 16); > -- > 2.36.0 > Peng, While this compiles and works, it generates a lot of warnings due to cating from pointer to integer of diff size: CC spl/drivers/ddr/imx/imx8m/helper.o drivers/ddr/imx/imx8m/helper.c: In function =E2=80=98ddr_load_train_firmwar= e=E2=80=99: drivers/ddr/imx/imx8m/helper.c:50:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] uint32_t imem_start =3D (uint32_t)&_end + fw_offset; ^ In file included from drivers/ddr/imx/imx8m/helper.c:11: ./arch/arm/include/asm/io.h:26:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getl(a) (*(volatile unsigned int *)(a)) ^ ./arch/arm/include/asm/io.h:108:31: note: in expansion of macro =E2=80=98__= arch_getl=E2=80=99 #define readl(c) ({ u32 __v =3D __arch_getl(c); __iormb(); __v; }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:86:11: note: in expansion of macro =E2=80=98= readl=E2=80=99 tmp32 =3D readl(pr_from32); ^~~~~ ./arch/arm/include/asm/io.h:30:29: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_putw(v,a) (*(volatile unsigned short *)(a) =3D (v)) ^ ./arch/arm/include/asm/io.h:102:48: note: in expansion of macro =E2=80=98__= arch_putw=E2=80=99 #define writew(v,c) ({ u16 __v =3D v; __iowmb(); __arch_putw(__v,c); __v; = }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:87:3: note: in expansion of macro =E2=80=98w= ritew=E2=80=99 writew(tmp32 & 0x0000ffff, pr_to32); ^~~~~~ ./arch/arm/include/asm/io.h:30:29: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_putw(v,a) (*(volatile unsigned short *)(a) =3D (v)) ^ ./arch/arm/include/asm/io.h:102:48: note: in expansion of macro =E2=80=98__= arch_putw=E2=80=99 #define writew(v,c) ({ u16 __v =3D v; __iowmb(); __arch_putw(__v,c); __v; = }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:89:3: note: in expansion of macro =E2=80=98w= ritew=E2=80=99 writew((tmp32 >> 16) & 0x0000ffff, pr_to32); ^~~~~~ ./arch/arm/include/asm/io.h:26:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getl(a) (*(volatile unsigned int *)(a)) ^ ./arch/arm/include/asm/io.h:108:31: note: in expansion of macro =E2=80=98__= arch_getl=E2=80=99 #define readl(c) ({ u32 __v =3D __arch_getl(c); __iormb(); __v; }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:98:11: note: in expansion of macro =E2=80=98= readl=E2=80=99 tmp32 =3D readl(pr_from32); ^~~~~ ./arch/arm/include/asm/io.h:30:29: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_putw(v,a) (*(volatile unsigned short *)(a) =3D (v)) ^ ./arch/arm/include/asm/io.h:102:48: note: in expansion of macro =E2=80=98__= arch_putw=E2=80=99 #define writew(v,c) ({ u16 __v =3D v; __iowmb(); __arch_putw(__v,c); __v; = }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:99:3: note: in expansion of macro =E2=80=98w= ritew=E2=80=99 writew(tmp32 & 0x0000ffff, pr_to32); ^~~~~~ ./arch/arm/include/asm/io.h:30:29: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_putw(v,a) (*(volatile unsigned short *)(a) =3D (v)) ^ ./arch/arm/include/asm/io.h:102:48: note: in expansion of macro =E2=80=98__= arch_putw=E2=80=99 #define writew(v,c) ({ u16 __v =3D v; __iowmb(); __arch_putw(__v,c); __v; = }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:101:3: note: in expansion of macro =E2=80=98= writew=E2=80=99 writew((tmp32 >> 16) & 0x0000ffff, pr_to32); ^~~~~~ ./arch/arm/include/asm/io.h:25:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getw(a) (*(volatile unsigned short *)(a)) ^ ./arch/arm/include/asm/io.h:107:31: note: in expansion of macro =E2=80=98__= arch_getw=E2=80=99 #define readw(c) ({ u16 __v =3D __arch_getw(c); __iormb(); __v; }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:111:12: note: in expansion of macro =E2=80= =98readw=E2=80=99 tmp32 =3D (readw(pr_to32) & 0x0000ffff); ^~~~~ ./arch/arm/include/asm/io.h:25:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getw(a) (*(volatile unsigned short *)(a)) ^ ./arch/arm/include/asm/io.h:107:31: note: in expansion of macro =E2=80=98__= arch_getw=E2=80=99 #define readw(c) ({ u16 __v =3D __arch_getw(c); __iormb(); __v; }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:113:14: note: in expansion of macro =E2=80= =98readw=E2=80=99 tmp32 +=3D ((readw(pr_to32) & 0x0000ffff) << 16); ^~~~~ ./arch/arm/include/asm/io.h:26:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getl(a) (*(volatile unsigned int *)(a)) ^ ./arch/arm/include/asm/io.h:108:31: note: in expansion of macro =E2=80=98__= arch_getl=E2=80=99 #define readl(c) ({ u32 __v =3D __arch_getl(c); __iormb(); __v; }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:115:16: note: in expansion of macro =E2=80= =98readl=E2=80=99 if (tmp32 !=3D readl(pr_from32)) { ^~~~~ In file included from include/linux/printk.h:4, from include/linux/kernel.h:5, from include/linux/bitops.h:22, from ./arch/arm/include/asm/arch/imx-regs.h:87, from include/configs/imx8m.h:11, from include/configs/imx8mm_venice.h:9, from include/config.h:4, from include/common.h:16, from drivers/ddr/imx/imx8m/helper.c:6: drivers/ddr/imx/imx8m/helper.c:116:10: warning: format =E2=80=98%lx=E2=80= =99 expects argument of type =E2=80=98long unsigned int=E2=80=99, but argument 2 has ty= pe =E2=80=98uint32_t=E2=80=99 {aka =E2=80=98unsigned in =E2=80=99} [-Wformat= =3D] debug("%lx %lx\n", pr_from32, pr_to32); ^~~~~~~~~~~ include/log.h:165:21: note: in definition of macro =E2=80=98pr_fmt=E2=80=99 #define pr_fmt(fmt) fmt ^~~ include/log.h:285:2: note: in expansion of macro =E2=80=98debug_cond=E2=80= =99 debug_cond(_DEBUG, fmt, ##args) ^~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:116:4: note: in expansion of macro =E2=80=98= debug=E2=80=99 debug("%lx %lx\n", pr_from32, pr_to32); ^~~~~ drivers/ddr/imx/imx8m/helper.c:116:10: warning: format =E2=80=98%lx=E2=80= =99 expects argument of type =E2=80=98long unsigned int=E2=80=99, but argument 3 has ty= pe =E2=80=98uint32_t=E2=80=99 {aka =E2=80=98unsigned in =E2=80=99} [-Wformat= =3D] debug("%lx %lx\n", pr_from32, pr_to32); ^~~~~~~~~~~ include/log.h:165:21: note: in definition of macro =E2=80=98pr_fmt=E2=80=99 #define pr_fmt(fmt) fmt ^~~ include/log.h:285:2: note: in expansion of macro =E2=80=98debug_cond=E2=80= =99 debug_cond(_DEBUG, fmt, ##args) ^~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:116:4: note: in expansion of macro =E2=80=98= debug=E2=80=99 debug("%lx %lx\n", pr_from32, pr_to32); ^~~~~ In file included from drivers/ddr/imx/imx8m/helper.c:11: ./arch/arm/include/asm/io.h:25:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getw(a) (*(volatile unsigned short *)(a)) ^ ./arch/arm/include/asm/io.h:107:31: note: in expansion of macro =E2=80=98__= arch_getw=E2=80=99 #define readw(c) ({ u16 __v =3D __arch_getw(c); __iormb(); __v; }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:132:12: note: in expansion of macro =E2=80= =98readw=E2=80=99 tmp32 =3D (readw(pr_to32) & 0x0000ffff); ^~~~~ ./arch/arm/include/asm/io.h:25:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getw(a) (*(volatile unsigned short *)(a)) ^ ./arch/arm/include/asm/io.h:107:31: note: in expansion of macro =E2=80=98__= arch_getw=E2=80=99 #define readw(c) ({ u16 __v =3D __arch_getw(c); __iormb(); __v; }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:134:14: note: in expansion of macro =E2=80= =98readw=E2=80=99 tmp32 +=3D ((readw(pr_to32) & 0x0000ffff) << 16); ^~~~~ ./arch/arm/include/asm/io.h:26:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getl(a) (*(volatile unsigned int *)(a)) ^ ./arch/arm/include/asm/io.h:108:31: note: in expansion of macro =E2=80=98__= arch_getl=E2=80=99 #define readl(c) ({ u32 __v =3D __arch_getl(c); __iormb(); __v; }) ^~~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:135:16: note: in expansion of macro =E2=80= =98readl=E2=80=99 if (tmp32 !=3D readl(pr_from32)) { ^~~~~ In file included from include/linux/printk.h:4, from include/linux/kernel.h:5, from include/linux/bitops.h:22, from ./arch/arm/include/asm/arch/imx-regs.h:87, from include/configs/imx8m.h:11, from include/configs/imx8mm_venice.h:9, from include/config.h:4, from include/common.h:16, from drivers/ddr/imx/imx8m/helper.c:6: drivers/ddr/imx/imx8m/helper.c:136:10: warning: format =E2=80=98%lx=E2=80= =99 expects argument of type =E2=80=98long unsigned int=E2=80=99, but argument 2 has ty= pe =E2=80=98uint32_t=E2=80=99 {aka =E2=80=98unsigned in =E2=80=99} [-Wformat= =3D] debug("%lx %lx\n", pr_from32, pr_to32); ^~~~~~~~~~~ include/log.h:165:21: note: in definition of macro =E2=80=98pr_fmt=E2=80=99 #define pr_fmt(fmt) fmt ^~~ include/log.h:285:2: note: in expansion of macro =E2=80=98debug_cond=E2=80= =99 debug_cond(_DEBUG, fmt, ##args) ^~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:136:4: note: in expansion of macro =E2=80=98= debug=E2=80=99 debug("%lx %lx\n", pr_from32, pr_to32); ^~~~~ drivers/ddr/imx/imx8m/helper.c:136:10: warning: format =E2=80=98%lx=E2=80= =99 expects argument of type =E2=80=98long unsigned int=E2=80=99, but argument 3 has ty= pe =E2=80=98uint32_t=E2=80=99 {aka =E2=80=98unsigned in =E2=80=99} [-Wformat= =3D] debug("%lx %lx\n", pr_from32, pr_to32); ^~~~~~~~~~~ include/log.h:165:21: note: in definition of macro =E2=80=98pr_fmt=E2=80=99 #define pr_fmt(fmt) fmt ^~~ include/log.h:285:2: note: in expansion of macro =E2=80=98debug_cond=E2=80= =99 debug_cond(_DEBUG, fmt, ##args) ^~~~~~~~~~ drivers/ddr/imx/imx8m/helper.c:136:4: note: in expansion of macro =E2=80=98= debug=E2=80=99 debug("%lx %lx\n", pr_from32, pr_to32); ^~~~~ Best Regards, Tim