From mboxrd@z Thu Jan  1 00:00:00 1970
From: Tim Harvey <tharvey@gateworks.com>
Date: Thu, 17 Dec 2015 08:15:46 -0800
Subject: [U-Boot] [PATCH 1/2] arm: imx6: Add DDR3 calibration code for
	MX6 Q/D/DL
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On Thu, Dec 17, 2015 at 7:40 AM, Marek Vasut <marex@denx.de> wrote:
> On Thursday, December 17, 2015 at 04:36:20 PM, Tim Harvey wrote:
>> On Wed, Dec 16, 2015 at 6:40 AM, Marek Vasut <marex@denx.de> wrote:
>> > Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code
>> > fine-tunes the behavior of the MMDC controller in order to improve
>> > the signal integrity and memory stability.
>> >
>> > Signed-off-by: Marek Vasut <marex@denx.de>
>> > Cc: Stefano Babic <sbabic@denx.de>
>>
>> Marek,
>>
>> This is great - this would be a great addition to U-Boot IMX6 SPL.
>>
>> You must have forgotten to post a dependent patch that adds some of
>> the registers to mmdc_p_regs. If you can post that I can run this
>> through some testing.
>
> What exactly is missing please ? I am using this on Novena for a while
> without issues.

sorry my bad... forgot I was on an old branch. All is good.

I will run some boards with this through some stress testing and review.

Tim