From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D5134C433EF for ; Tue, 12 Apr 2022 10:18:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TaDIC6zEqankm5JxENPl0SY+dmAykUiaIxaCpaWh0ro=; b=nuV6jueAX4r9JW hDmxfDlSUzld1rod0M2sYZHGYixi6zksDfmXFiIdm/BvxxG3O5SBVkdiW+W+c/F1Pxybefcm9PEwc 2c1ZlCQQZl+tHVF7pvjEVZ+a5qjpHoTUt3XXq+JvF81GvYR5AcC5/gsIzkFSTH855KkTuXIUJ0pA+ F8adZjt8n0ks7gWEWaawS2gvQ8D110FSGmsf14+OBRMW/ByrdsJLNILSLfkmOomi1fRSoWrCheWgp IT4Q7m/qrIsIKkIta4/rIoC0Nn0slysY4L665sVEYbsDDQVkVUqX/F1y5UQJsUMFhts8ViL+qqVxM JLwSVbSZiVLEBWLS6naQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1neDaN-00DE8q-B3; Tue, 12 Apr 2022 10:17:23 +0000 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1neDaJ-00DE7C-Mn for linux-arm-kernel@lists.infradead.org; Tue, 12 Apr 2022 10:17:21 +0000 Received: by mail-wm1-x336.google.com with SMTP id h126-20020a1c2184000000b0038eb17fb7d6so1433743wmh.2 for ; Tue, 12 Apr 2022 03:17:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=FgjY7H1ZyME0qwy3R/u6paw0pnftya7ZX2HN8cgGzfA=; b=ne3w86K753pIjNk60LVZmDgZk8VZDfs/glLnxVo4/VjTxiJ6UUTFrdIqsVmpW2sL/o MTagu3acV1bPiyXknAH6hYt7apWs2Yrguz5IEXOA1kjzVU2QYLmyyGrdO+zWkcb5WwyA TmgzpPSGfITPJtjuphY0J81bzhOdlhsOQ6dfHZ/iFjoeidISUZdair1sW3IVK8BghOW0 jB2b2hRCF9JtEKU6vX1NspPynkxij9wXhxT01iP/NcRT5Si1var8squBmK+g0BY1cemh jEK8dRqXHKWFFF9Pv7qTmXE0tqTPo3VsiGGgo6pgzHDtaQX4FjEG8VL0ukEeGFSuX7T9 4PTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=FgjY7H1ZyME0qwy3R/u6paw0pnftya7ZX2HN8cgGzfA=; b=r0orpIJMEh7HDS9Yn98ouoyQejLrZkg+oFNiLUUOx89rAnC61A9BGLHhR3BIFZr97g YuKEJFZm5aXFCzYki9CIGm1W7eUA9oketcYDjiVzVBNy8PzjS4ZuyA7xNl6suqe+ZzMB UYgQ1XjCvH+ryzYrSP2L8nSFhU6tMfUeymIBTccwaNZ5xVJPHB2e9daRl6uZ6OiHmZDD WpR79HnIeAdLh1beXVGpbHUWL1pr9+ZNfubk7sJHWLtlCtwbTyI5E7ngU/yZ1TjsInD1 ifWkQGM8yMDbJjrU7eyO18njItbEjTdJhHAsKT87z2rQqXhkTz06buEBwr9L6lX1HGlu 266A== X-Gm-Message-State: AOAM5338nnRnLW6nRh74oNdLDZV7qlL0RIyCipVDNAFCs4btNVoA45O1 gshgN0VQk/RZmrtopH9wETj39wSuZEMJyBXOgHI8G46lx5H4bw== X-Google-Smtp-Source: ABdhPJxFEQ5ap88OFgjsOLJn9UFZkYYgmfWEoc8ZKgSxPxYiQjW5JyNj/W++bqErekphko+y61J+q4WmOuKQF2iY9nY= X-Received: by 2002:a05:600c:1c9c:b0:38e:3270:373d with SMTP id k28-20020a05600c1c9c00b0038e3270373dmr3340130wms.199.1649758635934; Tue, 12 Apr 2022 03:17:15 -0700 (PDT) MIME-Version: 1.0 References: <20220304171913.2292458-1-james.clark@arm.com> <20220304171913.2292458-11-james.clark@arm.com> In-Reply-To: <20220304171913.2292458-11-james.clark@arm.com> From: Mike Leach Date: Tue, 12 Apr 2022 11:17:04 +0100 Message-ID: Subject: Re: [PATCH v3 10/15] coresight: etm3x: Cleanup ETMTECR1 register accesses To: James Clark Cc: suzuki.poulose@arm.com, coresight@lists.linaro.org, Anshuman.Khandual@arm.com, mathieu.poirier@linaro.org, leo.yan@linaro.com, Leo Yan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220412_031719_760483_3DE9F1FF X-CRM114-Status: GOOD ( 18.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 4 Mar 2022 at 17:19, James Clark wrote: > > This is a no-op change for style and consistency and has no effect on > the binary output by the compiler. These fields already have macros > to define them so use them instead of magic numbers. > > Signed-off-by: James Clark > --- > drivers/hwtracing/coresight/coresight-etm3x-core.c | 2 +- > drivers/hwtracing/coresight/coresight-etm3x-sysfs.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c > index 7d413ba8b823..d0ab9933472b 100644 > --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c > @@ -204,7 +204,7 @@ void etm_set_default(struct etm_config *config) > * set all bits in register 0x007, the ETMTECR2, to 0 > * set register 0x008, the ETMTEEVR, to 0x6F (TRUE). > */ > - config->enable_ctrl1 = BIT(24); > + config->enable_ctrl1 = ETMTECR1_INC_EXC; > config->enable_ctrl2 = 0x0; > config->enable_event = ETM_HARD_WIRE_RES_A; > > diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c > index e8c7649f123e..68fcbf4ce7a8 100644 > --- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c > +++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c > @@ -474,7 +474,7 @@ static ssize_t addr_start_store(struct device *dev, > config->addr_val[idx] = val; > config->addr_type[idx] = ETM_ADDR_TYPE_START; > config->startstop_ctrl |= (1 << idx); > - config->enable_ctrl1 |= BIT(25); > + config->enable_ctrl1 |= ETMTECR1_START_STOP; > spin_unlock(&drvdata->spinlock); > > return size; > -- > 2.28.0 > Reviewed-by: Mike Leach -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4745CC433EF for ; Tue, 12 Apr 2022 11:41:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352222AbiDLLme (ORCPT ); Tue, 12 Apr 2022 07:42:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352425AbiDLLhs (ORCPT ); Tue, 12 Apr 2022 07:37:48 -0400 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FF851B0 for ; Tue, 12 Apr 2022 03:17:17 -0700 (PDT) Received: by mail-wm1-x32e.google.com with SMTP id r133-20020a1c448b000000b0038ccb70e239so1419371wma.3 for ; Tue, 12 Apr 2022 03:17:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=FgjY7H1ZyME0qwy3R/u6paw0pnftya7ZX2HN8cgGzfA=; b=ne3w86K753pIjNk60LVZmDgZk8VZDfs/glLnxVo4/VjTxiJ6UUTFrdIqsVmpW2sL/o MTagu3acV1bPiyXknAH6hYt7apWs2Yrguz5IEXOA1kjzVU2QYLmyyGrdO+zWkcb5WwyA TmgzpPSGfITPJtjuphY0J81bzhOdlhsOQ6dfHZ/iFjoeidISUZdair1sW3IVK8BghOW0 jB2b2hRCF9JtEKU6vX1NspPynkxij9wXhxT01iP/NcRT5Si1var8squBmK+g0BY1cemh jEK8dRqXHKWFFF9Pv7qTmXE0tqTPo3VsiGGgo6pgzHDtaQX4FjEG8VL0ukEeGFSuX7T9 4PTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=FgjY7H1ZyME0qwy3R/u6paw0pnftya7ZX2HN8cgGzfA=; b=m6hOAejj/GNaMxCI2tr4IiDxqLjjY4E9KkebMt3qyl9NIMVKkRehWNbC2LOUzdKPZk qkl5lPtYSm7E28X4SvC3KzI8iF6dOSg+moG2Wa90IJKtRm59z64rSV1JBa+XCbLU+vj6 TsJ+AhoCHf9ZELQ3F0UoJzbSKgxb/Z/J2ER/AlFrdaovAMTTyN5RcKIAN+alBPZEUHgN yNE9mQtPN5bjlzY6RUAomLHR8mpaB6jCozYgE2ibFoHjLJGgeoRSGz2gFJQum6B1lVBO u2ShSBw69ORqbkTmDx2+Pt0iMva+Z6l008jRjna+XRngZ1E9sOJsUxQ44zNfUXjh2QZk ociw== X-Gm-Message-State: AOAM532L1zvb+wiWcqbTrOHqiyC65xIyMWPT6vQIGvUDpsSm6S4aBlY4 Vb08ahVKKV8Saiu6KSvZznxN9p72eGh5gCBxTNjFRg== X-Google-Smtp-Source: ABdhPJxFEQ5ap88OFgjsOLJn9UFZkYYgmfWEoc8ZKgSxPxYiQjW5JyNj/W++bqErekphko+y61J+q4WmOuKQF2iY9nY= X-Received: by 2002:a05:600c:1c9c:b0:38e:3270:373d with SMTP id k28-20020a05600c1c9c00b0038e3270373dmr3340130wms.199.1649758635934; Tue, 12 Apr 2022 03:17:15 -0700 (PDT) MIME-Version: 1.0 References: <20220304171913.2292458-1-james.clark@arm.com> <20220304171913.2292458-11-james.clark@arm.com> In-Reply-To: <20220304171913.2292458-11-james.clark@arm.com> From: Mike Leach Date: Tue, 12 Apr 2022 11:17:04 +0100 Message-ID: Subject: Re: [PATCH v3 10/15] coresight: etm3x: Cleanup ETMTECR1 register accesses To: James Clark Cc: suzuki.poulose@arm.com, coresight@lists.linaro.org, Anshuman.Khandual@arm.com, mathieu.poirier@linaro.org, leo.yan@linaro.com, Leo Yan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 4 Mar 2022 at 17:19, James Clark wrote: > > This is a no-op change for style and consistency and has no effect on > the binary output by the compiler. These fields already have macros > to define them so use them instead of magic numbers. > > Signed-off-by: James Clark > --- > drivers/hwtracing/coresight/coresight-etm3x-core.c | 2 +- > drivers/hwtracing/coresight/coresight-etm3x-sysfs.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c > index 7d413ba8b823..d0ab9933472b 100644 > --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c > @@ -204,7 +204,7 @@ void etm_set_default(struct etm_config *config) > * set all bits in register 0x007, the ETMTECR2, to 0 > * set register 0x008, the ETMTEEVR, to 0x6F (TRUE). > */ > - config->enable_ctrl1 = BIT(24); > + config->enable_ctrl1 = ETMTECR1_INC_EXC; > config->enable_ctrl2 = 0x0; > config->enable_event = ETM_HARD_WIRE_RES_A; > > diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c > index e8c7649f123e..68fcbf4ce7a8 100644 > --- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c > +++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c > @@ -474,7 +474,7 @@ static ssize_t addr_start_store(struct device *dev, > config->addr_val[idx] = val; > config->addr_type[idx] = ETM_ADDR_TYPE_START; > config->startstop_ctrl |= (1 << idx); > - config->enable_ctrl1 |= BIT(25); > + config->enable_ctrl1 |= ETMTECR1_START_STOP; > spin_unlock(&drvdata->spinlock); > > return size; > -- > 2.28.0 > Reviewed-by: Mike Leach -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK