From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 301ABC433E9 for ; Mon, 11 Jan 2021 16:23:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E53CA22A83 for ; Mon, 11 Jan 2021 16:23:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388733AbhAKQXd (ORCPT ); Mon, 11 Jan 2021 11:23:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731405AbhAKQXc (ORCPT ); Mon, 11 Jan 2021 11:23:32 -0500 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1F44C061795 for ; Mon, 11 Jan 2021 08:22:51 -0800 (PST) Received: by mail-wr1-x433.google.com with SMTP id t30so415448wrb.0 for ; Mon, 11 Jan 2021 08:22:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=0gwQH6dtzsCy0fjQ/z11MBCBLa3D12iPspZ6VAfJeoA=; b=uYcqJwcLzshcKsQam0fUoCPbBq99OHpRgeQ7eC9tN7owwXHrcUuq9QCgxefFgn+TGO Xl9l73pSVU+uIw0tKDTaqCc8Uo+FnNwbw3etnCmT+DtC+s1bDFA3bWU7/VSByuUR2LVe 5oGyTvaFSMcljxhWQGKxXxZjk1jOyQGeTlaj/8hFIEn4wtu/j6HO8x/z86ZKEdgJsCtj NYHyxO8TN/I0RWGiL0a3VIfwsCLU5KJ2QIwuPeqd4AQiaT4KUSJdXY8A2CKPKsfANRxe 9FAoSsFtJvhiy2T7kV2z5LDpESQlJ6dH3PPVnr2nJEhfPh2XNR+CqYwIMwgZFrlmOsXw j8dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=0gwQH6dtzsCy0fjQ/z11MBCBLa3D12iPspZ6VAfJeoA=; b=Bf0uLjGE68BJlmGLwAgybiK9ryR+9gGx3xlQ0lYqS8RcDTPyVvoQEdXQODvljlF+7h AQWp4wivU2wnjMh2aI6d2sXt0NDZXS0j1cS5J84Rty/tgn3X95eQbTG811qm9ozzmmlq JQ/NJZKTWKHkcHnFuxzyxm4JpSccndL14/86T68VAvOixsm9u5iliut3DmbkDCa564R9 bLjn0lDyLvVvaJ4KdAaU7/vMeYbkrgwCalKlthEIjs29+8ain+9E2uO2IT3fbWR8STk3 7j13fgRoXaK+0HVPONFaRtWsnhbIJHtdO+T0vcMpyFpwz2eyZ6Yi8r5ZRL+zBmrY2lvQ 48ig== X-Gm-Message-State: AOAM531RvmgXiGQ0m0/+wg8pQn0xkYSBUtM+29bhFKDuWmmWUJp2xRC8 DQVKEytsTKh/yX9XJQnbuVEc3HC8jxsh0Wgc/NPWaw== X-Google-Smtp-Source: ABdhPJxlSpdfwpazOxBawRiWOItqIjORYiPJRS5XT4CBdZIHGGqMAjuI3c2hwCPmiIV+OyuSU7t1WnZa05fL/Jsm13M= X-Received: by 2002:a5d:6cad:: with SMTP id a13mr16661832wra.275.1610382170314; Mon, 11 Jan 2021 08:22:50 -0800 (PST) MIME-Version: 1.0 References: <20210109074435.626855-1-leo.yan@linaro.org> <20210109074435.626855-2-leo.yan@linaro.org> In-Reply-To: <20210109074435.626855-2-leo.yan@linaro.org> From: Mike Leach Date: Mon, 11 Jan 2021 16:22:39 +0000 Message-ID: Subject: Re: [PATCH v1 1/7] coresight: etm-perf: Add support for PID tracing for kernel at EL2 To: Leo Yan Cc: Arnaldo Carvalho de Melo , Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , John Garry , Will Deacon , Peter Zijlstra , Ingo Molnar , Mark Rutland , Jiri Olsa , Namhyung Kim , Daniel Kiss , Denis Nikitin , Coresight ML , linux-arm-kernel , Linux Kernel Mailing List , Al Grant Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Leo, On Sat, 9 Jan 2021 at 07:44, Leo Yan wrote: > > From: Suzuki K Poulose > > When the kernel is running at EL2, the PID is stored in CONTEXTIDR_EL2. > So, tracing CONTEXTIDR_EL1 doesn't give us the pid of the process. > Thus we should trace the VMID with VMIDOPT set to trace > CONTEXTIDR_EL2 instead of CONTEXTIDR_EL1. Given that we have an existing > config option "contextid" and this will be useful for tracing > virtual machines (when we get to support virtualization). So instead, > this patch adds a new option, contextid_in_vmid as a separate config. > Thus on an EL2 kernel, we will have two options available for > the perf tool. However, to make it easier for the user to > do pid tracing, we add a new format which will default to > "contextid" (on EL1 kernel) or "contextid_in_vmid" (on EL2 > kernel). So that the user doesn't have to bother which EL the > kernel is running. > > i.e, perf record -e cs_etm/pid/u -- > > will always do the "pid" tracing, independent of the kernel EL. > > Also, the perf tool will be updated to automatically select > "pid" config instead of the "contextid" for system wide/CPU wide > mode. > > Cc: Mathieu Poirier > Cc: Al Grant > Cc: Mike Leach > Signed-off-by: Suzuki K Poulose > Signed-off-by: Leo Yan > --- > drivers/hwtracing/coresight/coresight-etm-perf.c | 14 ++++++++++++++ > drivers/hwtracing/coresight/coresight-etm4x-core.c | 9 +++++++++ > include/linux/coresight-pmu.h | 11 +++++++---- > 3 files changed, 30 insertions(+), 4 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c > index bdc34ca449f7..f763def145e4 100644 > --- a/drivers/hwtracing/coresight/coresight-etm-perf.c > +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c > @@ -30,14 +30,28 @@ static DEFINE_PER_CPU(struct coresight_device *, csdev_src); > /* ETMv3.5/PTM's ETMCR is 'config' */ > PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC)); > PMU_FORMAT_ATTR(contextid, "config:" __stringify(ETM_OPT_CTXTID)); > +PMU_FORMAT_ATTR(contextid_in_vmid, "config:" __stringify(ETM_OPT_CTXTID_IN_VMID)); > PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS)); > PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK)); > /* Sink ID - same for all ETMs */ > PMU_FORMAT_ATTR(sinkid, "config2:0-31"); > > +static ssize_t format_attr_pid_show(struct device *dev, > + struct device_attribute *attr, > + char *page) > +{ > + int pid_fmt = is_kernel_in_hyp_mode() ? ETM_OPT_CTXTID_IN_VMID : ETM_OPT_CTXTID; > + > + return sprintf(page, "config:%d\n", pid_fmt); > +} > + > +struct device_attribute format_attr_pid = __ATTR(pid, 0444, format_attr_pid_show, NULL); > + > static struct attribute *etm_config_formats_attr[] = { > &format_attr_cycacc.attr, > &format_attr_contextid.attr, > + &format_attr_contextid_in_vmid.attr, > + &format_attr_pid.attr, > &format_attr_timestamp.attr, > &format_attr_retstack.attr, > &format_attr_sinkid.attr, > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index b20b6ff17cf6..8b7c7a8b2874 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -477,6 +477,15 @@ static int etm4_parse_event_config(struct etmv4_drvdata *drvdata, > /* bit[6], Context ID tracing bit */ > config->cfg |= BIT(ETM4_CFG_BIT_CTXTID); > > + /* Do not enable VMID tracing if we are not running in EL2 */ > + if (attr->config & BIT(ETM_OPT_CTXTID_IN_VMID)) { > + if (!is_kernel_in_hyp_mode()) { > + ret = -EINVAL; > + goto out; > + } > + config->cfg |= BIT(ETM4_CFG_BIT_VMID) | BIT(ETM4_CFG_BIT_VMID_OPT); > + } > + > /* return stack - enable if selected and supported */ > if ((attr->config & BIT(ETM_OPT_RETSTK)) && drvdata->retstack) > /* bit[12], Return stack enable bit */ > diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h > index b0e35eec6499..927c6285ce5d 100644 > --- a/include/linux/coresight-pmu.h > +++ b/include/linux/coresight-pmu.h > @@ -11,16 +11,19 @@ > #define CORESIGHT_ETM_PMU_SEED 0x10 > > /* ETMv3.5/PTM's ETMCR config bit */ > -#define ETM_OPT_CYCACC 12 > -#define ETM_OPT_CTXTID 14 > -#define ETM_OPT_TS 28 > -#define ETM_OPT_RETSTK 29 > +#define ETM_OPT_CYCACC 12 > +#define ETM_OPT_CTXTID 14 > +#define ETM_OPT_CTXTID_IN_VMID 15 Minor issue here - ETMv3.x / PTM cannot trace CXTID in VMID so this may better be named ETM4_OPT_CTXTID_IN_VMID, rather than be grouped with the ETM3.5 options? Regards Mike > +#define ETM_OPT_TS 28 > +#define ETM_OPT_RETSTK 29 > > /* ETMv4 CONFIGR programming bits for the ETM OPTs */ > #define ETM4_CFG_BIT_CYCACC 4 > #define ETM4_CFG_BIT_CTXTID 6 > +#define ETM4_CFG_BIT_VMID 7 > #define ETM4_CFG_BIT_TS 11 > #define ETM4_CFG_BIT_RETSTK 12 > +#define ETM4_CFG_BIT_VMID_OPT 15 > > static inline int coresight_get_trace_id(int cpu) > { > -- > 2.25.1 > -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=0gwQH6dtzsCy0fjQ/z11MBCBLa3D12iPspZ6VAfJeoA=; b=la4q/QhoMfDTRLTU31I7sQoN1i1MwISNNwlYt0UlGnOs+prordgNQ+QA1UgOXoax0z AIpcn7zarEnjfwZ36wz8sYjHdadeKpLAiJcGP+kQLSBt5wdB2hkJwx93O4XoCbhgctyH VMtq9LPnfFLoH4KHxVHCNj0hkAkoTO+xorQKiJonee4N8TE1yMvYj1+daMaRo9HOtDh7 GGcNOWifrvzU6DVnYxu4tuPQ995pS25hWmYbfP3QSCJ36SYnTLJFgQRssTqUIs/JANCu sXKqeuIuCHBDSeLfh7l2R3wBmxOOuBjBUArPVRUbBEWdpju/G/cD13KjMcd5U7nBJsN5 lPaw== X-Gm-Message-State: AOAM5310ijaXWPY3TtglsFrorghdr69N0QucldBJlqh2R6FNXcYAhP2u 41t4JTACM49fumZfSEbCy0UNkTD1Wk0cIfHPVpX95UjAypE= X-Google-Smtp-Source: ABdhPJxlSpdfwpazOxBawRiWOItqIjORYiPJRS5XT4CBdZIHGGqMAjuI3c2hwCPmiIV+OyuSU7t1WnZa05fL/Jsm13M= X-Received: by 2002:a5d:6cad:: with SMTP id a13mr16661832wra.275.1610382170314; Mon, 11 Jan 2021 08:22:50 -0800 (PST) MIME-Version: 1.0 References: <20210109074435.626855-1-leo.yan@linaro.org> <20210109074435.626855-2-leo.yan@linaro.org> In-Reply-To: <20210109074435.626855-2-leo.yan@linaro.org> From: Mike Leach Date: Mon, 11 Jan 2021 16:22:39 +0000 Message-ID: Subject: Re: [PATCH v1 1/7] coresight: etm-perf: Add support for PID tracing for kernel at EL2 To: Leo Yan X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210111_112252_125768_74E0ABC4 X-CRM114-Status: GOOD ( 30.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Al Grant , Denis Nikitin , Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , Jiri Olsa , Coresight ML , John Garry , Linux Kernel Mailing List , Arnaldo Carvalho de Melo , Peter Zijlstra , Ingo Molnar , Namhyung Kim , Will Deacon , linux-arm-kernel , Daniel Kiss Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Leo, On Sat, 9 Jan 2021 at 07:44, Leo Yan wrote: > > From: Suzuki K Poulose > > When the kernel is running at EL2, the PID is stored in CONTEXTIDR_EL2. > So, tracing CONTEXTIDR_EL1 doesn't give us the pid of the process. > Thus we should trace the VMID with VMIDOPT set to trace > CONTEXTIDR_EL2 instead of CONTEXTIDR_EL1. Given that we have an existing > config option "contextid" and this will be useful for tracing > virtual machines (when we get to support virtualization). So instead, > this patch adds a new option, contextid_in_vmid as a separate config. > Thus on an EL2 kernel, we will have two options available for > the perf tool. However, to make it easier for the user to > do pid tracing, we add a new format which will default to > "contextid" (on EL1 kernel) or "contextid_in_vmid" (on EL2 > kernel). So that the user doesn't have to bother which EL the > kernel is running. > > i.e, perf record -e cs_etm/pid/u -- > > will always do the "pid" tracing, independent of the kernel EL. > > Also, the perf tool will be updated to automatically select > "pid" config instead of the "contextid" for system wide/CPU wide > mode. > > Cc: Mathieu Poirier > Cc: Al Grant > Cc: Mike Leach > Signed-off-by: Suzuki K Poulose > Signed-off-by: Leo Yan > --- > drivers/hwtracing/coresight/coresight-etm-perf.c | 14 ++++++++++++++ > drivers/hwtracing/coresight/coresight-etm4x-core.c | 9 +++++++++ > include/linux/coresight-pmu.h | 11 +++++++---- > 3 files changed, 30 insertions(+), 4 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c > index bdc34ca449f7..f763def145e4 100644 > --- a/drivers/hwtracing/coresight/coresight-etm-perf.c > +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c > @@ -30,14 +30,28 @@ static DEFINE_PER_CPU(struct coresight_device *, csdev_src); > /* ETMv3.5/PTM's ETMCR is 'config' */ > PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC)); > PMU_FORMAT_ATTR(contextid, "config:" __stringify(ETM_OPT_CTXTID)); > +PMU_FORMAT_ATTR(contextid_in_vmid, "config:" __stringify(ETM_OPT_CTXTID_IN_VMID)); > PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS)); > PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK)); > /* Sink ID - same for all ETMs */ > PMU_FORMAT_ATTR(sinkid, "config2:0-31"); > > +static ssize_t format_attr_pid_show(struct device *dev, > + struct device_attribute *attr, > + char *page) > +{ > + int pid_fmt = is_kernel_in_hyp_mode() ? ETM_OPT_CTXTID_IN_VMID : ETM_OPT_CTXTID; > + > + return sprintf(page, "config:%d\n", pid_fmt); > +} > + > +struct device_attribute format_attr_pid = __ATTR(pid, 0444, format_attr_pid_show, NULL); > + > static struct attribute *etm_config_formats_attr[] = { > &format_attr_cycacc.attr, > &format_attr_contextid.attr, > + &format_attr_contextid_in_vmid.attr, > + &format_attr_pid.attr, > &format_attr_timestamp.attr, > &format_attr_retstack.attr, > &format_attr_sinkid.attr, > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index b20b6ff17cf6..8b7c7a8b2874 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -477,6 +477,15 @@ static int etm4_parse_event_config(struct etmv4_drvdata *drvdata, > /* bit[6], Context ID tracing bit */ > config->cfg |= BIT(ETM4_CFG_BIT_CTXTID); > > + /* Do not enable VMID tracing if we are not running in EL2 */ > + if (attr->config & BIT(ETM_OPT_CTXTID_IN_VMID)) { > + if (!is_kernel_in_hyp_mode()) { > + ret = -EINVAL; > + goto out; > + } > + config->cfg |= BIT(ETM4_CFG_BIT_VMID) | BIT(ETM4_CFG_BIT_VMID_OPT); > + } > + > /* return stack - enable if selected and supported */ > if ((attr->config & BIT(ETM_OPT_RETSTK)) && drvdata->retstack) > /* bit[12], Return stack enable bit */ > diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h > index b0e35eec6499..927c6285ce5d 100644 > --- a/include/linux/coresight-pmu.h > +++ b/include/linux/coresight-pmu.h > @@ -11,16 +11,19 @@ > #define CORESIGHT_ETM_PMU_SEED 0x10 > > /* ETMv3.5/PTM's ETMCR config bit */ > -#define ETM_OPT_CYCACC 12 > -#define ETM_OPT_CTXTID 14 > -#define ETM_OPT_TS 28 > -#define ETM_OPT_RETSTK 29 > +#define ETM_OPT_CYCACC 12 > +#define ETM_OPT_CTXTID 14 > +#define ETM_OPT_CTXTID_IN_VMID 15 Minor issue here - ETMv3.x / PTM cannot trace CXTID in VMID so this may better be named ETM4_OPT_CTXTID_IN_VMID, rather than be grouped with the ETM3.5 options? Regards Mike > +#define ETM_OPT_TS 28 > +#define ETM_OPT_RETSTK 29 > > /* ETMv4 CONFIGR programming bits for the ETM OPTs */ > #define ETM4_CFG_BIT_CYCACC 4 > #define ETM4_CFG_BIT_CTXTID 6 > +#define ETM4_CFG_BIT_VMID 7 > #define ETM4_CFG_BIT_TS 11 > #define ETM4_CFG_BIT_RETSTK 12 > +#define ETM4_CFG_BIT_VMID_OPT 15 > > static inline int coresight_get_trace_id(int cpu) > { > -- > 2.25.1 > -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel