From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A20FC433EF for ; Fri, 18 Feb 2022 16:10:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237493AbiBRQKs (ORCPT ); Fri, 18 Feb 2022 11:10:48 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:48076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237507AbiBRQKq (ORCPT ); Fri, 18 Feb 2022 11:10:46 -0500 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 408D7107D22 for ; Fri, 18 Feb 2022 08:10:29 -0800 (PST) Received: by mail-wr1-x429.google.com with SMTP id u1so15364240wrg.11 for ; Fri, 18 Feb 2022 08:10:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=mksSfWyE4AgHu3cecrzistClTS4cZGtWRnbiCsAgXHU=; b=UQk9R7B/GVCAbhqSzFCLT4eQ9jDsoMBN/C/2eQjWaC/doTQr/cB9NACZk/P9r/hicH 7cxjGSsMaQUCcFfo0uFqOOWdpM2VJ+kZWSooFi+/HhM1bCZsRrpqnmJ3Qh3FlAQVVZBi b2EBi+YBXz/ba2r9ssjHSP5Gmx4CwHmjVZCaeyITYvmug+k+AkvJEXBgS1zrK9eL8Yrq qME2/GZ1U2+pTMW11O95d0i7ELN0jR62SUQ1zB4/DgqpgzKwF72WN2uc8c61+WTKEP3H q7qU0cQ3bgvKCeKTqYLCeqz7TRJNpYTHmGmqRg5lCzeQAWd/pSlo9hriS4r3dSfrZuUP MQVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=mksSfWyE4AgHu3cecrzistClTS4cZGtWRnbiCsAgXHU=; b=5Lca3YCB4RgpTC3kAR2vbpc4UYR9nyQcUOXN1d4RILjJ7gAW/+VHRfUMY5CVB9FMb/ AIRakOeJ98js8ayJO1P1pFRI2MShGSotzupP4JU+eVrz5dk/3t8UhONHmx+WhhejxOSK lwJGHkTMj3Fxxlc6kTqQAn18q9xJLGL5+MjOEx9tWGDkrFojpwy5Sd7h0Z5kAvAkFgxp nuHNoKXLuC66vJ0zbDkqxE4UW69LCNkyMN1S7eluxW2+f3k1djunPmm+aCLBNpi/ylIs HeWzLU/oyKQe5726NDV4t76FRwXX4qWgVjq4PJP0TNXJtwzBzwSFRS6xlNjNQYC0cY/A +jEg== X-Gm-Message-State: AOAM532+HJkxhVWualWzRSNe2Xq3bDGBbj+HFKOUo/Ja4yT7eiqmHN6P 52NsW3nSDwCMUrHBtbmXMJmTqnTXVVMSo6Gz58k4tg== X-Google-Smtp-Source: ABdhPJxSKsbxiIZwVoO3YP1pa0P5/veOsZtSe1n4t1m6YKrfDXsZHkJhQAL94UQmL9tqJfUGqE9ZIOlygsGppBkje7Y= X-Received: by 2002:a5d:4e50:0:b0:1e3:c2c:979f with SMTP id r16-20020a5d4e50000000b001e30c2c979fmr6679547wrt.699.1645200627697; Fri, 18 Feb 2022 08:10:27 -0800 (PST) MIME-Version: 1.0 References: <20220209105706.18852-1-quic_jinlmao@quicinc.com> <20220209105706.18852-4-quic_jinlmao@quicinc.com> In-Reply-To: <20220209105706.18852-4-quic_jinlmao@quicinc.com> From: Mike Leach Date: Fri, 18 Feb 2022 16:10:16 +0000 Message-ID: Subject: Re: [PATCH v3 03/10] Coresight: Add coresight TPDM source driver To: Mao Jinlong Cc: Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , Leo Yan , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Trilok Soni , Hao Zhang , linux-arm-msm@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org HI, On Wed, 9 Feb 2022 at 10:57, Mao Jinlong wrote: > > Add driver to support Coresight device TPDM (Trace, Profiling and > Diagnostics Monitor). TPDM is a monitor to collect data from > different datasets. This change is to add probe/enable/disable > functions for tpdm source. > > Signed-off-by: Tao Zhang > Signed-off-by: Mao Jinlong > --- > drivers/hwtracing/coresight/Kconfig | 13 ++ > drivers/hwtracing/coresight/Makefile | 1 + > drivers/hwtracing/coresight/coresight-core.c | 3 +- > drivers/hwtracing/coresight/coresight-tpdm.c | 159 +++++++++++++++++++ > drivers/hwtracing/coresight/coresight-tpdm.h | 28 ++++ > include/linux/coresight.h | 1 + > 6 files changed, 204 insertions(+), 1 deletion(-) > create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c > create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h > > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig > index 514a9b8086e3..5c506a1cd08f 100644 > --- a/drivers/hwtracing/coresight/Kconfig > +++ b/drivers/hwtracing/coresight/Kconfig > @@ -201,4 +201,17 @@ config CORESIGHT_TRBE > > To compile this driver as a module, choose M here: the module will be > called coresight-trbe. > + > +config CORESIGHT_TPDM > + tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver" > + select CORESIGHT_LINKS_AND_SINKS > + help > + This driver provides support for configuring monitor. Monitors are > + primarily responsible for data set collection and support the > + ability to collect any permutation of data set types. Monitors are > + also responsible for interaction with system cross triggering. > + > + To compile this driver as a module, choose M here: the module will be > + called coresight-tpdm. > + > endif > diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile > index b6c4a48140ec..e7392a0dddeb 100644 > --- a/drivers/hwtracing/coresight/Makefile > +++ b/drivers/hwtracing/coresight/Makefile > @@ -25,5 +25,6 @@ obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o > obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o > obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o > obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o > +obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o > coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ > coresight-cti-sysfs.o > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 6cb55c3f41d5..b56826d9a2b3 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -1117,7 +1117,8 @@ static int coresight_validate_source(struct coresight_device *csdev, > } > > if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && > - subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) { > + subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE && > + subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SYS) { > dev_err(&csdev->dev, "wrong device subtype in %s\n", function); > return -EINVAL; > } > diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c > new file mode 100644 > index 000000000000..51b8b17e6a80 > --- /dev/null > +++ b/drivers/hwtracing/coresight/coresight-tpdm.c > @@ -0,0 +1,159 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "coresight-priv.h" > +#include "coresight-tpdm.h" > + > +DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm"); > + > +/* TPDM enable operations */ > +static int tpdm_enable(struct coresight_device *csdev, > + struct perf_event *event, u32 mode) > +{ > + struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + mutex_lock(&drvdata->lock); > + if (drvdata->enable) { > + mutex_unlock(&drvdata->lock); > + return -EBUSY; > + } > + > + drvdata->enable = true; > + mutex_unlock(&drvdata->lock); > + > + dev_info(drvdata->dev, "TPDM tracing enabled\n"); > + return 0; > +} > + > +/* TPDM disable operations */ > +static void tpdm_disable(struct coresight_device *csdev, > + struct perf_event *event) > +{ > + struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + mutex_lock(&drvdata->lock); > + if (!drvdata->enable) { > + mutex_unlock(&drvdata->lock); > + return; > + } > + > + drvdata->enable = false; > + mutex_unlock(&drvdata->lock); > + > + dev_info(drvdata->dev, "TPDM tracing disabled\n"); > +} > + > +static int tpdm_trace_id(struct coresight_device *csdev) > +{ > + struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + return drvdata->traceid; > +} > + > +static const struct coresight_ops_source tpdm_source_ops = { > + .trace_id = tpdm_trace_id, > + .enable = tpdm_enable, > + .disable = tpdm_disable, > +}; > + > +static const struct coresight_ops tpdm_cs_ops = { > + .source_ops = &tpdm_source_ops, > +}; > + > +static void tpdm_init_default_data(struct tpdm_drvdata *drvdata) > +{ > + drvdata->traceid = coresight_get_system_trace_id(); > +} > + > +static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) > +{ > + struct device *dev = &adev->dev; > + struct coresight_platform_data *pdata; > + struct tpdm_drvdata *drvdata; > + struct coresight_desc desc = { 0 }; > + > + pdata = coresight_get_platform_data(dev); > + if (IS_ERR(pdata)) > + return PTR_ERR(pdata); > + adev->dev.platform_data = pdata; > + > + /* driver data*/ > + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); > + if (!drvdata) > + return -ENOMEM; > + drvdata->dev = &adev->dev; > + dev_set_drvdata(dev, drvdata); > + > + drvdata->base = devm_ioremap_resource(dev, &adev->res); > + if (!drvdata->base) > + return -ENOMEM; > + > + mutex_init(&drvdata->lock); > + tpdm_init_default_data(drvdata); > + > + /* Set up coresight component description */ > + desc.name = coresight_alloc_device_name(&tpdm_devs, dev); > + if (!desc.name) > + return -ENOMEM; > + desc.type = CORESIGHT_DEV_TYPE_SOURCE; > + desc.subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_SYS; > + desc.ops = &tpdm_cs_ops; > + desc.pdata = adev->dev.platform_data; > + desc.dev = &adev->dev; > + drvdata->csdev = coresight_register(&desc); > + if (IS_ERR(drvdata->csdev)) > + return PTR_ERR(drvdata->csdev); > + > + /* Decrease pm refcount when probe is done.*/ > + pm_runtime_put(&adev->dev); > + > + return 0; > +} > + > +static void __exit tpdm_remove(struct amba_device *adev) > +{ > + struct tpdm_drvdata *drvdata = dev_get_drvdata(&adev->dev); > + > + coresight_unregister(drvdata->csdev); > +} > + > +/* > + * Different TPDM has different periph id. > + * The difference is 0-7 bits' value. So ignore 0-7 bits. > + */ > +static struct amba_id tpdm_ids[] = { > + { > + .id = 0x000f0e00, > + .mask = 0x000fff00, > + }, > + { 0, 0}, > +}; > + > +static struct amba_driver tpdm_driver = { > + .drv = { > + .name = "coresight-tpdm", > + .owner = THIS_MODULE, > + .suppress_bind_attrs = true, > + }, > + .probe = tpdm_probe, > + .id_table = tpdm_ids, > +}; > + > +module_amba_driver(tpdm_driver); > + > +MODULE_LICENSE("GPL v2"); > +MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Monitor driver"); > diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h > new file mode 100644 > index 000000000000..2effbabf349b > --- /dev/null > +++ b/drivers/hwtracing/coresight/coresight-tpdm.h > @@ -0,0 +1,28 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#ifndef _CORESIGHT_CORESIGHT_TPDM_H > +#define _CORESIGHT_CORESIGHT_TPDM_H > + > +/** > + * struct tpdm_drvdata - specifics associated to an TPDM component > + * @base: memory mapped base address for this component. > + * @dev: The device entity associated to this component. > + * @csdev: component vitals needed by the framework. > + * @lock: lock for the enable value. > + * @enable: enable status of the component. > + * @traceid: value of the current ID for this component. > + */ > + > +struct tpdm_drvdata { > + void __iomem *base; > + struct device *dev; > + struct coresight_device *csdev; > + struct mutex lock; > + bool enable; > + int traceid; TraceID appears to have no purpose in the hardware and does not apparently drive onto the ATB - ATID signals from this device. This should be dropped and the core code fixed to allow for sources that have no trace id. Regards Mike > +}; > + > +#endif /* _CORESIGHT_CORESIGHT_TPDM_H */ > diff --git a/include/linux/coresight.h b/include/linux/coresight.h > index 93a2922b7653..e48d463be63b 100644 > --- a/include/linux/coresight.h > +++ b/include/linux/coresight.h > @@ -65,6 +65,7 @@ enum coresight_dev_subtype_source { > CORESIGHT_DEV_SUBTYPE_SOURCE_PROC, > CORESIGHT_DEV_SUBTYPE_SOURCE_BUS, > CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE, > + CORESIGHT_DEV_SUBTYPE_SOURCE_SYS, > }; > > enum coresight_dev_subtype_helper { > -- > 2.17.1 > -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A664C433FE for ; Fri, 18 Feb 2022 16:11:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wXyRLSZk1tHdonSgrGJZ9DWCQ33DlsBZE2L6bHgUFzs=; b=k2lgORnu90Sq+T X5u99qNOVZT9vnOoJrc3jTHVbf5m+Xg3pqzhTkOa5uAIrQgGCh3x9FuO8OpsKV7nBijbBmw9dDgVQ omxs/K+DMECqQET0tjiysRBU7BAOXw+WeGNO4ubgzwQabDsJ/83wlE1NZ0RVVP7XnP9x5cQjkZ6/s GZ5w9XvaDEv3GLAgPqji/EkAvW38uqxKDiitH4of1P4XfMWhakAseomT2Tl7kLWgv9wKaM0vQkpdw 26USdchYkDm/ARqe1NSX23p2LBskXx6HD79irwqin97wk9nkaZBjSopH57rOxle7L8aUfCu94KEby B6QFH7H4o5XzjcaYco9A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nL5q5-00FF2i-Sy; Fri, 18 Feb 2022 16:10:34 +0000 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nL5q2-00FF1n-Bi for linux-arm-kernel@lists.infradead.org; Fri, 18 Feb 2022 16:10:32 +0000 Received: by mail-wr1-x432.google.com with SMTP id d27so15389934wrc.6 for ; Fri, 18 Feb 2022 08:10:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=mksSfWyE4AgHu3cecrzistClTS4cZGtWRnbiCsAgXHU=; b=UQk9R7B/GVCAbhqSzFCLT4eQ9jDsoMBN/C/2eQjWaC/doTQr/cB9NACZk/P9r/hicH 7cxjGSsMaQUCcFfo0uFqOOWdpM2VJ+kZWSooFi+/HhM1bCZsRrpqnmJ3Qh3FlAQVVZBi b2EBi+YBXz/ba2r9ssjHSP5Gmx4CwHmjVZCaeyITYvmug+k+AkvJEXBgS1zrK9eL8Yrq qME2/GZ1U2+pTMW11O95d0i7ELN0jR62SUQ1zB4/DgqpgzKwF72WN2uc8c61+WTKEP3H q7qU0cQ3bgvKCeKTqYLCeqz7TRJNpYTHmGmqRg5lCzeQAWd/pSlo9hriS4r3dSfrZuUP MQVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=mksSfWyE4AgHu3cecrzistClTS4cZGtWRnbiCsAgXHU=; b=plimsIWB81rIHAiyfqzEEXQJe6Y+c9GQvI9OOv46Ucep7UJ8+LSDyhi0Ym9DY5NIXb YR0K/9w6mGnFsuNvnPmTwJWqKfZ8+gvQbAvYnp7ZPoZXU4Pgk1hz97941y+eA2q6gZ9o dDaSg4XscwGptKi1PJnK2eYU2SsmpB0i0mUYDIG+6DZKTwdQwlXvaSOZm34TMfsKBZsv p4Cno5bTpQg0CxCU0O9CYd3Tk0vZSg29021Fsnc3dekhRdYbvQbqrduhRxulaivgzxCE zOs/KcTOeUauuO9EB5CWyeEPtgygneHHUJ7que5tO9t6huq5RPJ5jnRoBxhYWH95NAg8 hnBA== X-Gm-Message-State: AOAM533TpxxHrPxHcBv7CoDU9/hnniUu3XMEjY5h7/PI60bWVvmJzurw 2OGiuMsJ371w6HY47JnH0EotcU0TrrYjaVQDTwWI9Q== X-Google-Smtp-Source: ABdhPJxSKsbxiIZwVoO3YP1pa0P5/veOsZtSe1n4t1m6YKrfDXsZHkJhQAL94UQmL9tqJfUGqE9ZIOlygsGppBkje7Y= X-Received: by 2002:a5d:4e50:0:b0:1e3:c2c:979f with SMTP id r16-20020a5d4e50000000b001e30c2c979fmr6679547wrt.699.1645200627697; Fri, 18 Feb 2022 08:10:27 -0800 (PST) MIME-Version: 1.0 References: <20220209105706.18852-1-quic_jinlmao@quicinc.com> <20220209105706.18852-4-quic_jinlmao@quicinc.com> In-Reply-To: <20220209105706.18852-4-quic_jinlmao@quicinc.com> From: Mike Leach Date: Fri, 18 Feb 2022 16:10:16 +0000 Message-ID: Subject: Re: [PATCH v3 03/10] Coresight: Add coresight TPDM source driver To: Mao Jinlong Cc: Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , Leo Yan , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Trilok Soni , Hao Zhang , linux-arm-msm@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220218_081030_465729_90BB2D8A X-CRM114-Status: GOOD ( 35.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org HI, On Wed, 9 Feb 2022 at 10:57, Mao Jinlong wrote: > > Add driver to support Coresight device TPDM (Trace, Profiling and > Diagnostics Monitor). TPDM is a monitor to collect data from > different datasets. This change is to add probe/enable/disable > functions for tpdm source. > > Signed-off-by: Tao Zhang > Signed-off-by: Mao Jinlong > --- > drivers/hwtracing/coresight/Kconfig | 13 ++ > drivers/hwtracing/coresight/Makefile | 1 + > drivers/hwtracing/coresight/coresight-core.c | 3 +- > drivers/hwtracing/coresight/coresight-tpdm.c | 159 +++++++++++++++++++ > drivers/hwtracing/coresight/coresight-tpdm.h | 28 ++++ > include/linux/coresight.h | 1 + > 6 files changed, 204 insertions(+), 1 deletion(-) > create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c > create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h > > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig > index 514a9b8086e3..5c506a1cd08f 100644 > --- a/drivers/hwtracing/coresight/Kconfig > +++ b/drivers/hwtracing/coresight/Kconfig > @@ -201,4 +201,17 @@ config CORESIGHT_TRBE > > To compile this driver as a module, choose M here: the module will be > called coresight-trbe. > + > +config CORESIGHT_TPDM > + tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver" > + select CORESIGHT_LINKS_AND_SINKS > + help > + This driver provides support for configuring monitor. Monitors are > + primarily responsible for data set collection and support the > + ability to collect any permutation of data set types. Monitors are > + also responsible for interaction with system cross triggering. > + > + To compile this driver as a module, choose M here: the module will be > + called coresight-tpdm. > + > endif > diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile > index b6c4a48140ec..e7392a0dddeb 100644 > --- a/drivers/hwtracing/coresight/Makefile > +++ b/drivers/hwtracing/coresight/Makefile > @@ -25,5 +25,6 @@ obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o > obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o > obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o > obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o > +obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o > coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ > coresight-cti-sysfs.o > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 6cb55c3f41d5..b56826d9a2b3 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -1117,7 +1117,8 @@ static int coresight_validate_source(struct coresight_device *csdev, > } > > if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && > - subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) { > + subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE && > + subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SYS) { > dev_err(&csdev->dev, "wrong device subtype in %s\n", function); > return -EINVAL; > } > diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c > new file mode 100644 > index 000000000000..51b8b17e6a80 > --- /dev/null > +++ b/drivers/hwtracing/coresight/coresight-tpdm.c > @@ -0,0 +1,159 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "coresight-priv.h" > +#include "coresight-tpdm.h" > + > +DEFINE_CORESIGHT_DEVLIST(tpdm_devs, "tpdm"); > + > +/* TPDM enable operations */ > +static int tpdm_enable(struct coresight_device *csdev, > + struct perf_event *event, u32 mode) > +{ > + struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + mutex_lock(&drvdata->lock); > + if (drvdata->enable) { > + mutex_unlock(&drvdata->lock); > + return -EBUSY; > + } > + > + drvdata->enable = true; > + mutex_unlock(&drvdata->lock); > + > + dev_info(drvdata->dev, "TPDM tracing enabled\n"); > + return 0; > +} > + > +/* TPDM disable operations */ > +static void tpdm_disable(struct coresight_device *csdev, > + struct perf_event *event) > +{ > + struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + mutex_lock(&drvdata->lock); > + if (!drvdata->enable) { > + mutex_unlock(&drvdata->lock); > + return; > + } > + > + drvdata->enable = false; > + mutex_unlock(&drvdata->lock); > + > + dev_info(drvdata->dev, "TPDM tracing disabled\n"); > +} > + > +static int tpdm_trace_id(struct coresight_device *csdev) > +{ > + struct tpdm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + return drvdata->traceid; > +} > + > +static const struct coresight_ops_source tpdm_source_ops = { > + .trace_id = tpdm_trace_id, > + .enable = tpdm_enable, > + .disable = tpdm_disable, > +}; > + > +static const struct coresight_ops tpdm_cs_ops = { > + .source_ops = &tpdm_source_ops, > +}; > + > +static void tpdm_init_default_data(struct tpdm_drvdata *drvdata) > +{ > + drvdata->traceid = coresight_get_system_trace_id(); > +} > + > +static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) > +{ > + struct device *dev = &adev->dev; > + struct coresight_platform_data *pdata; > + struct tpdm_drvdata *drvdata; > + struct coresight_desc desc = { 0 }; > + > + pdata = coresight_get_platform_data(dev); > + if (IS_ERR(pdata)) > + return PTR_ERR(pdata); > + adev->dev.platform_data = pdata; > + > + /* driver data*/ > + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); > + if (!drvdata) > + return -ENOMEM; > + drvdata->dev = &adev->dev; > + dev_set_drvdata(dev, drvdata); > + > + drvdata->base = devm_ioremap_resource(dev, &adev->res); > + if (!drvdata->base) > + return -ENOMEM; > + > + mutex_init(&drvdata->lock); > + tpdm_init_default_data(drvdata); > + > + /* Set up coresight component description */ > + desc.name = coresight_alloc_device_name(&tpdm_devs, dev); > + if (!desc.name) > + return -ENOMEM; > + desc.type = CORESIGHT_DEV_TYPE_SOURCE; > + desc.subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_SYS; > + desc.ops = &tpdm_cs_ops; > + desc.pdata = adev->dev.platform_data; > + desc.dev = &adev->dev; > + drvdata->csdev = coresight_register(&desc); > + if (IS_ERR(drvdata->csdev)) > + return PTR_ERR(drvdata->csdev); > + > + /* Decrease pm refcount when probe is done.*/ > + pm_runtime_put(&adev->dev); > + > + return 0; > +} > + > +static void __exit tpdm_remove(struct amba_device *adev) > +{ > + struct tpdm_drvdata *drvdata = dev_get_drvdata(&adev->dev); > + > + coresight_unregister(drvdata->csdev); > +} > + > +/* > + * Different TPDM has different periph id. > + * The difference is 0-7 bits' value. So ignore 0-7 bits. > + */ > +static struct amba_id tpdm_ids[] = { > + { > + .id = 0x000f0e00, > + .mask = 0x000fff00, > + }, > + { 0, 0}, > +}; > + > +static struct amba_driver tpdm_driver = { > + .drv = { > + .name = "coresight-tpdm", > + .owner = THIS_MODULE, > + .suppress_bind_attrs = true, > + }, > + .probe = tpdm_probe, > + .id_table = tpdm_ids, > +}; > + > +module_amba_driver(tpdm_driver); > + > +MODULE_LICENSE("GPL v2"); > +MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Monitor driver"); > diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h > new file mode 100644 > index 000000000000..2effbabf349b > --- /dev/null > +++ b/drivers/hwtracing/coresight/coresight-tpdm.h > @@ -0,0 +1,28 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#ifndef _CORESIGHT_CORESIGHT_TPDM_H > +#define _CORESIGHT_CORESIGHT_TPDM_H > + > +/** > + * struct tpdm_drvdata - specifics associated to an TPDM component > + * @base: memory mapped base address for this component. > + * @dev: The device entity associated to this component. > + * @csdev: component vitals needed by the framework. > + * @lock: lock for the enable value. > + * @enable: enable status of the component. > + * @traceid: value of the current ID for this component. > + */ > + > +struct tpdm_drvdata { > + void __iomem *base; > + struct device *dev; > + struct coresight_device *csdev; > + struct mutex lock; > + bool enable; > + int traceid; TraceID appears to have no purpose in the hardware and does not apparently drive onto the ATB - ATID signals from this device. This should be dropped and the core code fixed to allow for sources that have no trace id. Regards Mike > +}; > + > +#endif /* _CORESIGHT_CORESIGHT_TPDM_H */ > diff --git a/include/linux/coresight.h b/include/linux/coresight.h > index 93a2922b7653..e48d463be63b 100644 > --- a/include/linux/coresight.h > +++ b/include/linux/coresight.h > @@ -65,6 +65,7 @@ enum coresight_dev_subtype_source { > CORESIGHT_DEV_SUBTYPE_SOURCE_PROC, > CORESIGHT_DEV_SUBTYPE_SOURCE_BUS, > CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE, > + CORESIGHT_DEV_SUBTYPE_SOURCE_SYS, > }; > > enum coresight_dev_subtype_helper { > -- > 2.17.1 > -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel