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MIME-Version: 1.0 References: <20230526124107.894-1-dlan@gentoo.org> <20230526124107.894-2-dlan@gentoo.org> In-Reply-To: <20230526124107.894-2-dlan@gentoo.org> From: Guo Ren Date: Sat, 27 May 2023 11:36:56 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added To: Yixun Lan Cc: u-boot@lists.denx.de, Rick Chen , Leo , Wei Fu , Jisheng Zhang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Mailman-Approved-At: Sat, 27 May 2023 15:40:19 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Fri, May 26, 2023 at 8:41=E2=80=AFPM Yixun Lan wrote: > > Add support for Sipeed's Lichee Pi 4A board which based on > T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are enabl= ed, > so it's capable of chain booting from T-HEAD's vendor u-boot. > > Reviewed-by: Wei Fu > Signed-off-by: Yixun Lan > --- > arch/riscv/Kconfig | 5 ++++ > board/thead/th1520_lpi4a/Kconfig | 42 ++++++++++++++++++++++++++++ > board/thead/th1520_lpi4a/MAINTAINERS | 7 +++++ > board/thead/th1520_lpi4a/Makefile | 5 ++++ > board/thead/th1520_lpi4a/board.c | 14 ++++++++++ > include/configs/th1520_lpi4a.h | 22 +++++++++++++++ > 6 files changed, 95 insertions(+) > create mode 100644 board/thead/th1520_lpi4a/Kconfig > create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS > create mode 100644 board/thead/th1520_lpi4a/Makefile > create mode 100644 board/thead/th1520_lpi4a/board.c > create mode 100644 include/configs/th1520_lpi4a.h > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index f6ed05906a..419b6171a9 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -27,6 +27,10 @@ config TARGET_SIFIVE_UNMATCHED > config TARGET_STARFIVE_VISIONFIVE2 > bool "Support StarFive VisionFive2 Board" > > +config TARGET_TH1520_LPI4A > + bool "Support Sipeed's TH1520 Lichee PI 4A Board" > + select SYS_CACHE_SHIFT_6 > + > config TARGET_SIPEED_MAIX > bool "Support Sipeed Maix Board" > select SYS_CACHE_SHIFT_6 > @@ -66,6 +70,7 @@ source "board/emulation/qemu-riscv/Kconfig" > source "board/microchip/mpfs_icicle/Kconfig" > source "board/sifive/unleashed/Kconfig" > source "board/sifive/unmatched/Kconfig" > +source "board/thead/th1520_lpi4a/Kconfig" > source "board/openpiton/riscv64/Kconfig" > source "board/sipeed/maix/Kconfig" > source "board/starfive/visionfive2/Kconfig" > diff --git a/board/thead/th1520_lpi4a/Kconfig b/board/thead/th1520_lpi4a/= Kconfig > new file mode 100644 > index 0000000000..622246127c > --- /dev/null > +++ b/board/thead/th1520_lpi4a/Kconfig > @@ -0,0 +1,42 @@ > +if TARGET_TH1520_LPI4A > + > +config ARCH_THEAD > + bool > + default y > + > +config SYS_BOARD > + default "th1520_lpi4a" > + > +config SYS_VENDOR > + default "thread" default "T-HEAD" Thx > + > +config SYS_CPU > + default "generic" > + > +config SYS_CONFIG_NAME > + default "th1520_lpi4a" > + > +config TEXT_BASE > + default 0x01b00000 if SPL > + default 0x01c00000 if !RISCV_SMODE > + default 0x01c00000 if RISCV_SMODE > + > +config SPL_TEXT_BASE > + default 0x08000000 > + > +config SPL_OPENSBI_LOAD_ADDR > + default 0x80000000 > + > +config BOARD_SPECIFIC_OPTIONS > + def_bool y > + select ARCH_EARLY_INIT_R > + imply CPU > + imply CPU_RISCV > + imply RISCV_TIMER if RISCV_SMODE > + imply CMD_CPU > + imply SMP > + imply SUPPORT_OF_CONTROL > + imply OF_CONTROL > + imply OF_REAL > + > +endif > diff --git a/board/thead/th1520_lpi4a/MAINTAINERS b/board/thead/th1520_lp= i4a/MAINTAINERS > new file mode 100644 > index 0000000000..36c7ab7cc3 > --- /dev/null > +++ b/board/thead/th1520_lpi4a/MAINTAINERS > @@ -0,0 +1,7 @@ > +Lichee PI 4A > +M: Wei Fu > +M: Yixun Lan > +S: Maintained > +F: board/thead/th1520_lpi4a/ > +F: configs/th1520_lpi4a_defconfig > +F: doc/board/thead/lpi4a.rst > diff --git a/board/thead/th1520_lpi4a/Makefile b/board/thead/th1520_lpi4a= /Makefile > new file mode 100644 > index 0000000000..9671b3bbb0 > --- /dev/null > +++ b/board/thead/th1520_lpi4a/Makefile > @@ -0,0 +1,5 @@ > +# SPDX-License-Identifier: GPL-2.0+ > +# > +# Copyright (c) 2023, Yixun Lan > + > +obj-y +=3D board.o > diff --git a/board/thead/th1520_lpi4a/board.c b/board/thead/th1520_lpi4a/= board.c > new file mode 100644 > index 0000000000..378bab098b > --- /dev/null > +++ b/board/thead/th1520_lpi4a/board.c > @@ -0,0 +1,14 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (c) 2023, Yixun Lan > + * > + */ > + > +#include > + > +int board_init(void) > +{ > + enable_caches(); > + > + return 0; > +} > diff --git a/include/configs/th1520_lpi4a.h b/include/configs/th1520_lpi4= a.h > new file mode 100644 > index 0000000000..87496a52c4 > --- /dev/null > +++ b/include/configs/th1520_lpi4a.h > @@ -0,0 +1,22 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +/* > + * Copyright (c) 2023 Yixun Lan > + * > + */ > + > +#ifndef __TH1520_LPI4A_H > +#define __TH1520_LPI4A_H > + > +#include > + > +#define CFG_SYS_SDRAM_BASE 0x00000000 > + > +#define UART_BASE 0xffe7014000 > +#define UART_REG_WIDTH 32 > + > +/* Environment options */ > + > +#define CFG_EXTRA_ENV_SETTINGS \ > + "PS1=3D[LPi4A]# \0" > + > +#endif /* __TH1520_LPI4A_H */ > -- > 2.40.0 > --=20 Best Regards Guo Ren