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From: Guo Ren <guoren@kernel.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Wei Fu <wefu@redhat.com>, liush <liush@allwinnertech.com>,
	Atish Patra <atishp@atishpatra.org>,
	Anup Patel <anup@brainfault.org>,
	Drew Fustini <drew@beagleboard.org>,
	Christoph Hellwig <hch@lst.de>, Arnd Bergmann <arnd@arndb.de>,
	Chen-Yu Tsai <wens@csie.org>, Maxime Ripard <maxime@cerno.tech>,
	Greg Favor <gfavor@ventanamicro.com>,
	Andrea Mondelli <andrea.mondelli@huawei.com>,
	Jonathan Behrens <behrensj@mit.edu>,
	"Xinhaoqu (Freddie)" <xinhaoqu@huawei.com>,
	Nick Kossifidis <mick@ics.forth.gr>,
	Allen Baum <allen.baum@esperantotech.com>,
	Josh Scheid <jscheid@ventanamicro.com>,
	Richard Trauben <rtrauben@gmail.com>,
	Samuel Holland <samuel@sholland.org>,
	Christoph Muellner <cmuellner@linux.com>,
	Philipp Tomsich <philipp.tomsich@vrull.eu>
Subject: Re: [PATCH 04/12] riscv: implement ALTERNATIVE_2 macro
Date: Mon, 16 May 2022 14:54:40 +0800	[thread overview]
Message-ID: <CAJF2gTS9_s9DFpbKJA3pDepK76TUNNp35_1ZUb+4wFwQZpFKwQ@mail.gmail.com> (raw)
In-Reply-To: <20220511192921.2223629-5-heiko@sntech.de>

Reviewed-by: Guo Ren <guoren@kernel.org>

On Thu, May 12, 2022 at 3:29 AM Heiko Stuebner <heiko@sntech.de> wrote:
>
> When the alternatives were added the commit already provided a template
> on how to implement 2 different alternatives for one piece of code.
>
> Make this usable.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
> ---
>  arch/riscv/include/asm/alternative-macros.h | 78 +++++++++++++++------
>  1 file changed, 58 insertions(+), 20 deletions(-)
>
> diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
> index 5dd8d03a13da..9e04cd53afc8 100644
> --- a/arch/riscv/include/asm/alternative-macros.h
> +++ b/arch/riscv/include/asm/alternative-macros.h
> @@ -39,6 +39,24 @@
>  #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
>         __ALTERNATIVE_CFG old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k)
>
> +.macro __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
> +                                 new_c_2, vendor_id_2, errata_id_2, enable_2
> +886 :
> +       \old_c
> +887 :
> +       ALT_NEW_CONTENT \vendor_id_1, \errata_id_1, \enable_1, \new_c_1
> +       ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
> +.endm
> +
> +#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       CONFIG_k_1,                     \
> +                                 new_c_2, vendor_id_2, errata_id_2,    \
> +                                       CONFIG_k_2)                     \
> +       __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       IS_ENABLED(CONFIG_k_1),         \
> +                                  new_c_2, vendor_id_2, errata_id_2,   \
> +                                       IS_ENABLED(CONFIG_k_2)
> +
>  #else /* !__ASSEMBLY__ */
>
>  #include <asm/asm.h>
> @@ -74,6 +92,25 @@
>  #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
>         __ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k))
>
> +#define __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,  \
> +                                       enable_1,                       \
> +                                  new_c_2, vendor_id_2, errata_id_2,   \
> +                                       enable_2)                       \
> +       "886 :\n"                                                       \
> +       old_c "\n"                                                      \
> +       "887 :\n"                                                       \
> +       ALT_NEW_CONTENT(vendor_id_1, errata_id_1, enable_1, new_c_1)    \
> +       ALT_NEW_CONTENT(vendor_id_2, errata_id_2, enable_2, new_c_2)
> +
> +#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       CONFIG_k_1,                     \
> +                                 new_c_2, vendor_id_2, errata_id_2,    \
> +                                       CONFIG_k_2)                     \
> +       __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       IS_ENABLED(CONFIG_k_1),         \
> +                                  new_c_2, vendor_id_2, errata_id_2,   \
> +                                       IS_ENABLED(CONFIG_k_2))
> +
>  #endif /* __ASSEMBLY__ */
>
>  #else /* CONFIG_RISCV_ALTERNATIVE */
> @@ -86,6 +123,12 @@
>  #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
>         __ALTERNATIVE_CFG old_c
>
> +#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       CONFIG_k_1,                     \
> +                                 new_c_2, vendor_id_2, errata_id_2,    \
> +                                       CONFIG_k_2)                     \
> +       __ALTERNATIVE_CFG old_c
> +
>  #else /* !__ASSEMBLY__ */
>
>  #define __ALTERNATIVE_CFG(old_c)  \
> @@ -94,6 +137,12 @@
>  #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
>         __ALTERNATIVE_CFG(old_c)
>
> +#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       CONFIG_k_1,                     \
> +                                 new_c_2, vendor_id_2, errata_id_2,    \
> +                                       CONFIG_k_2) \
> +       __ALTERNATIVE_CFG(old_c)
> +
>  #endif /* __ASSEMBLY__ */
>  #endif /* CONFIG_RISCV_ALTERNATIVE */
>
> @@ -119,25 +168,14 @@
>   * this case, this vendor can create a new macro ALTERNATIVE_2() based
>   * on the following sample code and then replace ALTERNATIVE() with
>   * ALTERNATIVE_2() to append its customized content.
> - *
> - * .macro __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
> - *                                   new_c_2, vendor_id_2, errata_id_2, enable_2
> - * 886 :
> - *      \old_c
> - * 887 :
> - *      ALT_NEW_CONTENT \vendor_id_1, \errata_id_1, \enable_1, \new_c_1
> - *      ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
> - * .endm
> - *
> - * #define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
> - *                                   new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
> - *        __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1), \
> - *                                   new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2) \
> - *
> - * #define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
> - *                                    new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
> - *         _ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
> - *                                         new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2)
> - *
>   */
> +#define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1,         \
> +                                       errata_id_1, CONFIG_k_1,        \
> +                                  new_content_2, vendor_id_2,          \
> +                                       errata_id_2, CONFIG_k_2)        \
> +       _ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1,     \
> +                                           errata_id_1, CONFIG_k_1,    \
> +                                       new_content_2, vendor_id_2,     \
> +                                           errata_id_2, CONFIG_k_2)
> +
>  #endif
> --
> 2.35.1
>


-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

WARNING: multiple messages have this Message-ID (diff)
From: Guo Ren <guoren@kernel.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	 Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Wei Fu <wefu@redhat.com>,  liush <liush@allwinnertech.com>,
	Atish Patra <atishp@atishpatra.org>,
	 Anup Patel <anup@brainfault.org>,
	Drew Fustini <drew@beagleboard.org>,
	 Christoph Hellwig <hch@lst.de>, Arnd Bergmann <arnd@arndb.de>,
	Chen-Yu Tsai <wens@csie.org>,  Maxime Ripard <maxime@cerno.tech>,
	Greg Favor <gfavor@ventanamicro.com>,
	 Andrea Mondelli <andrea.mondelli@huawei.com>,
	Jonathan Behrens <behrensj@mit.edu>,
	 "Xinhaoqu (Freddie)" <xinhaoqu@huawei.com>,
	Nick Kossifidis <mick@ics.forth.gr>,
	Allen Baum <allen.baum@esperantotech.com>,
	Josh Scheid <jscheid@ventanamicro.com>,
	 Richard Trauben <rtrauben@gmail.com>,
	Samuel Holland <samuel@sholland.org>,
	 Christoph Muellner <cmuellner@linux.com>,
	Philipp Tomsich <philipp.tomsich@vrull.eu>
Subject: Re: [PATCH 04/12] riscv: implement ALTERNATIVE_2 macro
Date: Mon, 16 May 2022 14:54:40 +0800	[thread overview]
Message-ID: <CAJF2gTS9_s9DFpbKJA3pDepK76TUNNp35_1ZUb+4wFwQZpFKwQ@mail.gmail.com> (raw)
In-Reply-To: <20220511192921.2223629-5-heiko@sntech.de>

Reviewed-by: Guo Ren <guoren@kernel.org>

On Thu, May 12, 2022 at 3:29 AM Heiko Stuebner <heiko@sntech.de> wrote:
>
> When the alternatives were added the commit already provided a template
> on how to implement 2 different alternatives for one piece of code.
>
> Make this usable.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
> ---
>  arch/riscv/include/asm/alternative-macros.h | 78 +++++++++++++++------
>  1 file changed, 58 insertions(+), 20 deletions(-)
>
> diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
> index 5dd8d03a13da..9e04cd53afc8 100644
> --- a/arch/riscv/include/asm/alternative-macros.h
> +++ b/arch/riscv/include/asm/alternative-macros.h
> @@ -39,6 +39,24 @@
>  #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
>         __ALTERNATIVE_CFG old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k)
>
> +.macro __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
> +                                 new_c_2, vendor_id_2, errata_id_2, enable_2
> +886 :
> +       \old_c
> +887 :
> +       ALT_NEW_CONTENT \vendor_id_1, \errata_id_1, \enable_1, \new_c_1
> +       ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
> +.endm
> +
> +#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       CONFIG_k_1,                     \
> +                                 new_c_2, vendor_id_2, errata_id_2,    \
> +                                       CONFIG_k_2)                     \
> +       __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       IS_ENABLED(CONFIG_k_1),         \
> +                                  new_c_2, vendor_id_2, errata_id_2,   \
> +                                       IS_ENABLED(CONFIG_k_2)
> +
>  #else /* !__ASSEMBLY__ */
>
>  #include <asm/asm.h>
> @@ -74,6 +92,25 @@
>  #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
>         __ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k))
>
> +#define __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,  \
> +                                       enable_1,                       \
> +                                  new_c_2, vendor_id_2, errata_id_2,   \
> +                                       enable_2)                       \
> +       "886 :\n"                                                       \
> +       old_c "\n"                                                      \
> +       "887 :\n"                                                       \
> +       ALT_NEW_CONTENT(vendor_id_1, errata_id_1, enable_1, new_c_1)    \
> +       ALT_NEW_CONTENT(vendor_id_2, errata_id_2, enable_2, new_c_2)
> +
> +#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       CONFIG_k_1,                     \
> +                                 new_c_2, vendor_id_2, errata_id_2,    \
> +                                       CONFIG_k_2)                     \
> +       __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       IS_ENABLED(CONFIG_k_1),         \
> +                                  new_c_2, vendor_id_2, errata_id_2,   \
> +                                       IS_ENABLED(CONFIG_k_2))
> +
>  #endif /* __ASSEMBLY__ */
>
>  #else /* CONFIG_RISCV_ALTERNATIVE */
> @@ -86,6 +123,12 @@
>  #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
>         __ALTERNATIVE_CFG old_c
>
> +#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       CONFIG_k_1,                     \
> +                                 new_c_2, vendor_id_2, errata_id_2,    \
> +                                       CONFIG_k_2)                     \
> +       __ALTERNATIVE_CFG old_c
> +
>  #else /* !__ASSEMBLY__ */
>
>  #define __ALTERNATIVE_CFG(old_c)  \
> @@ -94,6 +137,12 @@
>  #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
>         __ALTERNATIVE_CFG(old_c)
>
> +#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1,   \
> +                                       CONFIG_k_1,                     \
> +                                 new_c_2, vendor_id_2, errata_id_2,    \
> +                                       CONFIG_k_2) \
> +       __ALTERNATIVE_CFG(old_c)
> +
>  #endif /* __ASSEMBLY__ */
>  #endif /* CONFIG_RISCV_ALTERNATIVE */
>
> @@ -119,25 +168,14 @@
>   * this case, this vendor can create a new macro ALTERNATIVE_2() based
>   * on the following sample code and then replace ALTERNATIVE() with
>   * ALTERNATIVE_2() to append its customized content.
> - *
> - * .macro __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
> - *                                   new_c_2, vendor_id_2, errata_id_2, enable_2
> - * 886 :
> - *      \old_c
> - * 887 :
> - *      ALT_NEW_CONTENT \vendor_id_1, \errata_id_1, \enable_1, \new_c_1
> - *      ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
> - * .endm
> - *
> - * #define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
> - *                                   new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
> - *        __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1), \
> - *                                   new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2) \
> - *
> - * #define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
> - *                                    new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
> - *         _ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
> - *                                         new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2)
> - *
>   */
> +#define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1,         \
> +                                       errata_id_1, CONFIG_k_1,        \
> +                                  new_content_2, vendor_id_2,          \
> +                                       errata_id_2, CONFIG_k_2)        \
> +       _ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1,     \
> +                                           errata_id_1, CONFIG_k_1,    \
> +                                       new_content_2, vendor_id_2,     \
> +                                           errata_id_2, CONFIG_k_2)
> +
>  #endif
> --
> 2.35.1
>


-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

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  parent reply	other threads:[~2022-05-16  6:55 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-11 19:29 [PATCH v10 00/12] riscv: support for Svpbmt and D1 memory types Heiko Stuebner
2022-05-11 19:29 ` Heiko Stuebner
2022-05-11 19:29 ` [PATCH 01/12] riscv: integrate alternatives better into the main architecture Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-16  6:01   ` Christoph Hellwig
2022-05-16  6:01     ` Christoph Hellwig
2022-05-16  6:45   ` Guo Ren
2022-05-16  6:45     ` Guo Ren
2022-05-11 19:29 ` [PATCH 02/12] riscv: allow different stages with alternatives Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-16  6:01   ` Christoph Hellwig
2022-05-16  6:01     ` Christoph Hellwig
2022-05-16  6:51   ` Guo Ren
2022-05-16  6:51     ` Guo Ren
2022-05-11 19:29 ` [PATCH 03/12] riscv: implement module alternatives Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-16  6:02   ` Christoph Hellwig
2022-05-16  6:02     ` Christoph Hellwig
2022-05-16  6:54   ` Guo Ren
2022-05-16  6:54     ` Guo Ren
2022-05-11 19:29 ` [PATCH 04/12] riscv: implement ALTERNATIVE_2 macro Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-16  6:03   ` Christoph Hellwig
2022-05-16  6:03     ` Christoph Hellwig
2022-05-16  6:54   ` Guo Ren [this message]
2022-05-16  6:54     ` Guo Ren
2022-05-11 19:29 ` [PATCH 05/12] riscv: extend concatenated alternatives-lines to the same length Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-16  6:03   ` Christoph Hellwig
2022-05-16  6:03     ` Christoph Hellwig
2022-05-16  6:55   ` Guo Ren
2022-05-16  6:55     ` Guo Ren
2022-05-11 19:29 ` [PATCH 06/12] riscv: prevent compressed instructions in alternatives Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-16  6:04   ` Christoph Hellwig
2022-05-16  6:04     ` Christoph Hellwig
2022-05-16  6:55   ` Guo Ren
2022-05-16  6:55     ` Guo Ren
2022-05-11 19:29 ` [PATCH 07/12] riscv: move boot alternatives to after fill_hwcap Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-11 19:29 ` [PATCH 08/12] riscv: Fix accessing pfn bits in PTEs for non-32bit variants Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-16  6:04   ` Christoph Hellwig
2022-05-16  6:04     ` Christoph Hellwig
2022-05-16  6:55   ` Guo Ren
2022-05-16  6:55     ` Guo Ren
2022-05-23 14:03   ` Alexandre Ghiti
2022-05-23 14:03     ` Alexandre Ghiti
2022-05-25 15:22     ` Heiko Stübner
2022-05-25 15:22       ` Heiko Stübner
2022-05-28  8:15       ` Alexandre Ghiti
2022-05-28  8:15         ` Alexandre Ghiti
2022-05-11 19:29 ` [PATCH 09/12] riscv: add RISC-V Svpbmt extension support Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-16  6:10   ` Christoph Hellwig
2022-05-16  6:10     ` Christoph Hellwig
2022-05-16  9:09     ` Philipp Tomsich
2022-05-16  9:09       ` Philipp Tomsich
2022-05-16 10:30       ` Heiko Stübner
2022-05-16 10:30         ` Heiko Stübner
2022-05-11 19:29 ` [PATCH 10/12] riscv: remove FIXMAP_PAGE_IO and fall back to its default value Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-11 19:29 ` [PATCH 11/12] riscv: don't use global static vars to store alternative data Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-16  6:15   ` Christoph Hellwig
2022-05-16  6:15     ` Christoph Hellwig
2022-05-11 19:29 ` [PATCH 12/12] riscv: add memory-type errata for T-Head Heiko Stuebner
2022-05-11 19:29   ` Heiko Stuebner
2022-05-13 13:37   ` Guo Ren
2022-05-13 13:37     ` Guo Ren
2022-05-13  3:32 ` [PATCH v10 00/12] riscv: support for Svpbmt and D1 memory types Palmer Dabbelt
2022-05-13  3:32   ` Palmer Dabbelt
2022-05-13 21:41   ` Heiko Stuebner
2022-05-13 21:41     ` Heiko Stuebner

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