From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EABAC433FE for ; Wed, 2 Feb 2022 02:02:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243758AbiBBCC2 (ORCPT ); Tue, 1 Feb 2022 21:02:28 -0500 Received: from ams.source.kernel.org ([145.40.68.75]:46182 "EHLO ams.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242899AbiBBCC2 (ORCPT ); Tue, 1 Feb 2022 21:02:28 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id BE2A0B82FE6; Wed, 2 Feb 2022 02:02:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 588E1C340FA; Wed, 2 Feb 2022 02:02:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1643767344; bh=Lu17CtWHMQyIMd+r/gZ3QnCD3blDyX01IGU77gYzPwo=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=rVuAgKNepQhlXkSgJ4nOfKqdZ1m2QgRk9ZkvH8SvfvWkeorNEQdY83E2n5eXKfc79 VCuJEViT4M9HIVIMPr3BsvqjoERHgklnIISy31sSuU4uK2OLJWs1IQstgOysSW8fQ3 A4+TDqM4i+9dG2f1hGh94TQRtV9FMnT0rwP8iPWmKTMSzCFTVSM/jumBKMQgjTroNE +jwQ76K54dK8UrZ95Lj5eu9y4l1FTA2KToTqrC9gowaW+jPXRuZTVpoBs8+clZOz6I Yl2FZr99TUgkOSak2L7h6irEIbDEWdhFCcdReiCBHO2TFXtVzEQRwjOz0Twz2ZkMOl aMu8vburo8Amg== Received: by mail-ua1-f43.google.com with SMTP id c36so16481553uae.13; Tue, 01 Feb 2022 18:02:24 -0800 (PST) X-Gm-Message-State: AOAM533gOtoCWxjkxw3H551eW3dWJnj2JZR1x01so7aWkCrxNCCP8d8W g9ZTJWEKPD1ZzUgYkQXEwUpfci/uF2ujM3xPrps= X-Google-Smtp-Source: ABdhPJzjbMxJZrbhxn6pmM0yG+DXrY57H4w+bp7CFApaAn/IyFQRMevzGEcLPsnqGd8f9H2BAFJtp6v6SwrSYMY64Dg= X-Received: by 2002:a67:e0d9:: with SMTP id m25mr10551317vsl.51.1643767343232; Tue, 01 Feb 2022 18:02:23 -0800 (PST) MIME-Version: 1.0 References: <20220201150545.1512822-1-guoren@kernel.org> <20220201150545.1512822-16-guoren@kernel.org> In-Reply-To: <20220201150545.1512822-16-guoren@kernel.org> From: Guo Ren Date: Wed, 2 Feb 2022 10:02:12 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V5 15/21] riscv: compat: Add hw capability check for elf To: Guo Ren , Palmer Dabbelt , Arnd Bergmann , Anup Patel , Greg Kroah-Hartman , liush , Wei Fu , Drew Fustini , Wang Junqiang , Christoph Hellwig Cc: linux-arch , Linux Kernel Mailing List , linux-riscv , linux-csky@vger.kernel.org, linux-s390 , sparclinux , linuxppc-dev , Parisc List , "open list:BROADCOM NVRAM DRIVER" , Linux ARM , "the arch/x86 maintainers" , Guo Ren Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-parisc@vger.kernel.org On Tue, Feb 1, 2022 at 11:07 PM wrote: > > From: Guo Ren > > Detect hardware COMPAT (32bit U-mode) capability in rv64. If not > support COMPAT mode in hw, compat_elf_check_arch would return > false by compat_binfmt_elf.c > > Signed-off-by: Guo Ren > Signed-off-by: Guo Ren > Cc: Arnd Bergmann > Cc: Christoph Hellwig > --- > arch/riscv/include/asm/elf.h | 3 ++- > arch/riscv/kernel/process.c | 32 ++++++++++++++++++++++++++++++++ > 2 files changed, 34 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h > index aee40040917b..3a4293dc7229 100644 > --- a/arch/riscv/include/asm/elf.h > +++ b/arch/riscv/include/asm/elf.h > @@ -40,7 +40,8 @@ > * elf64_hdr e_machine's offset are different. The checker is > * a little bit simple compare to other architectures. > */ > -#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV) > +extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); > +#define compat_elf_check_arch compat_elf_check_arch > > #define CORE_DUMP_USE_REGSET > #define ELF_EXEC_PAGESIZE (PAGE_SIZE) > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 1a666ad299b4..758847cba391 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -83,6 +83,38 @@ void show_regs(struct pt_regs *regs) > dump_backtrace(regs, NULL, KERN_DEFAULT); > } > > +#ifdef CONFIG_COMPAT > +static bool compat_mode_support __read_mostly; > + > +bool compat_elf_check_arch(Elf32_Ehdr *hdr) > +{ > + if (compat_mode_support && (hdr->e_machine == EM_RISCV)) > + return true; > + else > + return false; > +} > + > +static int compat_mode_detect(void) Forgot __init, here > +{ > + unsigned long tmp = csr_read(CSR_STATUS); > + > + csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32); > + > + if ((csr_read(CSR_STATUS) & SR_UXL) != SR_UXL_32) { > + pr_info("riscv: 32bit compat mode detect failed\n"); > + compat_mode_support = false; > + } else { > + compat_mode_support = true; > + pr_info("riscv: 32bit compat mode detected\n"); > + } > + > + csr_write(CSR_STATUS, tmp); > + > + return 0; > +} > +arch_initcall(compat_mode_detect); > +#endif > + > void start_thread(struct pt_regs *regs, unsigned long pc, > unsigned long sp) > { > -- > 2.25.1 > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9CCCC433EF for ; Wed, 2 Feb 2022 02:02:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; 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Tue, 01 Feb 2022 18:02:24 -0800 (PST) X-Gm-Message-State: AOAM5319PlN2hcDpaY7zOloa6Wn7xlGvWYohqJLKqVjH2F7loOJ83DkI ZHbZ7Wm1jeTwyfbNJ7jn4gJ4CTA+x2D6eNVWTJE= X-Google-Smtp-Source: ABdhPJzjbMxJZrbhxn6pmM0yG+DXrY57H4w+bp7CFApaAn/IyFQRMevzGEcLPsnqGd8f9H2BAFJtp6v6SwrSYMY64Dg= X-Received: by 2002:a67:e0d9:: with SMTP id m25mr10551317vsl.51.1643767343232; Tue, 01 Feb 2022 18:02:23 -0800 (PST) MIME-Version: 1.0 References: <20220201150545.1512822-1-guoren@kernel.org> <20220201150545.1512822-16-guoren@kernel.org> In-Reply-To: <20220201150545.1512822-16-guoren@kernel.org> From: Guo Ren Date: Wed, 2 Feb 2022 10:02:12 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V5 15/21] riscv: compat: Add hw capability check for elf To: Guo Ren , Palmer Dabbelt , Arnd Bergmann , Anup Patel , Greg Kroah-Hartman , liush , Wei Fu , Drew Fustini , Wang Junqiang , Christoph Hellwig Cc: linux-arch , Linux Kernel Mailing List , linux-riscv , linux-csky@vger.kernel.org, linux-s390 , sparclinux , linuxppc-dev , Parisc List , "open list:BROADCOM NVRAM DRIVER" , Linux ARM , "the arch/x86 maintainers" , Guo Ren X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220201_180226_119578_173E88F3 X-CRM114-Status: GOOD ( 24.13 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Feb 1, 2022 at 11:07 PM wrote: > > From: Guo Ren > > Detect hardware COMPAT (32bit U-mode) capability in rv64. If not > support COMPAT mode in hw, compat_elf_check_arch would return > false by compat_binfmt_elf.c > > Signed-off-by: Guo Ren > Signed-off-by: Guo Ren > Cc: Arnd Bergmann > Cc: Christoph Hellwig > --- > arch/riscv/include/asm/elf.h | 3 ++- > arch/riscv/kernel/process.c | 32 ++++++++++++++++++++++++++++++++ > 2 files changed, 34 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h > index aee40040917b..3a4293dc7229 100644 > --- a/arch/riscv/include/asm/elf.h > +++ b/arch/riscv/include/asm/elf.h > @@ -40,7 +40,8 @@ > * elf64_hdr e_machine's offset are different. The checker is > * a little bit simple compare to other architectures. > */ > -#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV) > +extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); > +#define compat_elf_check_arch compat_elf_check_arch > > #define CORE_DUMP_USE_REGSET > #define ELF_EXEC_PAGESIZE (PAGE_SIZE) > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 1a666ad299b4..758847cba391 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -83,6 +83,38 @@ void show_regs(struct pt_regs *regs) > dump_backtrace(regs, NULL, KERN_DEFAULT); > } > > +#ifdef CONFIG_COMPAT > +static bool compat_mode_support __read_mostly; > + > +bool compat_elf_check_arch(Elf32_Ehdr *hdr) > +{ > + if (compat_mode_support && (hdr->e_machine == EM_RISCV)) > + return true; > + else > + return false; > +} > + > +static int compat_mode_detect(void) Forgot __init, here > +{ > + unsigned long tmp = csr_read(CSR_STATUS); > + > + csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32); > + > + if ((csr_read(CSR_STATUS) & SR_UXL) != SR_UXL_32) { > + pr_info("riscv: 32bit compat mode detect failed\n"); > + compat_mode_support = false; > + } else { > + compat_mode_support = true; > + pr_info("riscv: 32bit compat mode detected\n"); > + } > + > + csr_write(CSR_STATUS, tmp); > + > + return 0; > +} > +arch_initcall(compat_mode_detect); > +#endif > + > void start_thread(struct pt_regs *regs, unsigned long pc, > unsigned long sp) > { > -- > 2.25.1 > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/ _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F4CAC433F5 for ; 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Tue, 01 Feb 2022 18:02:24 -0800 (PST) X-Gm-Message-State: AOAM5315TZJ08x2A0ZIHmztPRcZu7gm7/TOmDSbQrGAEcCUr8GZeQMEK iRjqCmPOCp7cV3BbjZbhjo8taDoPlX+VGYBkjLE= X-Google-Smtp-Source: ABdhPJzjbMxJZrbhxn6pmM0yG+DXrY57H4w+bp7CFApaAn/IyFQRMevzGEcLPsnqGd8f9H2BAFJtp6v6SwrSYMY64Dg= X-Received: by 2002:a67:e0d9:: with SMTP id m25mr10551317vsl.51.1643767343232; Tue, 01 Feb 2022 18:02:23 -0800 (PST) MIME-Version: 1.0 References: <20220201150545.1512822-1-guoren@kernel.org> <20220201150545.1512822-16-guoren@kernel.org> In-Reply-To: <20220201150545.1512822-16-guoren@kernel.org> From: Guo Ren Date: Wed, 2 Feb 2022 10:02:12 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V5 15/21] riscv: compat: Add hw capability check for elf To: Guo Ren , Palmer Dabbelt , Arnd Bergmann , Anup Patel , Greg Kroah-Hartman , liush , Wei Fu , Drew Fustini , Wang Junqiang , Christoph Hellwig Content-Type: text/plain; charset="UTF-8" X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch , linux-s390 , Guo Ren , Parisc List , the arch/x86 maintainers , Linux Kernel Mailing List , linux-csky@vger.kernel.org, "open list:BROADCOM NVRAM DRIVER" , sparclinux , linux-riscv , linuxppc-dev , Linux ARM Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, Feb 1, 2022 at 11:07 PM wrote: > > From: Guo Ren > > Detect hardware COMPAT (32bit U-mode) capability in rv64. If not > support COMPAT mode in hw, compat_elf_check_arch would return > false by compat_binfmt_elf.c > > Signed-off-by: Guo Ren > Signed-off-by: Guo Ren > Cc: Arnd Bergmann > Cc: Christoph Hellwig > --- > arch/riscv/include/asm/elf.h | 3 ++- > arch/riscv/kernel/process.c | 32 ++++++++++++++++++++++++++++++++ > 2 files changed, 34 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h > index aee40040917b..3a4293dc7229 100644 > --- a/arch/riscv/include/asm/elf.h > +++ b/arch/riscv/include/asm/elf.h > @@ -40,7 +40,8 @@ > * elf64_hdr e_machine's offset are different. The checker is > * a little bit simple compare to other architectures. > */ > -#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV) > +extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); > +#define compat_elf_check_arch compat_elf_check_arch > > #define CORE_DUMP_USE_REGSET > #define ELF_EXEC_PAGESIZE (PAGE_SIZE) > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 1a666ad299b4..758847cba391 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -83,6 +83,38 @@ void show_regs(struct pt_regs *regs) > dump_backtrace(regs, NULL, KERN_DEFAULT); > } > > +#ifdef CONFIG_COMPAT > +static bool compat_mode_support __read_mostly; > + > +bool compat_elf_check_arch(Elf32_Ehdr *hdr) > +{ > + if (compat_mode_support && (hdr->e_machine == EM_RISCV)) > + return true; > + else > + return false; > +} > + > +static int compat_mode_detect(void) Forgot __init, here > +{ > + unsigned long tmp = csr_read(CSR_STATUS); > + > + csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32); > + > + if ((csr_read(CSR_STATUS) & SR_UXL) != SR_UXL_32) { > + pr_info("riscv: 32bit compat mode detect failed\n"); > + compat_mode_support = false; > + } else { > + compat_mode_support = true; > + pr_info("riscv: 32bit compat mode detected\n"); > + } > + > + csr_write(CSR_STATUS, tmp); > + > + return 0; > +} > +arch_initcall(compat_mode_detect); > +#endif > + > void start_thread(struct pt_regs *regs, unsigned long pc, > unsigned long sp) > { > -- > 2.25.1 > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6B6C0C433EF for ; Wed, 2 Feb 2022 02:04:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; 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Tue, 01 Feb 2022 18:02:24 -0800 (PST) X-Gm-Message-State: AOAM5319PlN2hcDpaY7zOloa6Wn7xlGvWYohqJLKqVjH2F7loOJ83DkI ZHbZ7Wm1jeTwyfbNJ7jn4gJ4CTA+x2D6eNVWTJE= X-Google-Smtp-Source: ABdhPJzjbMxJZrbhxn6pmM0yG+DXrY57H4w+bp7CFApaAn/IyFQRMevzGEcLPsnqGd8f9H2BAFJtp6v6SwrSYMY64Dg= X-Received: by 2002:a67:e0d9:: with SMTP id m25mr10551317vsl.51.1643767343232; Tue, 01 Feb 2022 18:02:23 -0800 (PST) MIME-Version: 1.0 References: <20220201150545.1512822-1-guoren@kernel.org> <20220201150545.1512822-16-guoren@kernel.org> In-Reply-To: <20220201150545.1512822-16-guoren@kernel.org> From: Guo Ren Date: Wed, 2 Feb 2022 10:02:12 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V5 15/21] riscv: compat: Add hw capability check for elf To: Guo Ren , Palmer Dabbelt , Arnd Bergmann , Anup Patel , Greg Kroah-Hartman , liush , Wei Fu , Drew Fustini , Wang Junqiang , Christoph Hellwig Cc: linux-arch , Linux Kernel Mailing List , linux-riscv , linux-csky@vger.kernel.org, linux-s390 , sparclinux , linuxppc-dev , Parisc List , "open list:BROADCOM NVRAM DRIVER" , Linux ARM , "the arch/x86 maintainers" , Guo Ren X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220201_180226_119578_173E88F3 X-CRM114-Status: GOOD ( 24.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Feb 1, 2022 at 11:07 PM wrote: > > From: Guo Ren > > Detect hardware COMPAT (32bit U-mode) capability in rv64. If not > support COMPAT mode in hw, compat_elf_check_arch would return > false by compat_binfmt_elf.c > > Signed-off-by: Guo Ren > Signed-off-by: Guo Ren > Cc: Arnd Bergmann > Cc: Christoph Hellwig > --- > arch/riscv/include/asm/elf.h | 3 ++- > arch/riscv/kernel/process.c | 32 ++++++++++++++++++++++++++++++++ > 2 files changed, 34 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h > index aee40040917b..3a4293dc7229 100644 > --- a/arch/riscv/include/asm/elf.h > +++ b/arch/riscv/include/asm/elf.h > @@ -40,7 +40,8 @@ > * elf64_hdr e_machine's offset are different. The checker is > * a little bit simple compare to other architectures. > */ > -#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV) > +extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); > +#define compat_elf_check_arch compat_elf_check_arch > > #define CORE_DUMP_USE_REGSET > #define ELF_EXEC_PAGESIZE (PAGE_SIZE) > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 1a666ad299b4..758847cba391 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -83,6 +83,38 @@ void show_regs(struct pt_regs *regs) > dump_backtrace(regs, NULL, KERN_DEFAULT); > } > > +#ifdef CONFIG_COMPAT > +static bool compat_mode_support __read_mostly; > + > +bool compat_elf_check_arch(Elf32_Ehdr *hdr) > +{ > + if (compat_mode_support && (hdr->e_machine == EM_RISCV)) > + return true; > + else > + return false; > +} > + > +static int compat_mode_detect(void) Forgot __init, here > +{ > + unsigned long tmp = csr_read(CSR_STATUS); > + > + csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32); > + > + if ((csr_read(CSR_STATUS) & SR_UXL) != SR_UXL_32) { > + pr_info("riscv: 32bit compat mode detect failed\n"); > + compat_mode_support = false; > + } else { > + compat_mode_support = true; > + pr_info("riscv: 32bit compat mode detected\n"); > + } > + > + csr_write(CSR_STATUS, tmp); > + > + return 0; > +} > +arch_initcall(compat_mode_detect); > +#endif > + > void start_thread(struct pt_regs *regs, unsigned long pc, > unsigned long sp) > { > -- > 2.25.1 > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel