From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F8F6C433F5 for ; Tue, 8 Feb 2022 06:16:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347022AbiBHGQb (ORCPT ); Tue, 8 Feb 2022 01:16:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58648 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230433AbiBHGQ2 (ORCPT ); Tue, 8 Feb 2022 01:16:28 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C1B8C0401DC; Mon, 7 Feb 2022 22:16:27 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 017A0615D8; Tue, 8 Feb 2022 06:16:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5E4E4C340F4; Tue, 8 Feb 2022 06:16:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644300986; bh=dHQMD6sRezY/QyXmR0/JUOowSsiJgm5wiz6FK1pVu7E=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=r9tSS+hZgfGVOukzJ8sI6tp690L4pbCRLjrVJ4ErzzX/0dK3ujjVrcSIHIldY77hU O/erpSFAaaHV4StoWQsW+r8UYstmYbtnhCkjFm2t3As0+YO1w7HwOFb4xad139Y6p8 /+MIR4RUnpKEbelOr9h8EF/6QS9lCB8NI2ATE/AHqviT8MURbREe3Th0cdLDmOVhE2 OLhaEWCfhQ3Wz8MQLHKpm9ntd1YC19+nmRKNlNqLHe4ycM7tKHHNB+zlNYTzBlufQz no7y3XendmsNBTEkInTA5xGoaog7i7WKNunl2BaKQbCcmUR0HqnQtI9rh6podUiT1Y krg5A2Mo2L48A== Received: by mail-vs1-f44.google.com with SMTP id g10so2266933vss.1; Mon, 07 Feb 2022 22:16:26 -0800 (PST) X-Gm-Message-State: AOAM531X3Vrz+mblVzf2u7TluAZs9XvQeR8QYIILaflVe5ruQFqQjkbc 0N+1eR52AFhweznUDlLQZTCHpKEfSljF/Ls04L0= X-Google-Smtp-Source: ABdhPJzcwm4YDC3nvL5TFDNpJsWBD6X50Jvzm8WNKNMQoPsYhJ1o4JKRTmRw9slALS0DiLQWtwaNVrKTyqKf3FIIrP8= X-Received: by 2002:a67:ec4e:: with SMTP id z14mr1021025vso.8.1644300985309; Mon, 07 Feb 2022 22:16:25 -0800 (PST) MIME-Version: 1.0 References: <20220126114452.692512-1-apatel@ventanamicro.com> <20220126114452.692512-2-apatel@ventanamicro.com> In-Reply-To: <20220126114452.692512-2-apatel@ventanamicro.com> From: Guo Ren Date: Tue, 8 Feb 2022 14:16:14 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v10 1/8] RISC-V: Enable CPU_IDLE drivers To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring , Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree , linux-riscv , Linux Kernel Mailing List , linux-pm@vger.kernel.org, Linux ARM , kvm-riscv@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reviewed-by: Guo Ren small questions: On Wed, Jan 26, 2022 at 7:46 PM Anup Patel wrote: > > From: Anup Patel > > We force select CPU_PM and provide asm/cpuidle.h so that we can > use CPU IDLE drivers for Linux RISC-V kernel. > > Signed-off-by: Anup Patel > Signed-off-by: Anup Patel > --- > arch/riscv/Kconfig | 7 +++++++ > arch/riscv/configs/defconfig | 1 + > arch/riscv/configs/rv32_defconfig | 1 + > arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++ > arch/riscv/kernel/process.c | 3 ++- > 5 files changed, 35 insertions(+), 1 deletion(-) > create mode 100644 arch/riscv/include/asm/cpuidle.h > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 5adcbd9b5e88..76976d12b463 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -46,6 +46,7 @@ config RISCV > select CLONE_BACKWARDS > select CLINT_TIMER if !MMU > select COMMON_CLK > + select CPU_PM if CPU_IDLE > select EDAC_SUPPORT > select GENERIC_ARCH_TOPOLOGY if SMP > select GENERIC_ATOMIC64 if !64BIT > @@ -547,4 +548,10 @@ source "kernel/power/Kconfig" > > endmenu > > +menu "CPU Power Management" > + > +source "drivers/cpuidle/Kconfig" > + > +endmenu > + > source "arch/riscv/kvm/Kconfig" > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index f120fcc43d0a..a5e0482a4969 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y > CONFIG_SOC_VIRT=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=m > CONFIG_JUMP_LABEL=y > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig > index 8b56a7f1eb06..d1b87db54d68 100644 > --- a/arch/riscv/configs/rv32_defconfig > +++ b/arch/riscv/configs/rv32_defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y > CONFIG_ARCH_RV32I=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=m > CONFIG_JUMP_LABEL=y > diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h > new file mode 100644 > index 000000000000..71fdc607d4bc > --- /dev/null > +++ b/arch/riscv/include/asm/cpuidle.h > @@ -0,0 +1,24 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2021 Allwinner Ltd > + * Copyright (C) 2021 Western Digital Corporation or its affiliates. > + */ > + > +#ifndef _ASM_RISCV_CPUIDLE_H > +#define _ASM_RISCV_CPUIDLE_H > + > +#include > +#include > + > +static inline void cpu_do_idle(void) > +{ > + /* > + * Add mb() here to ensure that all > + * IO/MEM accesses are completed prior > + * to entering WFI. > + */ > + mb(); I think it's a separate fixup. > + wait_for_interrupt(); > +} > + > +#endif > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 03ac3aa611f5..504b496787aa 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > > register unsigned long gp_in_global __asm__("gp"); > > @@ -37,7 +38,7 @@ extern asmlinkage void ret_from_kernel_thread(void); > > void arch_cpu_idle(void) > { maybe below is enough. + mb(); wait_for_interrupt(); > - wait_for_interrupt(); > + cpu_do_idle(); > raw_local_irq_enable(); > } > > -- > 2.25.1 > > > -- > kvm-riscv mailing list > kvm-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/kvm-riscv -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D0702C433F5 for ; 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Mon, 07 Feb 2022 22:16:26 -0800 (PST) X-Gm-Message-State: AOAM531hTXgzhDyERZWm03O6OhQD57ixdFL3L1+tV9F1jWcu72x9yp5k aXDLW5fhbV4ZmFPQmJ0iwOHxkHikBL8Nc92Xsfg= X-Google-Smtp-Source: ABdhPJzcwm4YDC3nvL5TFDNpJsWBD6X50Jvzm8WNKNMQoPsYhJ1o4JKRTmRw9slALS0DiLQWtwaNVrKTyqKf3FIIrP8= X-Received: by 2002:a67:ec4e:: with SMTP id z14mr1021025vso.8.1644300985309; Mon, 07 Feb 2022 22:16:25 -0800 (PST) MIME-Version: 1.0 References: <20220126114452.692512-1-apatel@ventanamicro.com> <20220126114452.692512-2-apatel@ventanamicro.com> In-Reply-To: <20220126114452.692512-2-apatel@ventanamicro.com> From: Guo Ren Date: Tue, 8 Feb 2022 14:16:14 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v10 1/8] RISC-V: Enable CPU_IDLE drivers To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring , Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree , linux-riscv , Linux Kernel Mailing List , linux-pm@vger.kernel.org, Linux ARM , kvm-riscv@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220207_221629_521585_FD08DCAD X-CRM114-Status: GOOD ( 26.60 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Reviewed-by: Guo Ren small questions: On Wed, Jan 26, 2022 at 7:46 PM Anup Patel wrote: > > From: Anup Patel > > We force select CPU_PM and provide asm/cpuidle.h so that we can > use CPU IDLE drivers for Linux RISC-V kernel. > > Signed-off-by: Anup Patel > Signed-off-by: Anup Patel > --- > arch/riscv/Kconfig | 7 +++++++ > arch/riscv/configs/defconfig | 1 + > arch/riscv/configs/rv32_defconfig | 1 + > arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++ > arch/riscv/kernel/process.c | 3 ++- > 5 files changed, 35 insertions(+), 1 deletion(-) > create mode 100644 arch/riscv/include/asm/cpuidle.h > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 5adcbd9b5e88..76976d12b463 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -46,6 +46,7 @@ config RISCV > select CLONE_BACKWARDS > select CLINT_TIMER if !MMU > select COMMON_CLK > + select CPU_PM if CPU_IDLE > select EDAC_SUPPORT > select GENERIC_ARCH_TOPOLOGY if SMP > select GENERIC_ATOMIC64 if !64BIT > @@ -547,4 +548,10 @@ source "kernel/power/Kconfig" > > endmenu > > +menu "CPU Power Management" > + > +source "drivers/cpuidle/Kconfig" > + > +endmenu > + > source "arch/riscv/kvm/Kconfig" > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index f120fcc43d0a..a5e0482a4969 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y > CONFIG_SOC_VIRT=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=m > CONFIG_JUMP_LABEL=y > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig > index 8b56a7f1eb06..d1b87db54d68 100644 > --- a/arch/riscv/configs/rv32_defconfig > +++ b/arch/riscv/configs/rv32_defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y > CONFIG_ARCH_RV32I=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=m > CONFIG_JUMP_LABEL=y > diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h > new file mode 100644 > index 000000000000..71fdc607d4bc > --- /dev/null > +++ b/arch/riscv/include/asm/cpuidle.h > @@ -0,0 +1,24 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2021 Allwinner Ltd > + * Copyright (C) 2021 Western Digital Corporation or its affiliates. > + */ > + > +#ifndef _ASM_RISCV_CPUIDLE_H > +#define _ASM_RISCV_CPUIDLE_H > + > +#include > +#include > + > +static inline void cpu_do_idle(void) > +{ > + /* > + * Add mb() here to ensure that all > + * IO/MEM accesses are completed prior > + * to entering WFI. > + */ > + mb(); I think it's a separate fixup. > + wait_for_interrupt(); > +} > + > +#endif > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 03ac3aa611f5..504b496787aa 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > > register unsigned long gp_in_global __asm__("gp"); > > @@ -37,7 +38,7 @@ extern asmlinkage void ret_from_kernel_thread(void); > > void arch_cpu_idle(void) > { maybe below is enough. + mb(); wait_for_interrupt(); > - wait_for_interrupt(); > + cpu_do_idle(); > raw_local_irq_enable(); > } > > -- > 2.25.1 > > > -- > kvm-riscv mailing list > kvm-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/kvm-riscv -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/ _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8323CC433EF for ; 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Mon, 07 Feb 2022 22:16:26 -0800 (PST) X-Gm-Message-State: AOAM531hTXgzhDyERZWm03O6OhQD57ixdFL3L1+tV9F1jWcu72x9yp5k aXDLW5fhbV4ZmFPQmJ0iwOHxkHikBL8Nc92Xsfg= X-Google-Smtp-Source: ABdhPJzcwm4YDC3nvL5TFDNpJsWBD6X50Jvzm8WNKNMQoPsYhJ1o4JKRTmRw9slALS0DiLQWtwaNVrKTyqKf3FIIrP8= X-Received: by 2002:a67:ec4e:: with SMTP id z14mr1021025vso.8.1644300985309; Mon, 07 Feb 2022 22:16:25 -0800 (PST) MIME-Version: 1.0 References: <20220126114452.692512-1-apatel@ventanamicro.com> <20220126114452.692512-2-apatel@ventanamicro.com> In-Reply-To: <20220126114452.692512-2-apatel@ventanamicro.com> From: Guo Ren Date: Tue, 8 Feb 2022 14:16:14 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v10 1/8] RISC-V: Enable CPU_IDLE drivers To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Ulf Hansson , "Rafael J . Wysocki" , Pavel Machek , Rob Herring , Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree , linux-riscv , Linux Kernel Mailing List , linux-pm@vger.kernel.org, Linux ARM , kvm-riscv@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220207_221629_521585_FD08DCAD X-CRM114-Status: GOOD ( 26.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Reviewed-by: Guo Ren small questions: On Wed, Jan 26, 2022 at 7:46 PM Anup Patel wrote: > > From: Anup Patel > > We force select CPU_PM and provide asm/cpuidle.h so that we can > use CPU IDLE drivers for Linux RISC-V kernel. > > Signed-off-by: Anup Patel > Signed-off-by: Anup Patel > --- > arch/riscv/Kconfig | 7 +++++++ > arch/riscv/configs/defconfig | 1 + > arch/riscv/configs/rv32_defconfig | 1 + > arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++ > arch/riscv/kernel/process.c | 3 ++- > 5 files changed, 35 insertions(+), 1 deletion(-) > create mode 100644 arch/riscv/include/asm/cpuidle.h > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 5adcbd9b5e88..76976d12b463 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -46,6 +46,7 @@ config RISCV > select CLONE_BACKWARDS > select CLINT_TIMER if !MMU > select COMMON_CLK > + select CPU_PM if CPU_IDLE > select EDAC_SUPPORT > select GENERIC_ARCH_TOPOLOGY if SMP > select GENERIC_ATOMIC64 if !64BIT > @@ -547,4 +548,10 @@ source "kernel/power/Kconfig" > > endmenu > > +menu "CPU Power Management" > + > +source "drivers/cpuidle/Kconfig" > + > +endmenu > + > source "arch/riscv/kvm/Kconfig" > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index f120fcc43d0a..a5e0482a4969 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y > CONFIG_SOC_VIRT=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=m > CONFIG_JUMP_LABEL=y > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig > index 8b56a7f1eb06..d1b87db54d68 100644 > --- a/arch/riscv/configs/rv32_defconfig > +++ b/arch/riscv/configs/rv32_defconfig > @@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y > CONFIG_ARCH_RV32I=y > CONFIG_SMP=y > CONFIG_HOTPLUG_CPU=y > +CONFIG_CPU_IDLE=y > CONFIG_VIRTUALIZATION=y > CONFIG_KVM=m > CONFIG_JUMP_LABEL=y > diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h > new file mode 100644 > index 000000000000..71fdc607d4bc > --- /dev/null > +++ b/arch/riscv/include/asm/cpuidle.h > @@ -0,0 +1,24 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2021 Allwinner Ltd > + * Copyright (C) 2021 Western Digital Corporation or its affiliates. > + */ > + > +#ifndef _ASM_RISCV_CPUIDLE_H > +#define _ASM_RISCV_CPUIDLE_H > + > +#include > +#include > + > +static inline void cpu_do_idle(void) > +{ > + /* > + * Add mb() here to ensure that all > + * IO/MEM accesses are completed prior > + * to entering WFI. > + */ > + mb(); I think it's a separate fixup. > + wait_for_interrupt(); > +} > + > +#endif > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 03ac3aa611f5..504b496787aa 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > > register unsigned long gp_in_global __asm__("gp"); > > @@ -37,7 +38,7 @@ extern asmlinkage void ret_from_kernel_thread(void); > > void arch_cpu_idle(void) > { maybe below is enough. + mb(); wait_for_interrupt(); > - wait_for_interrupt(); > + cpu_do_idle(); > raw_local_irq_enable(); > } > > -- > 2.25.1 > > > -- > kvm-riscv mailing list > kvm-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/kvm-riscv -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel