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From: David Marchand <david.marchand@redhat.com>
To: Gregory Etelson <getelson@nvidia.com>
Cc: dev@dpdk.org, matan@nvidia.com, rasland@nvidia.com,
	stable@dpdk.org,  Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Subject: Re: [PATCH] common/mlx5: fix DevX register read error severity
Date: Thu, 10 Nov 2022 17:18:32 +0100	[thread overview]
Message-ID: <CAJFAV8x8WFaMnRsM10xNB45t-5q_H+-ev4Vn8oyVU0-APNyMYw@mail.gmail.com> (raw)
In-Reply-To: <20221110130520.15275-1-getelson@nvidia.com>

On Thu, Nov 10, 2022 at 2:06 PM Gregory Etelson <getelson@nvidia.com> wrote:
>
> PMD attempt to read HW UTC counter properties can fail because the feature
> has no support in port FW or mlx5 kernel module.
>
> In that case PMD still can produce correct time-stamps if it runs on core with
> nanosecond time resolution.
>
> Fixes: b0067860959d ("common/mlx5: update log for DevX general command failure")
>

No blank line here.

> Cc: stable@dpdk.org
>

Reported-by: David Marchand <david.marchand@redhat.com>
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>

I had tested the same change to pass OVS unit tests.

I did not hit any other error level messages from functions changed in
b0067860959d ("common/mlx5: update log for DevX general command
failure").
So I guess only changing this one is enough.

Acked-by: David Marchand <david.marchand@redhat.com>


-- 
David Marchand


  reply	other threads:[~2022-11-10 16:18 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-10 13:05 [PATCH] common/mlx5: fix DevX register read error severity Gregory Etelson
2022-11-10 16:18 ` David Marchand [this message]
2022-11-10 17:17 ` Raslan Darawsheh

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