From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DFD2FC43381 for ; Wed, 20 Mar 2019 20:35:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AF70B21873 for ; Wed, 20 Mar 2019 20:35:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="imuB4AHv" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727361AbfCTUfd (ORCPT ); Wed, 20 Mar 2019 16:35:33 -0400 Received: from mail-ot1-f65.google.com ([209.85.210.65]:33252 "EHLO mail-ot1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726438AbfCTUfd (ORCPT ); Wed, 20 Mar 2019 16:35:33 -0400 Received: by mail-ot1-f65.google.com with SMTP id q24so3468594otk.0 for ; Wed, 20 Mar 2019 13:35:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=8VIwCWEwJjYWPjkc9W4uqQtDmdxqoUpAVmUE87akCOU=; b=imuB4AHvxhTn+yz4ak/qKaWS2gT/MlbPkR8Hu5k2NGPBXh8q6783tYz93vg6Uokk1H pKzWXr1S7RH7phm3t+6CbykO2bGek2elWh3nwtq9EWsclGsVnEEAtM2fH/2sR1fs+jg5 Sb5uCFtKUp5MBQCAhxAAeswvlC44jtTHwP8HmcQJYHyfU7k3/vYa5IoBX1fLQ0oJpYqE D2HWndgCc6XY08zGkKpAujuWwdyA1f4HVhSk5hnzotTD0lE2kmO81YxD/CiHGFPnHFIF TmrZaOcA4OjVprJhuHgvtf+hqw9bni3U9fy4ZzNcDgx8iXEvlZu4zErwA/ut9CctrYX6 Gb8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=8VIwCWEwJjYWPjkc9W4uqQtDmdxqoUpAVmUE87akCOU=; b=kQ7zK0cKvpSwBqCY/nQhmdbTjzgj92IcndhOk+Xby3RhOpg4pmsO6jnYAhcgn8FnJR 8Jz5viC6+Hc5lwFah2cOgw4RW0Kb1EiFCh3I0K02W15suqqezQWqQTctDCBCfsKxXwfP BF2EcvmjHvbkeGh/6w9RLa+rCTUnCa3QBA6hrirMoRxx8J0jPOAh/y4xWRp3PJtPpAVX WCX96u/GTcViKOrbTKSHB0ehxO58CqHdi+GuxNDSRP7pMfi+VksovnALYZMh5+idF5fP XZy2uHv5hwQHmfB9cpMwlFhpTZ65QilzmbiHXCkj2/ZcMddmdwy5yV38iR+nZ1GVSz97 Q9xw== X-Gm-Message-State: APjAAAUtw3SpWd4p7F1aSMwjQsK5+DiyXLybVmT+Ei+9Y5PMj7uQPkl8 hJFRf9PFmifOkyTOzdUgEE7fKztoj0DmTqTS36EUeIy2LQw= X-Google-Smtp-Source: APXvYqxupteNTsnT4pnslBW58pnVtYHya1v5C+yb5oaoqHd7eqn2jKwKupEW1G2qY8ZQnFLJES5vUcL+RlguffsreYc= X-Received: by 2002:a9d:7143:: with SMTP id y3mr14519otj.12.1553114132396; Wed, 20 Mar 2019 13:35:32 -0700 (PDT) MIME-Version: 1.0 References: <20180925182846.30042-1-f.fainelli@gmail.com> <20180925182846.30042-3-f.fainelli@gmail.com> <5ddf46b1-1959-832d-c6a5-86d8f93dc409@electromag.com.au> <7338bda7-541a-ed20-0afa-f5840c8fd131@gmail.com> <36fe3206-763d-41f8-bb9e-fa3067d78f2f@electromag.com.au> <5e258872-34cf-f82f-bcbc-539a74ba8561@gmail.com> <416d3171-492d-2c9f-168a-88c5d2814db2@gmail.com> In-Reply-To: <416d3171-492d-2c9f-168a-88c5d2814db2@gmail.com> From: Maxim Uvarov Date: Wed, 20 Mar 2019 23:35:20 +0300 Message-ID: Subject: Re: regression from: net: phy: marvell: Avoid unnecessary soft reset To: Heiner Kallweit Cc: liweihang , Florian Fainelli , Phil Reid , "netdev@vger.kernel.org" , Andrew Lunn , "David S. Miller" , "dongsheng.wang@hxt-semitech.com" , "cphealy@gmail.com" , "clemens.gruber@pqgruber.com" , "nbd@nbd.name" , "harini.katakam@xilinx.com" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org also it's suspicions that in m88e1116r_config_init() delay is present after first soft_reset() and missed after second. Maxim. =D1=81=D1=80, 20 =D0=BC=D0=B0=D1=80. 2019 =D0=B3. =D0=B2 21:17, Heiner Kall= weit : > > On 20.03.2019 13:22, liweihang wrote: > > > > > >> -----Original Message----- > >> From: Florian Fainelli [mailto:f.fainelli@gmail.com] > >> Sent: Wednesday, March 20, 2019 11:37 AM > >> To: liweihang ; Phil Reid > >> ; netdev@vger.kernel.org > >> Cc: Andrew Lunn ; David S. Miller > >> ; dongsheng.wang@hxt-semitech.com; > >> cphealy@gmail.com; clemens.gruber@pqgruber.com; hkallweit1@gmail.com; > >> nbd@nbd.name; harini.katakam@xilinx.com > >> Subject: Re: regression from: net: phy: marvell: Avoid unnecessary sof= t reset > >> > >> > >> > >> On 3/19/2019 7:34 PM, liweihang wrote: > >>> Hi all, > >>> > >>> I've met a similar issue and sent an email to discuss about it before= : > >>> Question about setting speed and duplex failed after auto-negotiation > >>> disabled on marvell phy > >>> > >>> d6ab93364734 net: phy: marvell: Avoid unnecessary soft reset I > >>> reverted this patch and the auto-negotiation works ok. > >>> > >>> Florian, could you please read my previous email and give me some adv= ice? > >> > >> If you can copy the patch author on that email the next time that will= help > >> expedite things. > >> > >> So the problem seems to come from the fact that unless the BCMR_RESET = bit > >> is written, then m88e1121_config_aneg_rgmii_delays() has no effect, do= es > >> that sound like what you are observing? > >> > >> Does the following work for you (Phil and yourself)? > > > > Thank you, Florian. But that didn't work for me either. I think the key= question is > > as what Heiner said, some bits need to be preserved. > > > > The MII_BMCR contained information of speed and duplex mode, but when w= e > > call genphy_soft_reset(), these bits will be cleared. > > > I think instead of > > ret =3D phy_write(phydev, MII_BMCR, BMCR_RESET); > > we should use > > ret =3D phy_set_bits(phydev, MII_BMCR, BMCR_RESET); > > This is still in line with Clause 22 but covers more PHY's. A lot of PHY'= s > won't be affected because they reset all BMCR bits to a default anyway. > Could you please test this? If it's ok for you I'd submit a patch. > > >> > >> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c ind= ex > >> 3ccba37bd6dd..6a1ea4c2042a 100644 > >> --- a/drivers/net/phy/marvell.c > >> +++ b/drivers/net/phy/marvell.c > >> @@ -448,6 +448,10 @@ static int m88e1121_config_aneg(struct phy_device > >> *phydev) > >> err =3D m88e1121_config_aneg_rgmii_delays(phydev); > >> if (err < 0) > >> return err; > >> + > >> + err =3D genphy_soft_reset(phydev); > >> + if (err < 0) > >> + return err; > >> } > >> > >> err =3D marvell_set_polarity(phydev, phydev->mdix_ctrl); > >> > > > --=20 Best regards, Maxim Uvarov