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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Inki Dae <inki.dae@samsung.com>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Subject: Re: [PATCH 2/6] clk: samsung: Add Exynos5x sub-CMU clock driver
Date: Fri, 23 Feb 2018 08:49:37 +0100	[thread overview]
Message-ID: <CAJKOXPfCYdmwrYSOa1cuU-N3RnXsAHGYOL++sCbUo2gzJLChXw@mail.gmail.com> (raw)
In-Reply-To: <907df45c-5244-34d4-93f4-e19b046ee077@samsung.com>

On Thu, Feb 22, 2018 at 1:22 PM, Marek Szyprowski
<m.szyprowski@samsung.com> wrote:
> Hi Krzysztof,
>
> On 2018-02-21 17:19, Krzysztof Kozlowski wrote:
>>
>> On Wed, Feb 21, 2018 at 11:15 AM, Marek Szyprowski
>> <m.szyprowski@samsung.com> wrote:
>>>
>>> Exynos5250/5420/5800 have only one clock constroller, but some of their
>>> clock depends on respective power domains. Handling integration of clock
>>> controller and power domain can be done using runtime PM feature of CCF
>>> framework. This however needs a separate struct device for each power
>>> domain. This patch adds such separate driver for group such clocks,
>>
>> "driver to group"?
>>
>>> which can be instantiated more than once, each time for a different
>>> power domain.
>>>
>>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
>>> ---
>>>   drivers/clk/samsung/clk-exynos5x-subcmu.c | 180
>>> ++++++++++++++++++++++++++++++
>>
>> In some other places we call entire family "exynos5" so maybe let's
>> follow the convention instead of "5x"? In the name of file and all the
>> variables/names later?
>
>
> Okay.
>
>
>>>   drivers/clk/samsung/clk-exynos5x-subcmu.h |  30 +++++
>>>   2 files changed, 210 insertions(+)
>>>   create mode 100644 drivers/clk/samsung/clk-exynos5x-subcmu.c
>>>   create mode 100644 drivers/clk/samsung/clk-exynos5x-subcmu.h
>>>
>>> diff --git a/drivers/clk/samsung/clk-exynos5x-subcmu.c
>>> b/drivers/clk/samsung/clk-exynos5x-subcmu.c
>>> new file mode 100644
>>> index 000000000000..9ff6d5d17f57
>>> --- /dev/null
>>> +++ b/drivers/clk/samsung/clk-exynos5x-subcmu.c
>>> @@ -0,0 +1,180 @@
>>> +/*
>>> + * Copyright (c) 2018 Samsung Electronics Co., Ltd.
>>> + * Author: Marek Szyprowski <m.szyprowski@samsung.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>
>> Use SPDX identifier instead of license text.
>>
>>> + *
>>> + * Common Clock Framework support for Exynos5x power-domain dependent
>>> + * sub-CMUs
>>> + */
>>> +
>>> +#include <linux/of_platform.h>
>>> +#include <linux/platform_device.h>
>>> +#include <linux/pm_domain.h>
>>> +#include <linux/pm_runtime.h>
>>> +
>>> +#include "clk.h"
>>> +#include "clk-exynos5x-subcmu.h"
>>> +
>>> +static struct samsung_clk_provider *ctx;
>>> +static const struct samsung_5x_subcmu_info *cmu;
>>> +static int nr_cmus;
>>
>> core_initcall here will register this and subcmu drivers. The probe of
>> this driver will populate devices for subcmus. From next patch - the
>> initcall of clock driver - will initialize the subcmus, also touching
>> these statics.
>>
>> Is my understanding correct?
>>
>> Quite complicated init system... plus static variables. Are you sure
>> there are no concurrency issues?
>
>
> Everything is okay. exynos5420 clock driver is initialized very early
> via OF_CLK_DECLARE() method. It calls
>
> samsung_clk_subcmus_init() at the end, which passes the needed clk
> context to this driver. Then there is core_init call, which registers
> both platform drivers and then a bit later at arch_initcalls all
> platform devices are populated from device tree. This triggers a probe
> of exynos5x-clock platform driver, which in its probe creates child
> platform devices for each supported power domain. Then those child
> devices are probed by exynos5x-clock-subcmu platform driver, which
> finally registers clocks and enables runtime pm for them.
>
> I know this is a bit complex, but frankly I didn't find any other way
> of handling clocks by both OF_CLK_DECLARE and platform device based
> driver(s). Maybe I will put the above explanation in the comment
> somewhere in this driver.
>
> In theory exynos5x-clock platform driver is not really needed, as child
> devices might have been created directly from OF_CLK_DECLARE()-based
> code, but sadly it is called so early that it is not yet possible to
> call any code related to platform bus (it is not yet initialized). The
> good thing that all this is hidden inside this driver and there are no
> external hacks needed elsewhere (like in DT) to get it working.

Thanks for explanation - indeed it would be nice to see it somewhere
in the code. Also as you pointed, it is nice that everything is
driver-contained.

Best regards,
Krzysztof

  reply	other threads:[~2018-02-23  7:49 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20180221101532eucas1p24200cb65dba8209cd99dba5427c9a28d@eucas1p2.samsung.com>
2018-02-21 10:15 ` [PATCH 0/6] Exynos5: cleanup clocks handling in power domains Marek Szyprowski
     [not found]   ` <CGME20180221101533eucas1p234b1801844ce8fac633377d129323422@eucas1p2.samsung.com>
2018-02-21 10:15     ` [PATCH 1/6] soc: samsung: pm_domains: Add blacklisting clock handling Marek Szyprowski
2018-02-22 10:54       ` Krzysztof Kozlowski
2018-03-06 16:05         ` Sylwester Nawrocki
     [not found]   ` <CGME20180221101533eucas1p27bcfd237d2c851402b3e99248fec5a6c@eucas1p2.samsung.com>
2018-02-21 10:15     ` [PATCH 2/6] clk: samsung: Add Exynos5x sub-CMU clock driver Marek Szyprowski
2018-02-21 16:19       ` Krzysztof Kozlowski
2018-02-22 12:22         ` Marek Szyprowski
2018-02-23  7:49           ` Krzysztof Kozlowski [this message]
     [not found]   ` <CGME20180221101533eucas1p2c0fdc0b744b1e026906bd047507f5701@eucas1p2.samsung.com>
2018-02-21 10:15     ` [PATCH 3/6] clk: samsung: exynos542x: Move PD-dependent clocks to Exynos5x sub-CMU driver Marek Szyprowski
2018-02-21 16:21       ` Krzysztof Kozlowski
     [not found]   ` <CGME20180221101534eucas1p24db3c1d049d9ecd0de9c76a10bb58041@eucas1p2.samsung.com>
2018-02-21 10:15     ` [PATCH 4/6] clk: samsung: exynos5250: " Marek Szyprowski
2018-02-22 10:54       ` Krzysztof Kozlowski
     [not found]   ` <CGME20180221101534eucas1p29d832ffe11055241a39d79a8863845ad@eucas1p2.samsung.com>
2018-02-21 10:15     ` [PATCH 5/6] soc: samsung: pm_domains: Deprecate support for clocks Marek Szyprowski
     [not found]   ` <CGME20180221101535eucas1p2e99fbf00fd97bb935b02d12e7c225da0@eucas1p2.samsung.com>
2018-02-21 10:15     ` [PATCH 6/6] ARM: dts: exynos: Remove obsolete clock properties from power domains Marek Szyprowski
     [not found]   ` <CANAwSgQirTqLMCCUWZNUKn3jVTCssjkD=H9Oe2R729K81xm2pg@mail.gmail.com>
2018-02-26 13:09     ` [PATCH 0/6] Exynos5: cleanup clocks handling in " Marek Szyprowski

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