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Tue, 28 Feb 2023 11:02:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1677582160; bh=whVHBfeNmd48/Mtd8KK1rHa96pedE0BT/IGoZMz9JD4=; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject: To:Cc:Content-Type; b=WZ1ruGWMNQy8M99yrTIIGLqzGwPx3c6TSwpDDzYiWXEalhI+rOoOTACF3gNs6fM06 J/hCQjFvPDn5RmKg1wmyB9Y+j9QEtQlubzBcLX/vOK8gIu6NQr9/I3d0R08bD6UrLE dUwpRLWiXKoQnxGBcdctDDLbJXKUUHvEEIWCQ/mVlyqMsC/YOi344iPvCA80sfMObp 8BrqDtRThGeYW9Gf6GI1ziV8+X1k//P9sJSSatvGvl1rfDVKcYTi2qJU1DHw3S0SDn agkFrDa8XuXCebI5s6uV/GGNYKVVlK/KWyD4H2/wW4xRy09M9BZeyY/1rB3f2G8+l3 zAD9psFkwqFag== Received: by mail-qk1-f198.google.com with SMTP id z23-20020a376517000000b00731b7a45b7fso5831845qkb.2 for ; Tue, 28 Feb 2023 03:02:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=whVHBfeNmd48/Mtd8KK1rHa96pedE0BT/IGoZMz9JD4=; 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charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 28 Feb 2023 at 11:40, Krzysztof Kozlowski wrote: > > On 28/02/2023 10:05, William Qiu wrote: > > > > > > On 2023/2/28 6:29, Rob Herring wrote: > >> On Tue, Feb 21, 2023 at 10:44:02AM +0800, William Qiu wrote: > >>> > >>> > >>> On 2023/2/21 7:43, Rob Herring wrote: > >>>> On Wed, Feb 15, 2023 at 07:32:49PM +0800, William Qiu wrote: > >>>>> Add documentation to describe StarFive System Controller Registers. > >>>>> > >>>>> Signed-off-by: William Qiu > >>>>> --- > >>>>> .../bindings/soc/starfive/jh7110-syscon.yaml | 51 +++++++++++++++++++ > >>>>> MAINTAINERS | 5 ++ > >>>>> 2 files changed, 56 insertions(+) > >>>>> create mode 100644 Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml > >>>>> > >>>>> diff --git a/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml > >>>>> new file mode 100644 > >>>>> index 000000000000..fa4d8522a454 > >>>>> --- /dev/null > >>>>> +++ b/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml > >>>>> @@ -0,0 +1,51 @@ > >>>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > >>>>> +%YAML 1.2 > >>>>> +--- > >>>>> +$id: http://devicetree.org/schemas/soc/starfive/jh7110-syscon.yaml# > >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >>>>> + > >>>>> +title: StarFive JH7110 SoC system controller > >>>>> + > >>>>> +maintainers: > >>>>> + - William Qiu > >>>>> + > >>>>> +description: | > >>>>> + The StarFive JH7110 SoC system controller provides register information such > >>>>> + as offset, mask and shift to configure related modules such as MMC and PCIe. > >>>>> + > >>>>> +properties: > >>>>> + compatible: > >>>>> + items: > >>>>> + - enum: > >>>>> + - starfive,jh7110-stg-syscon > >>>>> + - starfive,jh7110-sys-syscon > >>>>> + - starfive,jh7110-aon-syscon > >>>> > >>>> Is 'syscon' really part of what the blocks are called? Is just 'stg', > >>>> 'sys' and 'aon' not unique enough? > >>>> > >>>> Rob > >>> Hi Rob, > >>> > >>> In StarFive SoC, we do have syscrg/aoncrg/stgcrg, which is uesd to be the clock > >>> controller, so 'syscon' is added to avoid confusion. > >> > >> You've only added to my confusion. 'syscrg' and 'sys-syscon' are 2 > >> different h/w blocks and unrelated to each other? Or 'syscrg' is the > >> clock portion of 'sys-syscon'? In that case, 'syscrg' should be a child > >> of 'sys-syscon' or possibly just all one node. Please provide details on > >> the entire h/w block so we can provide better input on the bindings. > >> > >> Rob > > > > Hi Rob, > > > > It's my description that's problematic.'syscon' here refers to the hardware module > > inside our JH7110, which is different from the syscon interface in linux. The syscon > > I added now uses the syscon interface of linux to read and write the syscon register > > in our JH7110. So we decided to name it that way. > > You didn't really answer Rob's questions. > > Also, syscon is Linux term, so are you sure hardware module is called > like this? Hardware engineers took pure Linux name and used it? Yes, from the documentation I could find[1] there are CRG blocks (Clock and Reset Generator) and SYSCON blocks: SYS CRG STG CRG AON CRG SYS SYSCON STG SYSCON AON SYSCON The CRG blocks contain registers to control clocks and resets that follow a pattern used by the clock and reset drivers. The SYSCON blocks just seem to contain registers to control whatever didn't fit in any other blocks, but might be vaguely related to the peripherals that run off clocks controlled by the corresponding CRG block. [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/system_control_registers.html /Emil > Best regards, > Krzysztof > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2B30C64ED6 for ; Tue, 28 Feb 2023 11:03:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, 28 Feb 2023 at 11:40, Krzysztof Kozlowski wrote: > > On 28/02/2023 10:05, William Qiu wrote: > > > > > > On 2023/2/28 6:29, Rob Herring wrote: > >> On Tue, Feb 21, 2023 at 10:44:02AM +0800, William Qiu wrote: > >>> > >>> > >>> On 2023/2/21 7:43, Rob Herring wrote: > >>>> On Wed, Feb 15, 2023 at 07:32:49PM +0800, William Qiu wrote: > >>>>> Add documentation to describe StarFive System Controller Registers. > >>>>> > >>>>> Signed-off-by: William Qiu > >>>>> --- > >>>>> .../bindings/soc/starfive/jh7110-syscon.yaml | 51 +++++++++++++++++++ > >>>>> MAINTAINERS | 5 ++ > >>>>> 2 files changed, 56 insertions(+) > >>>>> create mode 100644 Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml > >>>>> > >>>>> diff --git a/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml > >>>>> new file mode 100644 > >>>>> index 000000000000..fa4d8522a454 > >>>>> --- /dev/null > >>>>> +++ b/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml > >>>>> @@ -0,0 +1,51 @@ > >>>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > >>>>> +%YAML 1.2 > >>>>> +--- > >>>>> +$id: http://devicetree.org/schemas/soc/starfive/jh7110-syscon.yaml# > >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >>>>> + > >>>>> +title: StarFive JH7110 SoC system controller > >>>>> + > >>>>> +maintainers: > >>>>> + - William Qiu > >>>>> + > >>>>> +description: | > >>>>> + The StarFive JH7110 SoC system controller provides register information such > >>>>> + as offset, mask and shift to configure related modules such as MMC and PCIe. > >>>>> + > >>>>> +properties: > >>>>> + compatible: > >>>>> + items: > >>>>> + - enum: > >>>>> + - starfive,jh7110-stg-syscon > >>>>> + - starfive,jh7110-sys-syscon > >>>>> + - starfive,jh7110-aon-syscon > >>>> > >>>> Is 'syscon' really part of what the blocks are called? Is just 'stg', > >>>> 'sys' and 'aon' not unique enough? > >>>> > >>>> Rob > >>> Hi Rob, > >>> > >>> In StarFive SoC, we do have syscrg/aoncrg/stgcrg, which is uesd to be the clock > >>> controller, so 'syscon' is added to avoid confusion. > >> > >> You've only added to my confusion. 'syscrg' and 'sys-syscon' are 2 > >> different h/w blocks and unrelated to each other? Or 'syscrg' is the > >> clock portion of 'sys-syscon'? In that case, 'syscrg' should be a child > >> of 'sys-syscon' or possibly just all one node. Please provide details on > >> the entire h/w block so we can provide better input on the bindings. > >> > >> Rob > > > > Hi Rob, > > > > It's my description that's problematic.'syscon' here refers to the hardware module > > inside our JH7110, which is different from the syscon interface in linux. The syscon > > I added now uses the syscon interface of linux to read and write the syscon register > > in our JH7110. So we decided to name it that way. > > You didn't really answer Rob's questions. > > Also, syscon is Linux term, so are you sure hardware module is called > like this? Hardware engineers took pure Linux name and used it? Yes, from the documentation I could find[1] there are CRG blocks (Clock and Reset Generator) and SYSCON blocks: SYS CRG STG CRG AON CRG SYS SYSCON STG SYSCON AON SYSCON The CRG blocks contain registers to control clocks and resets that follow a pattern used by the clock and reset drivers. The SYSCON blocks just seem to contain registers to control whatever didn't fit in any other blocks, but might be vaguely related to the peripherals that run off clocks controlled by the corresponding CRG block. [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/system_control_registers.html /Emil > Best regards, > Krzysztof > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv