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Mon, 21 Nov 2022 03:38:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf5WqnZPCDXzAGWO5+CsGrfvY5dZ99oEse/5+ZdgxQLRmeJNBWFQZouQa8Zd7b6wtc3vX0BNaCAIpFXWIf5Gs/k= X-Received: by 2002:a25:e80f:0:b0:6df:927f:38c9 with SMTP id k15-20020a25e80f000000b006df927f38c9mr16158698ybd.92.1669030713733; Mon, 21 Nov 2022 03:38:33 -0800 (PST) MIME-Version: 1.0 References: <20221118010627.70576-1-hal.feng@starfivetech.com> <20221118010627.70576-11-hal.feng@starfivetech.com> <8153973d-e8ad-e47a-3808-bbcdbfd169a5@linaro.org> In-Reply-To: <8153973d-e8ad-e47a-3808-bbcdbfd169a5@linaro.org> From: Emil Renner Berthing Date: Mon, 21 Nov 2022 12:38:17 +0100 Message-ID: Subject: Re: [PATCH v2 10/14] dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator To: Krzysztof Kozlowski Cc: Hal Feng , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Conor Dooley , Palmer Dabbelt , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Michael Turquette , Philipp Zabel , linux-kernel@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221121_033837_002974_6EB901F3 X-CRM114-Status: GOOD ( 19.33 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, 21 Nov 2022 at 09:49, Krzysztof Kozlowski wrote: > > On 18/11/2022 02:06, Hal Feng wrote: > > From: Emil Renner Berthing > > > > Add bindings for the always-on clock and reset generator (AONCRG) on the > > JH7110 RISC-V SoC by StarFive Ltd. > > > > Signed-off-by: Emil Renner Berthing > > Signed-off-by: Hal Feng > > --- > > .../clock/starfive,jh7110-aoncrg.yaml | 76 +++++++++++++++++++ > > 1 file changed, 76 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml > > > > diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml > > new file mode 100644 > > index 000000000000..afbb205e294f > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml > > @@ -0,0 +1,76 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: StarFive JH7110 Always-On Clock and Reset Generator > > + > > +maintainers: > > + - Emil Renner Berthing > > + > > +properties: > > + compatible: > > + const: starfive,jh7110-aoncrg > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: Main Oscillator > > + - description: RTC clock > > Real Time Clock clock? :) I don't think the input to clock controller is > the output of RTC... The description is bad, but even the documentation calls it "clk_rtc" even though it's really an optional input from a 32k oscillator. > Best regards, > Krzysztof > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F1ACC433FE for ; Mon, 21 Nov 2022 11:40:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231237AbiKULkD (ORCPT ); Mon, 21 Nov 2022 06:40:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230426AbiKULjk (ORCPT ); Mon, 21 Nov 2022 06:39:40 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4FA63450B5 for ; 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Mon, 21 Nov 2022 03:38:33 -0800 (PST) X-Google-Smtp-Source: AA0mqf5WqnZPCDXzAGWO5+CsGrfvY5dZ99oEse/5+ZdgxQLRmeJNBWFQZouQa8Zd7b6wtc3vX0BNaCAIpFXWIf5Gs/k= X-Received: by 2002:a25:e80f:0:b0:6df:927f:38c9 with SMTP id k15-20020a25e80f000000b006df927f38c9mr16158698ybd.92.1669030713733; Mon, 21 Nov 2022 03:38:33 -0800 (PST) MIME-Version: 1.0 References: <20221118010627.70576-1-hal.feng@starfivetech.com> <20221118010627.70576-11-hal.feng@starfivetech.com> <8153973d-e8ad-e47a-3808-bbcdbfd169a5@linaro.org> In-Reply-To: <8153973d-e8ad-e47a-3808-bbcdbfd169a5@linaro.org> From: Emil Renner Berthing Date: Mon, 21 Nov 2022 12:38:17 +0100 Message-ID: Subject: Re: [PATCH v2 10/14] dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator To: Krzysztof Kozlowski Cc: Hal Feng , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Conor Dooley , Palmer Dabbelt , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Michael Turquette , Philipp Zabel , linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 21 Nov 2022 at 09:49, Krzysztof Kozlowski wrote: > > On 18/11/2022 02:06, Hal Feng wrote: > > From: Emil Renner Berthing > > > > Add bindings for the always-on clock and reset generator (AONCRG) on the > > JH7110 RISC-V SoC by StarFive Ltd. > > > > Signed-off-by: Emil Renner Berthing > > Signed-off-by: Hal Feng > > --- > > .../clock/starfive,jh7110-aoncrg.yaml | 76 +++++++++++++++++++ > > 1 file changed, 76 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml > > > > diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml > > new file mode 100644 > > index 000000000000..afbb205e294f > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml > > @@ -0,0 +1,76 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: StarFive JH7110 Always-On Clock and Reset Generator > > + > > +maintainers: > > + - Emil Renner Berthing > > + > > +properties: > > + compatible: > > + const: starfive,jh7110-aoncrg > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: Main Oscillator > > + - description: RTC clock > > Real Time Clock clock? :) I don't think the input to clock controller is > the output of RTC... The description is bad, but even the documentation calls it "clk_rtc" even though it's really an optional input from a 32k oscillator. > Best regards, > Krzysztof >