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dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mibodhi@gmail.com Received: by mail-yb1-xb2a.google.com with SMTP id w17so20155434ybl.11 for ; Sat, 31 Jul 2021 02:55:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=iCSlXCxQtET691SDUP+AoNDcZxm8JnKnDH6utm0jAxk=; b=It1klXOW31HLL2iFgdd0ZMMdICJ9Wl1PAyq+8vi8tUhH9d8eSC9Cfc75XWxFV9T6/7 Rumw3Xg9rpko6Ql3z3s0WACRDZWN21H6upI2rpsLX4sYOlisvmV6NFqdUrMzlfjBtxq0 H/CKojGJsAsJuwfkXqs+GIFTDdoe7Z/Whu8TLL7f7Ty08qWWVMCyH5LdgteWmcNm7i6d dMXj0ifW+qNB57hXWvjQQp98+W9Za1uHgG94FzL1OvAxRabImIXPodJKKvbrYLZTU3sQ iAjYgCPHrBvmCsJrbduBBLKTevZo0s+gjo8LZcZ8M5TyUDV4/oDjPlLonMVRqBBuWcon pm1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=iCSlXCxQtET691SDUP+AoNDcZxm8JnKnDH6utm0jAxk=; b=jLRQ9niYOJGUFdw7gV4bezQFY6rJ69BIDcDsz0DEIA8si7a0oOnlJkLtAjcJyf4rE7 HVa34VlwHKLmTr0tqxqrAwZC8F1jxJP092YbJKsP8KPYae03msQXeezcWuzrN0tD7xBe BsW+gHRjvX2pX6LuPQkXSFot2dDmp2h5AsFssp1bflkshQMArUVIGuDG+zjGC6bW1p0T lA9otBIbMRZJsFx24JAsy25twqe8E3lKa6mPukJTRXLm/5iB1kdldHnxAbE/sB0fO2li 1xpOasIxHt0NCxYy2K/En0zEoXc9aA+fTiQY82fK2rHnODTdHR6Z6Cd6lDWziaiA5i3F mYaQ== X-Gm-Message-State: AOAM533QmKSzZs5fst/h0h9iC44Squ+DtQjUHZNtOTXtwLwj+xb8Dcgh 2/eBrz4MmhhoepTDGiJ1oFlJj4KaqBc/HluILRE= X-Google-Smtp-Source: ABdhPJx+piDnS1hc/lu4Oag+cDroDFO2wNKUl1fQHvYflpG2cc50fGu0otX3zLyR19s+U7eN5lMRRMEHAvG3KfbA+xQ= X-Received: by 2002:a25:b18e:: with SMTP id h14mr8556783ybj.441.1627725328292; Sat, 31 Jul 2021 02:55:28 -0700 (PDT) MIME-Version: 1.0 References: <20210726060121.7253-1-mibodhi@gmail.com> <20210726060121.7253-3-mibodhi@gmail.com> <64fd303b-ca30-b2b3-92ef-d31e99299fed@denx.de> In-Reply-To: <64fd303b-ca30-b2b3-92ef-d31e99299fed@denx.de> From: Tony Dinh Date: Sat, 31 Jul 2021 02:55:17 -0700 Message-ID: Subject: Re: [PATCH 2/3] arm: kirkwood: Dreamplug: Use Ethernet PHY name and address from device tree To: Stefan Roese Cc: U-Boot Mailing List , Jason Cooper , Chris Packham , Tom Rini , Simon Glass Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Hi Stefan, On Sat, Jul 31, 2021 at 12:41 AM Stefan Roese wrote: > > On 26.07.21 08:01, Tony Dinh wrote: > > In DM Ethernet, the old "egiga0" and 'egiga1" names are no longer valid= , > > so replace these with Ethernet PHY names from device tree. Also, read > > Ethernet PHY address for each port from device tree. > > > > Signed-off-by: Tony Dinh > > --- > > > > board/Marvell/dreamplug/dreamplug.c | 62 ++++++++++++++++++++++------= - > > 1 file changed, 48 insertions(+), 14 deletions(-) > > > > diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamp= lug/dreamplug.c > > index e1c64b5224..d5b6b22ddf 100644 > > --- a/board/Marvell/dreamplug/dreamplug.c > > +++ b/board/Marvell/dreamplug/dreamplug.c > > @@ -1,5 +1,6 @@ > > // SPDX-License-Identifier: GPL-2.0+ > > /* > > + * Copyright (C) 2021 Tony Dinh > > * (C) Copyright 2011 > > * Jason Cooper > > * > > @@ -97,42 +98,75 @@ int board_init(void) > > return 0; > > } > > > > +static int fdt_get_phy_addr(const char *path) > > +{ > > + const void *fdt =3D gd->fdt_blob; > > + const u32 *reg; > > + const u32 *val; > > + int node, phandle, addr; > > + > > + /* Find the node by its full path */ > > + node =3D fdt_path_offset(fdt, path); > > + if (node >=3D 0) { > > + /* Look up phy-handle */ > > + val =3D fdt_getprop(fdt, node, "phy-handle", NULL); > > + if (val) { > > + phandle =3D fdt32_to_cpu(*val); > > + if (!phandle) > > + return -1; > > + /* Follow it to its node */ > > + node =3D fdt_node_offset_by_phandle(fdt, phandle)= ; > > + if (node) { > > + /* Look up reg */ > > + reg =3D fdt_getprop(fdt, node, "reg", NUL= L); > > + if (reg) { > > + addr =3D fdt32_to_cpu(*reg); > > + return addr; > > + } > > + } > > + } > > + } > > + return -1; > > +} > > You've added this exact some function now for the 3rd time IIRC. Could > please please consolidate this function into one of the fdt / dt common > functions instead? Perhaps there is already something similar for > reading PHY addresses? > > Please do this in a follow-up patch, after I've pulled this one. Yes, I realized this function needs consolidation too, and mentioned it in the patch for the Sheevaplug. Currently, it is hard to find a home for this. ./common/fdt_support.c is one level of abstraction below this fdt_get_phy_addr(). So it is not appropriate for this function to be in that file. I've looked at various Armada 37x/38x SoC DTS, the binding is a bit different, i.e. the "phy-handle" is not defined as consistently as in Kirkwood DTSs, so this function would not work for Marvell SoCs, in general. How about if we put this function in a new area in arch/arm/mach-kirkwood/? such as arch/arm/mach-kirkwood/fdt/ ? I'll send in a separate patch for this, which will apply to the Kirkwood boards which have already been converted to DM Ethernet. Thanks, Tony > Other that this: > > Reviewed-by: Stefan Roese > > Thanks, > Stefan > > > > + > > #ifdef CONFIG_RESET_PHY_R > > -void mv_phy_88e1116_init(char *name) > > +void mv_phy_88e1116_init(const char *name, const char *path) > > { > > u16 reg; > > - u16 devadr; > > + int phyaddr; > > > > if (miiphy_set_current_dev(name)) > > return; > > > > - /* command to read PHY dev address */ > > - if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { > > - printf("Err..%s could not read PHY dev address\n", > > - __func__); > > + phyaddr =3D fdt_get_phy_addr(path); > > + if (phyaddr < 0) > > return; > > - } > > > > /* > > * Enable RGMII delay on Tx and Rx for CPU port > > * Ref: sec 4.7.2 of chip datasheet > > */ > > - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); > > - miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, ®); > > + miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2); > > + miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL2_REG, ®); > > reg |=3D (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); > > - miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); > > - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); > > + miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL2_REG, reg); > > + miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0); > > > > /* reset the phy */ > > - miiphy_reset(name, devadr); > > + miiphy_reset(name, phyaddr); > > > > printf("88E1116 Initialized on %s\n", name); > > } > > > > void reset_phy(void) > > { > > + char *eth0_name =3D "ethernet-controller@72000"; > > + char *eth0_path =3D "/ocp@f1000000/ethernet-controller@72000/ethe= rnet0-port@0"; > > + char *eth1_name =3D "ethernet-controller@76000"; > > + char *eth1_path =3D "/ocp@f1000000/ethernet-controller@72000/ethe= rnet1-port@0"; > > + > > /* configure and initialize both PHY's */ > > - mv_phy_88e1116_init("egiga0"); > > - mv_phy_88e1116_init("egiga1"); > > + mv_phy_88e1116_init(eth0_name, eth0_path); > > + mv_phy_88e1116_init(eth1_name, eth1_path); > > } > > #endif /* CONFIG_RESET_PHY_R */ > > > > > Viele Gr=C3=BC=C3=9Fe, > Stefan > > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de