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Wed, 20 Jan 2021 18:35:30 -0800 (PST) MIME-Version: 1.0 References: <20201210160002.1407373-1-maz@kernel.org> In-Reply-To: <20201210160002.1407373-1-maz@kernel.org> From: Haibo Xu Date: Thu, 21 Jan 2021 10:35:19 +0800 Message-ID: Subject: Re: [PATCH v3 00/66] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support To: Marc Zyngier Cc: Andre Przywara , kernel-team@android.com, kvmarm , arm-mail-list , kvm@vger.kernel.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============9170938993488471735==" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu --===============9170938993488471735== Content-Type: multipart/alternative; boundary="000000000000e3192605b95fec64" --000000000000e3192605b95fec64 Content-Type: text/plain; charset="UTF-8" On Fri, 11 Dec 2020 at 00:00, Marc Zyngier wrote: > > This is a rework of the NV series that I posted 10 months ago[1], as a > lot of the KVM code has changed since, and the series apply anymore > (not that anybody really cares as the the HW is, as usual, made of > unobtainium...). > > From the previous version: > > - Integration with the new page-table code > - New exception injection code > - No more messing with the nVHE code > - No AArch32!!!! > - Rebased on v5.10-rc4 + kvmarm/next for 5.11 > > From a functionality perspective, you can expect a L2 guest to work, > but don't even think of L3, as we only partially emulate the > ARMv8.{3,4}-NV extensions themselves. Same thing for vgic, debug, PMU, > as well as anything that would require a Stage-1 PTW. What we want to > achieve is that with NV disabled, there is no performance overhead and > no regression. > > The series is roughly divided in 5 parts: exception handling, memory > virtualization, interrupts and timers for ARMv8.3, followed by the > ARMv8.4 support. There are of course some dependencies, but you'll > hopefully get the gist of it. > > For the most courageous of you, I've put out a branch[2]. Of course, > you'll need some userspace. Andre maintains a hacked version of > kvmtool[3] that takes a --nested option, allowing the guest to be > started at EL2. You can run the whole stack in the Foundation > model. Don't be in a hurry ;-). > > And to be clear: although Jintack and Christoffer have written tons of > the stuff originaly, I'm the one responsible for breaking it! > > [1] https://lore.kernel.org/r/20200211174938.27809-1-maz@kernel.org > [2] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-5.11.-WIP > [3] git://linux-arm.org/kvmtool.git nv/nv-wip-5.2-rc5 Hi Marc, I have tried to enable the NV support in Qemu, and now I can successfully boot a L2 guest in Qemu KVM mode. This patch series looks good from the Qemu side except for two minor requirements: (1) Qemu will check whether a feature was supported by the KVM cap when the user tries to enable it in the command line, so a new capability was prefered for the NV(KVM_CAP_ARM_NV?). (2) According to the Documentation/virt/kvm/api.rst , userspace can call KVM_ARM_VCPU_INIT multiple times for a given vcpu, but the kvm_vcpu_init_nested() do have some issue when called multiple times(please refer to the detailed comments in patch 63) Regards, Haibo --000000000000e3192605b95fec64 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
On Fri, 11 Dec 2020 at 00:00, Marc Zyngier <maz@kernel.org> wrote:
>
> This i= s a rework of the NV series that I posted 10 months ago[1], as a
> lo= t of the KVM code has changed since, and the series apply anymore
> (= not that anybody really cares as the the HW is, as usual, made of
> u= nobtainium...).
>
> From the previous version:
>
> = - Integration with the new page-table code
> - New exception injectio= n code
> - No more messing with the nVHE code
> - No AArch32!!!= !
> - Rebased on v5.10-rc4 + kvmarm/next for 5.11
>
> Fro= m a functionality perspective, you can expect a L2 guest to work,
> b= ut don't even think of L3, as we only partially emulate the
> ARM= v8.{3,4}-NV extensions themselves. Same thing for vgic, debug, PMU,
>= as well as anything that would require a Stage-1 PTW. What we want to
&= gt; achieve is that with NV disabled, there is no performance overhead and<= br>> no regression.
>
> The series is roughly divided in 5 p= arts: exception handling, memory
> virtualization, interrupts and tim= ers for ARMv8.3, followed by the
> ARMv8.4 support. There are of cour= se some dependencies, but you'll
> hopefully get the gist of it.<= br>>
> For the most courageous of you, I've put out a branch[2= ]. Of course,
> you'll need some userspace. Andre maintains a hac= ked version of
> kvmtool[3] that takes a --nested option, allowing th= e guest to be
> started at EL2. You can run the whole stack in the Fo= undation
> model. Don't be in a hurry ;-).
>
> And to= be clear: although Jintack and Christoffer have written tons of
> th= e stuff originaly, I'm the one responsible for breaking it!
>
= > [1] https://lore.kernel.org/r/20200211174938.27809-1-maz@kernel.org
> [2] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-= platforms.git kvm-arm64/nv-5.11.-WIP
> [3] git://linux-arm.org/kvmtool.git nv/nv-wip-5.2-rc= 5

Hi Marc,

I have tried to enable the NV support in Qemu, and= now I can successfully boot a L2 guest
in Qemu KVM mode.

This p= atch series looks good from the Qemu side except for two minor requirements= :
(1) Qemu will check whether a feature was supported by the KVM cap whe= n the user tries
=C2=A0 =C2=A0 =C2=A0to enable it in the command line, s= o a new capability was prefered for the NV(KVM_CAP_ARM_NV?).
(2) Accordi= ng to the Documentation/virt/kvm/api.rs= t, userspace can call=C2=A0KVM_ARM_VCPU_INIT
=C2=A0 =C2=A0 =C2= =A0multiple times for a given vcpu, but the=C2=A0kvm_vcpu_init_nested() do = have some issue when
=C2=A0 =C2=A0 =C2=A0called multiple times(pl= ease refer to the detailed comments in patch 63)

R= egards,
Haibo
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