From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09EE7CA9ED0 for ; Sun, 3 Nov 2019 22:41:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C8893205C9 for ; Sun, 3 Nov 2019 22:41:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="otjkL/AL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728197AbfKCWlo (ORCPT ); Sun, 3 Nov 2019 17:41:44 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:55145 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727602AbfKCWlo (ORCPT ); Sun, 3 Nov 2019 17:41:44 -0500 Received: by mail-wm1-f68.google.com with SMTP id z26so1520964wmi.4; Sun, 03 Nov 2019 14:41:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=HucD2g+iFY7eRxKaYG+od4LZ3/It4oehK1OgkAW2Ebg=; b=otjkL/ALDBy2mJUdrrWFPnq2yf3HqrRGFDZE80/A8COATIC9Hc6JNFMRGgABBxOVAY P7RPsU30qmVptlpHZ+zLTWSe/vjyrTqJpw+tMt8LcWdzHz4qBAPwkWcePBzVCzTjzsEF OVIib/9Y5u7HBVgU1bZHNu52yPzhxSb+lDEMeHssv36yl/KJGMoxC57LQCrpM8q43qv6 AeyTGh92EvqjtIi4Y2uNN2RJVIJjRvkbFWgK9e1mBbg4pkjmLXEs31mHXrAUztA1SJwE 3oQ/KVwrOegtFu6EHPvLRNma05r0u8ht/ICBPzE7RawXhLC0M1rp8payzY6fzvv5v8Y5 6nYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=HucD2g+iFY7eRxKaYG+od4LZ3/It4oehK1OgkAW2Ebg=; b=TDXiWxJo3qt9Z4UMN2rDBUEH8m72t4YqMYzFaP4TxEKfJ3d6j/kObRRXKDfcL64rki 6NvY68g8QR162Ija3UzG4Nm7QyitywQ5xl743EZs2XGgS2P7aOl9Z/pOt8GeSWNC8eSF pjOKQmLQMj7EWdTYrWN/JP3Ztqav2Ou6fCjv4Scf8elnq8pSK2UpGeYV65OQVXLDKDSi wTIlVHk5vGkfAhXIWz603tEnghxjM5uNGefTr9A73d1sqRIGlpE11ugxqm76y5ffeJtc Qmswy8JQ4e0HBCVRuVP0AOD7WlNHs0L2XLkbRpzYDh9nC/3cQkj/LJbzMqSEKPf3DW27 XOfQ== X-Gm-Message-State: APjAAAXQC36M9oCLTx+a1k7ZlziwXRX7anwLmgNg7cfiFae/PM/3nr4U rVhApaUn1+K9WtHIXHCQGudIABi/UALVbMQz7CI= X-Google-Smtp-Source: APXvYqyPEG01MLTsUGrMY+CVoElO++aDFQdqiZWzgRrFyzj2FCjI2etJek/jIGaF5IazlkvECznyA2C6wFfHjsHLshs= X-Received: by 2002:a1c:a512:: with SMTP id o18mr19098688wme.4.1572820900868; Sun, 03 Nov 2019 14:41:40 -0800 (PST) MIME-Version: 1.0 References: <20191103203334.10539-5-peron.clem@gmail.com> <201911040602.AEBKHjBk%lkp@intel.com> In-Reply-To: <201911040602.AEBKHjBk%lkp@intel.com> From: =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= Date: Sun, 3 Nov 2019 23:41:29 +0100 Message-ID: Subject: Re: [PATCH v2 4/7] pwm: sun4i: Add support to output source clock directly To: kbuild test robot Cc: kbuild-all@lists.01.org, Thierry Reding , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , linux-pwm@vger.kernel.org, devicetree , linux-arm-kernel , linux-kernel , Jernej Skrabec Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Sun, 3 Nov 2019 at 23:30, kbuild test robot wrote: > > Hi "Cl=C3=A9ment, > > I love your patch! Yet something to improve: > > [auto build test ERROR on sunxi/sunxi/for-next] > [also build test ERROR on v5.4-rc5 next-20191031] > [if your patch is applied to the wrong git tree, please drop us a note to= help > improve the system. BTW, we also suggest to use '--base' option to specif= y the > base tree in git format-patch, please see https://stackoverflow.com/a/374= 06982] > > url: https://github.com/0day-ci/linux/commits/Cl-ment-P-ron/Add-suppor= t-for-H6-PWM/20191104-043621 > base: https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git s= unxi/for-next > config: riscv-allmodconfig (attached as .config) > compiler: riscv64-linux-gcc (GCC) 7.4.0 > reproduce: > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbi= n/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > GCC_VERSION=3D7.4.0 make.cross ARCH=3Driscv > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot > > All errors (new ones prefixed by >>): > > drivers//pwm/pwm-sun4i.c: In function 'sun4i_pwm_get_state': > >> drivers//pwm/pwm-sun4i.c:132:6: error: 'data' undeclared (first use in= this function) > data->has_direct_mod_clk_output) { > ^~~~ Arg, bad last minute indent fix : This should be "sun4i_pwm->data->has_direct_mod_clk_output" Sorry for that, Cl=C3=A9ment > drivers//pwm/pwm-sun4i.c:132:6: note: each undeclared identifier is re= ported only once for each function it appears in > > vim +/data +132 drivers//pwm/pwm-sun4i.c > > 112 > 113 static void sun4i_pwm_get_state(struct pwm_chip *chip, > 114 struct pwm_device *pwm, > 115 struct pwm_state *state) > 116 { > 117 struct sun4i_pwm_chip *sun4i_pwm =3D to_sun4i_pwm_chip(ch= ip); > 118 u64 clk_rate, tmp; > 119 u32 val; > 120 unsigned int prescaler; > 121 > 122 clk_rate =3D clk_get_rate(sun4i_pwm->clk); > 123 > 124 val =3D sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG); > 125 > 126 /* > 127 * PWM chapter in H6 manual has a diagram which explains = that if bypass > 128 * bit is set, no other setting has any meaning. Even mor= e, experiment > 129 * proved that also enable bit is ignored in this case. > 130 */ > 131 if ((val & BIT_CH(PWM_BYPASS, pwm->hwpwm)) && > > 132 data->has_direct_mod_clk_output) { > 133 state->period =3D DIV_ROUND_CLOSEST_ULL(NSEC_PER_= SEC, clk_rate); > 134 state->duty_cycle =3D state->period / 2; > 135 state->polarity =3D PWM_POLARITY_NORMAL; > 136 state->enabled =3D true; > 137 return; > 138 } > 139 > 140 if ((PWM_REG_PRESCAL(val, pwm->hwpwm) =3D=3D PWM_PRESCAL_= MASK) && > 141 sun4i_pwm->data->has_prescaler_bypass) > 142 prescaler =3D 1; > 143 else > 144 prescaler =3D prescaler_table[PWM_REG_PRESCAL(val= , pwm->hwpwm)]; > 145 > 146 if (prescaler =3D=3D 0) > 147 return; > 148 > 149 if (val & BIT_CH(PWM_ACT_STATE, pwm->hwpwm)) > 150 state->polarity =3D PWM_POLARITY_NORMAL; > 151 else > 152 state->polarity =3D PWM_POLARITY_INVERSED; > 153 > 154 if ((val & BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) = =3D=3D > 155 BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) > 156 state->enabled =3D true; > 157 else > 158 state->enabled =3D false; > 159 > 160 val =3D sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm)= ); > 161 > 162 tmp =3D prescaler * NSEC_PER_SEC * PWM_REG_DTY(val); > 163 state->duty_cycle =3D DIV_ROUND_CLOSEST_ULL(tmp, clk_rate= ); > 164 > 165 tmp =3D prescaler * NSEC_PER_SEC * PWM_REG_PRD(val); > 166 state->period =3D DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); > 167 } > 168 > > --- > 0-DAY kernel test infrastructure Open Source Technology Ce= nter > https://lists.01.org/pipermail/kbuild-all Intel Corpora= tion From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= Subject: Re: [PATCH v2 4/7] pwm: sun4i: Add support to output source clock directly Date: Sun, 3 Nov 2019 23:41:29 +0100 Message-ID: References: <20191103203334.10539-5-peron.clem@gmail.com> <201911040602.AEBKHjBk%lkp@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <201911040602.AEBKHjBk%lkp@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: kbuild test robot Cc: Mark Rutland , linux-pwm@vger.kernel.org, Jernej Skrabec , kbuild-all@lists.01.org, devicetree , linux-kernel , Maxime Ripard , Rob Herring , Chen-Yu Tsai , Thierry Reding , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , linux-arm-kernel List-Id: linux-pwm@vger.kernel.org SGksCgpPbiBTdW4sIDMgTm92IDIwMTkgYXQgMjM6MzAsIGtidWlsZCB0ZXN0IHJvYm90IDxsa3BA aW50ZWwuY29tPiB3cm90ZToKPgo+IEhpICJDbMOpbWVudCwKPgo+IEkgbG92ZSB5b3VyIHBhdGNo ISBZZXQgc29tZXRoaW5nIHRvIGltcHJvdmU6Cj4KPiBbYXV0byBidWlsZCB0ZXN0IEVSUk9SIG9u IHN1bnhpL3N1bnhpL2Zvci1uZXh0XQo+IFthbHNvIGJ1aWxkIHRlc3QgRVJST1Igb24gdjUuNC1y YzUgbmV4dC0yMDE5MTAzMV0KPiBbaWYgeW91ciBwYXRjaCBpcyBhcHBsaWVkIHRvIHRoZSB3cm9u ZyBnaXQgdHJlZSwgcGxlYXNlIGRyb3AgdXMgYSBub3RlIHRvIGhlbHAKPiBpbXByb3ZlIHRoZSBz eXN0ZW0uIEJUVywgd2UgYWxzbyBzdWdnZXN0IHRvIHVzZSAnLS1iYXNlJyBvcHRpb24gdG8gc3Bl Y2lmeSB0aGUKPiBiYXNlIHRyZWUgaW4gZ2l0IGZvcm1hdC1wYXRjaCwgcGxlYXNlIHNlZSBodHRw czovL3N0YWNrb3ZlcmZsb3cuY29tL2EvMzc0MDY5ODJdCj4KPiB1cmw6ICAgIGh0dHBzOi8vZ2l0 aHViLmNvbS8wZGF5LWNpL2xpbnV4L2NvbW1pdHMvQ2wtbWVudC1QLXJvbi9BZGQtc3VwcG9ydC1m b3ItSDYtUFdNLzIwMTkxMTA0LTA0MzYyMQo+IGJhc2U6ICAgaHR0cHM6Ly9naXQua2VybmVsLm9y Zy9wdWIvc2NtL2xpbnV4L2tlcm5lbC9naXQvc3VueGkvbGludXguZ2l0IHN1bnhpL2Zvci1uZXh0 Cj4gY29uZmlnOiByaXNjdi1hbGxtb2Rjb25maWcgKGF0dGFjaGVkIGFzIC5jb25maWcpCj4gY29t cGlsZXI6IHJpc2N2NjQtbGludXgtZ2NjIChHQ0MpIDcuNC4wCj4gcmVwcm9kdWNlOgo+ICAgICAg ICAgd2dldCBodHRwczovL3Jhdy5naXRodWJ1c2VyY29udGVudC5jb20vaW50ZWwvbGtwLXRlc3Rz L21hc3Rlci9zYmluL21ha2UuY3Jvc3MgLU8gfi9iaW4vbWFrZS5jcm9zcwo+ICAgICAgICAgY2ht b2QgK3ggfi9iaW4vbWFrZS5jcm9zcwo+ICAgICAgICAgIyBzYXZlIHRoZSBhdHRhY2hlZCAuY29u ZmlnIHRvIGxpbnV4IGJ1aWxkIHRyZWUKPiAgICAgICAgIEdDQ19WRVJTSU9OPTcuNC4wIG1ha2Uu Y3Jvc3MgQVJDSD1yaXNjdgo+Cj4gSWYgeW91IGZpeCB0aGUgaXNzdWUsIGtpbmRseSBhZGQgZm9s bG93aW5nIHRhZwo+IFJlcG9ydGVkLWJ5OiBrYnVpbGQgdGVzdCByb2JvdCA8bGtwQGludGVsLmNv bT4KPgo+IEFsbCBlcnJvcnMgKG5ldyBvbmVzIHByZWZpeGVkIGJ5ID4+KToKPgo+ICAgIGRyaXZl cnMvL3B3bS9wd20tc3VuNGkuYzogSW4gZnVuY3Rpb24gJ3N1bjRpX3B3bV9nZXRfc3RhdGUnOgo+ ID4+IGRyaXZlcnMvL3B3bS9wd20tc3VuNGkuYzoxMzI6NjogZXJyb3I6ICdkYXRhJyB1bmRlY2xh cmVkIChmaXJzdCB1c2UgaW4gdGhpcyBmdW5jdGlvbikKPiAgICAgICAgICBkYXRhLT5oYXNfZGly ZWN0X21vZF9jbGtfb3V0cHV0KSB7Cj4gICAgICAgICAgXn5+fgoKQXJnLCBiYWQgbGFzdCBtaW51 dGUgaW5kZW50IGZpeCA6ClRoaXMgc2hvdWxkIGJlICJzdW40aV9wd20tPmRhdGEtPmhhc19kaXJl Y3RfbW9kX2Nsa19vdXRwdXQiCgpTb3JyeSBmb3IgdGhhdCwKQ2zDqW1lbnQKCj4gICAgZHJpdmVy cy8vcHdtL3B3bS1zdW40aS5jOjEzMjo2OiBub3RlOiBlYWNoIHVuZGVjbGFyZWQgaWRlbnRpZmll ciBpcyByZXBvcnRlZCBvbmx5IG9uY2UgZm9yIGVhY2ggZnVuY3Rpb24gaXQgYXBwZWFycyBpbgo+ Cj4gdmltICsvZGF0YSArMTMyIGRyaXZlcnMvL3B3bS9wd20tc3VuNGkuYwo+Cj4gICAgMTEyCj4g ICAgMTEzICBzdGF0aWMgdm9pZCBzdW40aV9wd21fZ2V0X3N0YXRlKHN0cnVjdCBwd21fY2hpcCAq Y2hpcCwKPiAgICAxMTQgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgc3RydWN0IHB3 bV9kZXZpY2UgKnB3bSwKPiAgICAxMTUgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg c3RydWN0IHB3bV9zdGF0ZSAqc3RhdGUpCj4gICAgMTE2ICB7Cj4gICAgMTE3ICAgICAgICAgIHN0 cnVjdCBzdW40aV9wd21fY2hpcCAqc3VuNGlfcHdtID0gdG9fc3VuNGlfcHdtX2NoaXAoY2hpcCk7 Cj4gICAgMTE4ICAgICAgICAgIHU2NCBjbGtfcmF0ZSwgdG1wOwo+ICAgIDExOSAgICAgICAgICB1 MzIgdmFsOwo+ICAgIDEyMCAgICAgICAgICB1bnNpZ25lZCBpbnQgcHJlc2NhbGVyOwo+ICAgIDEy MQo+ICAgIDEyMiAgICAgICAgICBjbGtfcmF0ZSA9IGNsa19nZXRfcmF0ZShzdW40aV9wd20tPmNs ayk7Cj4gICAgMTIzCj4gICAgMTI0ICAgICAgICAgIHZhbCA9IHN1bjRpX3B3bV9yZWFkbChzdW40 aV9wd20sIFBXTV9DVFJMX1JFRyk7Cj4gICAgMTI1Cj4gICAgMTI2ICAgICAgICAgIC8qCj4gICAg MTI3ICAgICAgICAgICAqIFBXTSBjaGFwdGVyIGluIEg2IG1hbnVhbCBoYXMgYSBkaWFncmFtIHdo aWNoIGV4cGxhaW5zIHRoYXQgaWYgYnlwYXNzCj4gICAgMTI4ICAgICAgICAgICAqIGJpdCBpcyBz ZXQsIG5vIG90aGVyIHNldHRpbmcgaGFzIGFueSBtZWFuaW5nLiBFdmVuIG1vcmUsIGV4cGVyaW1l bnQKPiAgICAxMjkgICAgICAgICAgICogcHJvdmVkIHRoYXQgYWxzbyBlbmFibGUgYml0IGlzIGln bm9yZWQgaW4gdGhpcyBjYXNlLgo+ICAgIDEzMCAgICAgICAgICAgKi8KPiAgICAxMzEgICAgICAg ICAgaWYgKCh2YWwgJiBCSVRfQ0goUFdNX0JZUEFTUywgcHdtLT5od3B3bSkpICYmCj4gID4gMTMy ICAgICAgICAgICAgICBkYXRhLT5oYXNfZGlyZWN0X21vZF9jbGtfb3V0cHV0KSB7Cj4gICAgMTMz ICAgICAgICAgICAgICAgICAgc3RhdGUtPnBlcmlvZCA9IERJVl9ST1VORF9DTE9TRVNUX1VMTChO U0VDX1BFUl9TRUMsIGNsa19yYXRlKTsKPiAgICAxMzQgICAgICAgICAgICAgICAgICBzdGF0ZS0+ ZHV0eV9jeWNsZSA9IHN0YXRlLT5wZXJpb2QgLyAyOwo+ICAgIDEzNSAgICAgICAgICAgICAgICAg IHN0YXRlLT5wb2xhcml0eSA9IFBXTV9QT0xBUklUWV9OT1JNQUw7Cj4gICAgMTM2ICAgICAgICAg ICAgICAgICAgc3RhdGUtPmVuYWJsZWQgPSB0cnVlOwo+ICAgIDEzNyAgICAgICAgICAgICAgICAg IHJldHVybjsKPiAgICAxMzggICAgICAgICAgfQo+ICAgIDEzOQo+ICAgIDE0MCAgICAgICAgICBp ZiAoKFBXTV9SRUdfUFJFU0NBTCh2YWwsIHB3bS0+aHdwd20pID09IFBXTV9QUkVTQ0FMX01BU0sp ICYmCj4gICAgMTQxICAgICAgICAgICAgICBzdW40aV9wd20tPmRhdGEtPmhhc19wcmVzY2FsZXJf YnlwYXNzKQo+ICAgIDE0MiAgICAgICAgICAgICAgICAgIHByZXNjYWxlciA9IDE7Cj4gICAgMTQz ICAgICAgICAgIGVsc2UKPiAgICAxNDQgICAgICAgICAgICAgICAgICBwcmVzY2FsZXIgPSBwcmVz Y2FsZXJfdGFibGVbUFdNX1JFR19QUkVTQ0FMKHZhbCwgcHdtLT5od3B3bSldOwo+ICAgIDE0NQo+ ICAgIDE0NiAgICAgICAgICBpZiAocHJlc2NhbGVyID09IDApCj4gICAgMTQ3ICAgICAgICAgICAg ICAgICAgcmV0dXJuOwo+ICAgIDE0OAo+ICAgIDE0OSAgICAgICAgICBpZiAodmFsICYgQklUX0NI KFBXTV9BQ1RfU1RBVEUsIHB3bS0+aHdwd20pKQo+ICAgIDE1MCAgICAgICAgICAgICAgICAgIHN0 YXRlLT5wb2xhcml0eSA9IFBXTV9QT0xBUklUWV9OT1JNQUw7Cj4gICAgMTUxICAgICAgICAgIGVs c2UKPiAgICAxNTIgICAgICAgICAgICAgICAgICBzdGF0ZS0+cG9sYXJpdHkgPSBQV01fUE9MQVJJ VFlfSU5WRVJTRUQ7Cj4gICAgMTUzCj4gICAgMTU0ICAgICAgICAgIGlmICgodmFsICYgQklUX0NI KFBXTV9DTEtfR0FUSU5HIHwgUFdNX0VOLCBwd20tPmh3cHdtKSkgPT0KPiAgICAxNTUgICAgICAg ICAgICAgIEJJVF9DSChQV01fQ0xLX0dBVElORyB8IFBXTV9FTiwgcHdtLT5od3B3bSkpCj4gICAg MTU2ICAgICAgICAgICAgICAgICAgc3RhdGUtPmVuYWJsZWQgPSB0cnVlOwo+ICAgIDE1NyAgICAg ICAgICBlbHNlCj4gICAgMTU4ICAgICAgICAgICAgICAgICAgc3RhdGUtPmVuYWJsZWQgPSBmYWxz ZTsKPiAgICAxNTkKPiAgICAxNjAgICAgICAgICAgdmFsID0gc3VuNGlfcHdtX3JlYWRsKHN1bjRp X3B3bSwgUFdNX0NIX1BSRChwd20tPmh3cHdtKSk7Cj4gICAgMTYxCj4gICAgMTYyICAgICAgICAg IHRtcCA9IHByZXNjYWxlciAqIE5TRUNfUEVSX1NFQyAqIFBXTV9SRUdfRFRZKHZhbCk7Cj4gICAg MTYzICAgICAgICAgIHN0YXRlLT5kdXR5X2N5Y2xlID0gRElWX1JPVU5EX0NMT1NFU1RfVUxMKHRt cCwgY2xrX3JhdGUpOwo+ICAgIDE2NAo+ICAgIDE2NSAgICAgICAgICB0bXAgPSBwcmVzY2FsZXIg KiBOU0VDX1BFUl9TRUMgKiBQV01fUkVHX1BSRCh2YWwpOwo+ICAgIDE2NiAgICAgICAgICBzdGF0 ZS0+cGVyaW9kID0gRElWX1JPVU5EX0NMT1NFU1RfVUxMKHRtcCwgY2xrX3JhdGUpOwo+ICAgIDE2 NyAgfQo+ICAgIDE2OAo+Cj4gLS0tCj4gMC1EQVkga2VybmVsIHRlc3QgaW5mcmFzdHJ1Y3R1cmUg ICAgICAgICAgICAgICAgT3BlbiBTb3VyY2UgVGVjaG5vbG9neSBDZW50ZXIKPiBodHRwczovL2xp c3RzLjAxLm9yZy9waXBlcm1haWwva2J1aWxkLWFsbCAgICAgICAgICAgICAgICAgICBJbnRlbCBD b3Jwb3JhdGlvbgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5p bmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8v bGludXgtYXJtLWtlcm5lbAo=